A
B
C
D
E
MYALL2 Block Diagram CLK GEN. IDT CV125
TV Out Yonah 478 Celeron M
G792
19
14
CPU DC/DC ISL6262 37 ~ 38
LCD
13
DDR II SO-DIMM 1 DDR II SO-DIMM 2
4
14
CRT
4~5
FSB 400/533/667 MHz
11 ~ 12
INPUTS
Calistoga 945PM / 940GML
RAM BUS 533/667 MHz
Nvidia G72M-V
PEG
49 ~ 50
6 ~ 10
PCI BUS
Codec ALC883 29
24 ~ 25
28
29
29
30
PCIE x 1
21
LAN
TXFM
1D5V_S5 1D8V_S3 3D3V_S5 3D3V_S0
30 30
MINI CARD
23
5V_S5 5V_S5 5V_S5 1D8V_S0
LPC BUS
26
DEBUG CONN34
SATA
SIO NS87381
32
KBC KB3910
INPUTS
X BUS
FIR
BT+ 16.8V 3A
DCBATOUT
USB
PATA
L1: Signal 1 L2: VCC L3: Signal 2 L4: Signal 3 L5: GND L6: Signal 4
34
Touch INT. KB CIR Pad 33 33 33
42
OUTPUTS
1
21
USB 4 Port21
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
l.c
MINI USB BlueTooth
20
ai
CDROM
CAMERA
tm
20
Title
13
BLOCK DIAGRAM Size
Document Number
Date: Tuesday, April 11, 2006 B
C
D
Sheet E
Rev
xa
MYALL2 A
ho
HDD
f@
24 ~ 25
in
SATA
om
Wistron Corporation
1
he
1
BIOS
32
2
3D3V_S5 1D8V_S3 0D9V 1D2V_S0
CHARGER ISL6255
31
15 ~ 18
PCB Layer Stackup
1D05V_S0 1D5V_S0 1D5V_S5 2D5V_S0
APW7057-KC TPS51100DGQ APL5331-KAC 41 INPUTS OUTPUTS
22 ~ 23 PCIE x 1
3D3V_S5 5V_S5
APL5331-KAC APL5912-KAC APL5308-25AC 40 INPUTS OUTPUTS
RJ45
23
3
OUTPUTS
DCBATOUT
26
WIRELESS
RTL8111B
INPUTS
Card Reader26
Mini-PCI
ICH7-M
35
MAX8744
PCMCIA SLOT 27
TV & Video-In
MODEM MDC Card 2
1394
Intel 82801 GBM
OP AMP G1421B
d. Line Out e. INT.SPKR
TI PCI7412
HDA
SYSTEM DC/DC
PWR SW CP2211 25
DMI 100 MHz
3
OUTPUTS
VCC_CORE DCBATOUT 0.844~1.3V 27A
VRAMx4
46 ~ 48 , 51 ~ 55
11 ~ 12
a. Line In b. Mic In c. INT Mic
PCB
91.4G901.001 06203-MP
Intel Mobile CPU
3
4
Project Code
MP of
57
A
B
ICH7M Integrated Pull-up and Pull-down Resistors
ICH7-M EDS 17837
C 1.5V1
EE_DIN, EE_DOUT, GNT[3:0], GPIO[25], GNT[4]#/GPIO48, GNT[5]#/GPO17, PME#,
D
954305D 27Mhz/LCDCLK Spread and Frequency Selection Table SS3 Byte9 bit 7 0
SS2 bit6
SS1 bit5
SS0 bit4
0
0
0
-0.50 Down
page 3
Spread Amount%
E
Calistoga Strapping Signals and EDS 17050 0.71 Configuration page 7 Pin Name
Strap Description
CFG[2:0]
FSB Frequency Select
ICH7 internal 20K pull-ups
4
LAD[3:0]#/FHW[3:0]#, LAN_RXD[2:0]
0
0
0
1
-1.00 Down
LDRQ[0], LDRQ[1]/GPIO[41],
0
0
1
0
-1.50 Down
CFG[4:3]
Reserved
PWRBTN#, TP[3]
0
0
1
1
-2.00 Down
CFG5
DMI x2 Select
DD[7], DDREQ
Configuration 001 = FSB533 011 = FSB667 others = Reserved
0
1
0
0
-0.75 Down
CFG6
0
1
0
1
-1.25 Down
CFG7
0
1
1
0
-1.75 Down
0
1
1
1
-2.25 Down
1
0
0
0
+-0.25 Center
1
0
0
1
+-0.5 Center
4 0 = DMI x2 1 = DMI x4
(Default)
Reserved
ICH7 internal 11.5K pull-downs 0 = Reserved 1 =Mobile CPU(Default)
CPU Strap ACZ_BIT_CLK, ACZ_RST#, ACZ_SDIN[2:0],
ICH7 internal 20K pull-downs
Reserved ACZ_SDOUT, ACZ_SYNC, DPRSLPVR/GPIO16, EE_CS,SPI_ARB, SPI_CLK, SPKR,
CFG8 CFG9
USB[7:0][P,N]
ICH7 internal 15K pull-downs
SATALED#
ICH7 internal 15K pull-up
1
0
1
0
+-0.75 Center
1
0
1
1
+-1.0 Center
CFG[11:10]
LAN_CLK
3
0
+-0.25 Center
1
0
1
+-0.5 Center
1
1
0
+-0.75 Center
1
1
1
+-1.0 Center
1
1 1 1
PCI Routing
DD[15:0], DIOW#, DIOR#, DREQ, approximately 33 ohm DCS3#, IDEIRQ
ICH7M Functional Strap Definitions Signal ACZ_SDOUT
2
1
Reserved
CFG[13:12]
CFG[15:14]
Reserved
CFG16
FSB Dynamic ODT
0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled (Default)
CFG17
Global R-comp Disable (All R-comps)
0 = All R-comp Disable 1 = Normal Operation (Default)
CFG18
VCC Select
0 = 1.05V (Default) 1 = 1.5V
CFG19
DMI Lane Reversal
0 = Normal operation (Default):lane Numbered in order 1 =Reverse Lane,4->0,3->1 ect...
Usage/When Sampled XOR Chain Entrance/ PCIE Port Config bit1, Rising Edge of PWROK
page 16
page 16
Reserved
7412
22
MiniPCI
21
INT -> PIRQ A->G, B->B, C->F, D->G A/C -> E B/D -> E
REQ/GNT 0 1
CFG20
SDVO/PCIE Concurrent
SDVOCRTL _DATA
SDVO Present
Comment Allows entrance to XOR Chain testing when TP3 pulled low.When TP3 not pulled low at rising edge of PWROK,sets bit1 of RPC.PC(Config Registers: offset 224h)
ACZ_SYNC
PCIE bit0, Rising Edge of PWROK.
Sets bit0 of RPC.PC(Config Registers:Offset 224h)
EE_CS
Reserved
This signal should not be pull high. This signal should not be pull low.
3
0 = Only SDVO or PCIE x1 is operational (Default) 1 =SDVO and PCIE x1 are operating simultaneously via the PEG port 0 = No SDVO Card present (Default) 1= SDVO Card present
NOTE: All strap signals are sampled with respect to the leading edge of the Calistoga GMCH PWORK in signal.
EE_DOUT
Reserved
GNT2#
Reserved
This signal should not be pull low.
GNT3#
Top-Block Swap Override. Rising Edge of PWROK.
Sampled low:Top-Block Swap mode(inverts A16 for all cycles targeting FWH BIOS space). Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.
GNT5#/ GPIO17#, GNT4#/ GPIO48
Boot BIOS Destination Selection. Rising Edge of PWROK.
Controllable via Boot BIOS Destination bit (Config Registers:Offset 3410h:bit 11:10). GNT5# is MSB, 01-SPI, 10-PCI, 11-LPC.
DPRSLPVR
Reserved
This signal should not be pull high.
GPIO25
Reserved. Rising Edge of RSMRST#.
This signal should not be pull low.
INTVRMEN
Integrated VccSus1_05 VRM Enable/Disable. Always sampled.
Enables integrated VccSus1_05 VRM when sampled high
LINKALERT#
Reserved
Requires an external pull-up resistor.
REQ[4:1]#
XOR Chain Selection. Rising Edge of PWROK.
TBD, Chapter 8.
SATALED#
Reserved
This signal should not be pull low.
SPKR
No Reboot. Rising Edge of PWROK.
If sampled high, the system is strapped to the "No Reboot" mode(ICH7 will disable the TCO Timer system reboot feature). The status is readable via the NO REBOOT bit.
Title
XOR Chain Entrance. Rising Edge of PWROK.
This signal should not be pull low unless using XOR Chain testing.
Size
TP3
00 = Reserved 01 = XOR mode enabled 10 = All Z mode enabled 11 = Normal Operation (Default)
IORDY, DA[2:0], DCS1#,
IDSEL
0 = Reverse Lanes,15->0,14->1 ect.. 1= Normal operation(Default):Lane Numbered in order
XOR/ALL Z test straps
ICH7 internal 100K pull-down
ICH7M IDE Integrated Series Termination Resistors DDACK#,
0
1
PCI Express Graphics Lane Reversal
2
1
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Reference Document Number
Date: Friday, March 24, 2006
Rev
MYALL2 Sheet
MP 2
of
57
A
B
C
D
E
3D3V_S0
SCD1U16V2ZY-2GP
C625 SCD1U16V2ZY-2GP
2
1
1
SCD1U16V2ZY-2GP
C637
2
SCD1U16V2ZY-2GP
C653
2
1
1
SCD1U16V2ZY-2GP
C654
2
SCD1U16V2ZY-2GP
C655
2
1
C636
2
1
SC4D7U10V5ZY-3GP
2
C633
1
R437 0R0603-PAD 2 1
3D3V_CLKGEN_S0 C626 SC1U6D3V2ZY-GP
1
3D3V_48MPWR_S0
C652 SC1U6D3V2ZY-GP
2
SCD1U16V2ZY-2GP
3D3V_S0
1
C647
R204 0R0603-PAD 1 2
2
1
R448 0R0603-PAD 1 2 3D3V_CLKPLL_S0
2
2
1
3D3V_S0
C632 SCD1U16V2ZY-2GP
4
4
1
3D3V_S0
R426 10KR2J-3-GP
2
DREFSSCLK_1 DREFSSCLK#_1
4 3
1 RN67 2 SRN33J-5-GP-U
DREFSSCLK 7 DREFSSCLK# 7
CLK_MCH_3GPLL_1 4 CLK_MCH_3GPLL_1# 3
1 RN68 2 SRN33J-5-GP-U
CLK_MCH_3GPLL 7 CLK_MCH_3GPLL# 7
SS_SEL U41
55
PCI_STOP#
46 47
SCL SDA
14 15
DOT96 DOT96#
R4522 R4532 R4502
1 22R2J-2-GP 1 22R2J-2-GP 1 475R2F-L1-GP
CLK_EN#
2
3D3V_S0
GEN_XTAL_OUT GEN_REF GEN_IREF
50 49 52 39 10
R435 10KR2J-3-GP 1
XTAL_IN XTAL_OUT REF IREF VTT_PWRGD#/PD
DREFCLK# DREFCLK
1 2
RN62 SRN49D9F-GP 4 3
CLK_MCH_3GPLL_1 CLK_MCH_3GPLL_1# CLK_PCIE_ICH_1 CLK_PCIE_ICH_1# CLK_PCIE_LAN_1 CLK_PCIE_LAN_1# CLK_PCIE_SATA_1 CLK_PCIE_SATA_1#
CLK_PCIE_LAN_1 CLK_PCIE_LAN_1#
CPU2_ITP/SRC7 CPU2_ITP#/SRC7#
36 35
CLK_PCIE_PEG_1 CLK_PCIE_PEG_1#
CPU0 CPU0# CPU1 CPU1#
44 43 41 40
CLK_CPU_BCLK_1 CLK_CPU_BCLK_1# CLK_MCH_BCLK_1 CLK_MCH_BCLK_1#
CPU_STOP# FSC/TEST_SEL FSB/TEST_MODE USB48/FSA
54 53 16 12
CPU_SEL2 CPU_SEL1 CLK48
34 21
VDD_SRC VDD_SRC
51 45 38 13 29
VSS_REF VSS_CPU VSSA VSS48 VSS_SRC
VDD_PCI VDD_PCI
7 1
VDD_REF VDD_CPU VDDA VDD48 VDD_SRC
48 42 37 11 28
CLK_PCIE_MINI_12 CLK_PCIE_MINI_12#
3D3V_CLKGEN_S0
3 4
2 RN71 1 SRN33J-5-GP-U
CLK_PCIE_LAN 22 CLK_PCIE_LAN# 22
CLK_PCIE_SATA_1 CLK_PCIE_SATA_1#
4 3
1 RN69 2 SRN33J-5-GP-U
CLK_PCIE_SATA 15 CLK_PCIE_SATA# 15
CLK_PCIE_MINI_12 CLK_PCIE_MINI_12#
3 4
2 RN78 1 SRN33J-5-GP-U
CLK_PCIE_MINI2 26 CLK_PCIE_MINI2# 26
CLK_PCIE_PEG_1 CLK_PCIE_PEG_1#
3 4
2 RN77 G72 1 SRN33J-5-GP-U
CLK_PCIE_PEG 46 CLK_PCIE_PEG# 46
CLK_CPU_BCLK_1 CLK_CPU_BCLK_1#
3 4
2 RN75 1 SRN33J-5-GP-U
CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4
CLK_MCH_BCLK_1 CLK_MCH_BCLK_1#
3 4
2 RN76 1 SRN33J-5-GP-U
CLK_MCH_BCLK 6 CLK_MCH_BCLK# 6
R436 22R2J-2-GP 2 R428 22R2J-2-GP 2 R429 2K2R2J-2-GP 2
1 1 1
2 SC10P50V2JN-4GP
DY
EC46 1
2 SC10P50V2JN-4GP
DY
PCLK_PCM
EC51 1
2 SC10P50V2JN-4GP
DY
PCLK_KBC
EC53 1
2 SC10P50V2JN-4GP
DY
CLK_ICHPCI
EC45 1
2 SC10P50V2JN-4GP
DY
CLK48_ICH
EC47 1
2 SC10P50V2JN-4GP
DY
EMI
2 1
RN64 SRN49D9F-GP 3 4
FSB
266M 133M 200M 166M 333M 100M 400M Reserved
X 533M X 667M X X X X
2
1D05V_S0
R573 DY 1K74R2F-GP
CLK_PCIE_LAN CLK_PCIE_LAN#
RN72 SRN49D9F-GP 1 4 2 3
CLK_PCIE_SATA CLK_PCIE_SATA#
2 1
CLK_PCIE_ICH CLK_PCIE_ICH#
RN74 SRN49D9F-GP 1 4 2 3
CLK_PCIE_MINI2 CLK_PCIE_MINI2#
1 2
CPU_SEL1
2
CLK_MCH_3GPLL CLK_MCH_3GPLL#
CPU
0 1 0 1 0 1 0 1
71.00125.A0W
R574 DY 1K74R2F-GP
R576 DY 1K74R2F-GP
1
CLK_PCIE_PEG CLK_PCIE_PEG#
RN81 G72 SRN49D9F-GP 1 4 2 3
RN80 SRN49D9F-GP 4 3
FSA
0 0 1 1 0 0 1 1
RN65 SRN49D9F-GP 3 4
R575 DY 1K74R2F-GP
CPU_SEL2 R577 DY 1K74R2F-GP
R578 DY 1K74R2F-GP
om
EC55 1
PCLK_MINI
1 2
FSB
0 0 0 0 1 1 1 1
l.c
CLK_ICH14
CLK_MCH_BCLK CLK_MCH_BCLK#
FSC
ai
DY
25
Wistron Corporation tm
2 SC10P50V2JN-4GP
When use UMA RN9 DUMMY
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
ho
1
EC50 1
3
f@
PCLK_SIO
RN79 SRN49D9F-GP 1 4 2 3
CPU_SEL0
3D3V_CLKPLL_S0 3D3V_48MPWR_S0
CPU_SEL0 CLK_CPU_BCLK CLK_CPU_BCLK#
PM_STPCPU# 16 CPU_SEL2 4,7 CPU_SEL1 4,7 CLK48_ICH 16 CLK48_CARDBUS CPU_SEL0 4,7
2
RN63 SRN49D9F-GP 4 3
19 20 22 23 24 25 26 27 31 30 33 32
VSS_PCI VSS_PCI
IDTCV125PAG-GP
1 2
SRC1 SRC1# SRC2 SRC2# SRC3 SRC3# SRC4 SRC4# SRC5 SRC5# SRC6 SRC6#
2 6
2
DREFSSCLK# DREFSSCLK
CLK_PCIE_ICH 16 CLK_PCIE_ICH# 16
RN82 SRN49D9F-GP 4 3
in
37
1 0R0603-PAD
DREFCLK_1 DREFCLK#_1
PCIF1/SEL100/96# PCIF0/ITP_EN
LVDS LVDS#
2 RN73 1 SRN33J-5-GP-U
2
1
R444 2
2
C640 SC27P50V2JN-2-GP 1 2
RN66 SRN33J-5-GP-U 1 4 2 3
DREFCLK DREFCLK#
GEN_XTAL_IN GEN_XTAL_OUT_R X4 X-14D31818M-31GP 32 CLK14_SIO 82.30005.831 16 CLK_ICH14
9 8
H/L : CPU_ITP/SRC7
11,18 SMBC_ICH 11,18 SMBD_ICH 7 7
C648 SC27P50V2JN-2-GP 1 2
SS_SEL ITP_EN
PCI0 PCI1 PCI2 PCI3
3 4
1
PCLK_FWH & PCLK_PCM need equal length
3
PCLKCLK2 PCLKCLK3
CLK_PCIE_ICH_1 CLK_PCIE_ICH_1#
2
16 PM_STPPCI#
22R2J-2-GP 33R2J-2-GP 22R2J-2-GP 33R2J-2-GP 33R2J-2-GP 10KR2J-3-GP
DREFSSCLK_1 DREFSSCLK#_1
1
1 1 1 1 1 1
17 18
Title
xa
R4412 R4322 R4382 R4342 R2052 R4332
PCLK_PCM PCLK_SIO PCLK_FWH PCLK_MINI CLK_ICHPCI
56 3 4 5
Clock Generator ICS954305D Size
he
25 32 34 30 16
PCLKCLK0
2
1 33R2J-2-GP
1
R4512
2
31 PCLK_KBC
1
2
R427 DY 10KR2J-3-GP
1
1
H/L: 100/96MHz
Document Number
Rev
MYALL2 Date: Thursday, March 30, 2006 A
B
C
D
Sheet E
MP 3
of
57
1
A
B
C
D
E
H_DINV#[3..0]
H_DINV#[3..0]
H_DSTBN#[3..0] TP24 TPAD30 U34A
D5 C6 B4 A3
STPCLK# LINT0 LINT1 SMI#
AA1 AA4 AB2 AA3 M4 N5 T2 V3 B2 C3
RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09] RSVD[10]
2
TPAD30 TPAD30 TPAD30 TPAD30 TPAD30 TPAD30 TPAD30 TPAD30
TP34 TP31 TP33 TP32 TP26 TP25 TP28 TP29
TPAD30
TP16
TPAD30
TP13
B25
HIT# HITM#
G6 E4
BPM[0]# BPM[1]# BPM[2]# BPM[3]# PRDY# PREQ# TCK TDI TDO TMS TRST# DBR#
AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20
PROCHOT# THERMDA THERMDC
D21 A24 A25
THERMTRIP#
RSVD[11]
H_RS#0 H_RS#1 H_RS#2
U34B 6
H_TRDY# 6 H_HIT# H_HITM# XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST# XDP_DBRESET#
TP48 TP49 TP43 TP42 TP40 TP41 TP47 TP35 TP39 TP38 TP46 TP10
H_THERMDA
6 6 TPAD30 TPAD30 TPAD30 TPAD30 TPAD30 TPAD30 TPAD30 TPAD30 TPAD30 TPAD30 TPAD30 TPAD30
H_THERMDC
C160 SC2200P50V2KX-2GP
1D05V_S0 6 H_DSTBN#0 6 H_DSTBP#0 6 H_DINV#0
R88 56R2J-4-GP
CPU_PROCHOT# 37 H_THERMDA 19 H_THERMDC 19
C7
PM_THRMTRIP-A# 7
BCLK[0] BCLK[1]
A22 A21
R96 0R0402-PAD 1 2 PM_THRMTRIP-I# 19 CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3
RSVD[12]
T22
TP27 TPAD30
RSVD[13] RSVD[14] RSVD[15] RSVD[16] RSVD[17] RSVD[18] RSVD[19] RSVD[20]
D2 F6 D3 C1 AF1 D22 C23 C24
TP17 TPAD30 TP22 TPAD30 TP50 TP21 TP20 TP19
TPAD30 TPAD30 TPAD30 TPAD30
R188 1KR2F-3-GP
6 6 6
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31
H_DSTBN#1 H_DSTBP#1 H_DINV#1
CPU_GTLREF0
R189 2KR2F-3-GP
2
BGA479-SKT6-GPU1 62.10079.001
PM_THRMTRIP# should connect to ICH7 and Calistoga without T-ing ( No stub)
1D05V_S0
Layout Note: 0.5" max length.
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15
2nd source: 62.10053.401
C258
3,7 3,7 3,7
D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#
N22 K25 P26 R23 L25 L22 L23 M23 P25 P22 P23 T24 R24 L26 T25 N24 M24 N25 M26
D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#
AD26 R381 2 1TEST1 1KR2J-1-GP 1 2TEST2 R384 51R2F-2-GP
CPU_SEL0 CPU_SEL1 CPU_SEL2
E22 F24 E26 H22 F23 G25 E25 E23 K24 G24 J24 J23 H26 F26 K22 H25 H23 G22 J26
C26
GTLREF
TEST2
B22 B23 C21
BSEL[0] BSEL[1] BSEL[2]
AA23 AB24 V24 V26 W25 U23 U25 U22 AB25 W22 Y23 AA26 Y26 Y22 AC26 AA24 W24 Y25 V23
H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47
D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]# DSTBN[3]# DSTBP[3]# DINV[3]#
AC22 AC23 AB22 AA21 AB21 AC25 AD20 AE22 AF23 AD24 AE21 AD21 AE25 AF25 AF22 AF26 AD23 AE24 AC20
H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
COMP[0] COMP[1] COMP[2] COMP[3]
R26 U26 U1 V1
DPRSTP# DPSLP# DPWR# PWRGOOD SLP# PSI#
E5 B5 D24 D6 D7 AE6
MISC
TEST1
D25
D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]# DSTBN[2]# DSTBP[2]# DINV[2]#
DATA GRP 2
B1 F3 F4 G3 G2
1
RESET# RS[0]# RS[1]# RS[2]# TRDY#
4
6
H_INIT# 15 H_LOCK# 6 H_CPURST# 6 H_RS#[2..0]
2
H4
H_D#[63..0]
Place testpoint on H_IERR# with a GND 0.1" away
H_IERR#
2
CONTROL
IERR# INIT# LOCK#
6
1 2
H_BREQ#0 6
DATA GRP 3
15 H_STPCLK# 15 H_INTR 15 H_NMI 15 H_SMI#
F1 D20 B3
SC1KP16V2KX-GP 2 1
A20M# FERR# IGNNE#
H_DEFER# 6 H_DRDY# 6 H_DBSY# 6
6
H_DSTBP#[3..0]
R101 56R2J-4-GP
1
A6 A5 C4
H5 F21 E1
H_D#[63..0]
DATA GRP 1
15 H_A20M# 15 H_FERR# 15 H_IGNNE#
6 6 6
1 2
6 H_ADSTB#1
A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# ADSTB[1]#
H_ADS# H_BNR# H_BPRI#
1
3
Y2 U5 R3 W6 U4 Y5 U2 R4 T5 T3 W3 W5 Y4 W2 Y1 V4
BR0#
REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#
ADDR GROUP 1
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
DEFER# DRDY# DBSY#
H1 E2 G5
DATA GRP 0
H_REQ#0 K3 H_REQ#1 H2 H_REQ#2 K2 H_REQ#3 J3 H_REQ#4 L5
ADS# BNR# BPRI#
XDP/ITP SIGNALS
H_ADSTB#0 H_REQ#[4..0]
A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#
ADDR GROUP 0
6 6
H_DSTBP#[3..0]
1D05V_S0
THERM
4
J4 L4 M3 K5 M1 N2 J1 N3 P5 P2 L1 P4 P1 R1 L2
H CLK
H_A#[31..3]
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
RESERVED
6
H_A#[31..3]
6
H_DSTBN#[3..0]
3
H_DSTBN#2 6 H_DSTBP#2 6 H_DINV#2 6
H_DSTBN#3 6 H_DSTBP#3 6 H_DINV#3 6 COMP0 COMP1 COMP2 COMP3
R164 1 R1721 R146 1 R1761
27D4R2F-L1-GP 54D9R2F-L1-GP 27D4R2F-L1-GP 54D9R2F-L1-GP
2 2 2 2
2
H_DPRSLP# 15,37 H_DPSLP# 15 H_DPWR# 6 H_PWRGD 15,19 H_CPUSLP# 6,15 PSI# 37
BGA479-SKT6-GPU1 Layout Note: Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5" .
1D05V_S0
XDP_TDI R184 XDP_TMS
1
2
1
XDP_TDO
R186 R185 1
H_CPURST#
R98
DY DY
1
150R2F-1-GP 2 39D2R3F-2-GP 2 54D9R2F-L1-GP
2 54D9R2F-L1-GP 3D3V_S0
XDP_DBRESET#
1
1
R90 XDP_TCK XDP_TRST#
1 R200 R201 1
2 150R2F-1-GP
1
Wistron Corporation
2 27D4R2F-L1-GP 2 680R3F-GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
All place within 2" to CPU
CPU (1 of 2) Size
Document Number
Rev
MP
MYALL2 Date: Thursday, March 30, 2006 A
B
C
D
Sheet E
4
of
57
A
B
C
D
E
VCC_CORE_S0 U34D
VCC_CORE_S0
A4 A8 A11 A14 A16 A19 A23 A26 B6 B8 B11 B13 B16 B19 B21 B24 C5 C8 C11 C14 C16 C19 C2 C22 C25 D1 D4 D8 D11 D13 D16 D19 D23 D26 E3 E6 E8 E11 E14 E16 E19 E21 E24 F5 F8 F11 F13 F16 F19 F2 F22 F25 G4 G1 G23 G26 H3 H6 H21 H24 J2 J5 J22 J25 K1 K4 K23 K26 L3 L6 L21 L24 M2 M5 M22 M25 N1 N4 N23 N26 P3
4
U34C
VCC_SENSE 37 VSS_SENSE 37
1
1
C237
C243
2
C233
2
1
C217
2
1
C209
2
1
C231
2
1
1
C216
2
2
2
2
1 R198 100R2F-L1-GP-U
C188
2
C553
1
37
SCD01U16V2KX-3GP VCC_CORE_S0
VCC_CORE_S0
1
C267
C145 SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U10V2KX-4GP
2
1
C239
2
1
C255
2
1
DY
2
1
C183 SCD1U10V2KX-4GP
2
C246 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line.
2
C184
2
1
VCCSENSE and VSSSENSE lines should be of equal length.
1
Layout Note: R199 100R2F-L1-GP-U
2
BGA479-SKT6-GPU1
H_VID[6..0]
1
H_VID[6..0] H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6
1
AE7
1
VSSSENSE
2
AF7
1D05V_S0
1 2 HCB1608KF121T30-GP 68.00230.041 C554 SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
VCCSENSE
1D5V_S0 L26
SC4D7U6D3V3KX-GP
AD6 AF5 AE5 AF4 AE3 AF2 AE2
1D5V_VCCA_S0
SCD1U10V2KX-4GP
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
C245 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
B26
1 R170 2 0R0402-PAD
SCD1U10V2KX-4GP
VCCA
CPU_V6
SCD1U10V2KX-4GP
V6 G21 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
SCD1U10V2KX-4GP
VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]
Layout Note 1D05V_S0
SCD1U10V2KX-4GP
VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]
2
VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162]
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 AF3 AF6 AF8 AF11 AF13 AF16 AF19 AF21 AF24
4
3
2
BGA479-SKT6-GPU1
ai
tm
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
in
f@
SC10U10V5ZY-1GP
Title
CPU (2 of 2) Size
xa
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
ho
C240
he
1
C241
2
1
C242
2
1
DY
2
1
C191 SC10U10V5ZY-1GP
2
1
C190 SC10U10V5ZY-1GP
2
C148 SC10U10V5ZY-1GP
C
1
C559
2
DY
1
C269
2
1
1
C585
SC10U10V5ZY-1GP
2
1
DY
SC10U10V5ZY-1GP
2
1
C147
SC10U10V5ZY-1GP
2
1
DY
SC10U10V5ZY-1GP
2
1
C266 SC10U10V5ZY-1GP
2
1
C268 SC10U10V5ZY-1GP
B
C146 SC10U10V5ZY-1GP
2
C189 SC10U10V5ZY-1GP
A
C192 SC10U10V5ZY-1GP
2
1
l.c
om
VCC_CORE_S0
1
2
2
VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
1
3
A7 A9 A10 A12 A13 A15 A17 A18 A20 B7 B9 B10 B12 B14 B15 B17 B18 B20 C9 C10 C12 C13 C15 C17 C18 D9 D10 D12 D14 D15 D17 D18 E7 E9 E10 E12 E13 E15 E17 E18 E20 F7 F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20 AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18
VSS[001] VSS[002] VSS[003] VSS[004] VSS[005] VSS[006] VSS[007] VSS[008] VSS[009] VSS[010] VSS[011] VSS[012] VSS[013] VSS[014] VSS[015] VSS[016] VSS[017] VSS[018] VSS[019] VSS[020] VSS[021] VSS[022] VSS[023] VSS[024] VSS[025] VSS[026] VSS[027] VSS[028] VSS[029] VSS[030] VSS[031] VSS[032] VSS[033] VSS[034] VSS[035] VSS[036] VSS[037] VSS[038] VSS[039] VSS[040] VSS[041] VSS[042] VSS[043] VSS[044] VSS[045] VSS[046] VSS[047] VSS[048] VSS[049] VSS[050] VSS[051] VSS[052] VSS[053] VSS[054] VSS[055] VSS[056] VSS[057] VSS[058] VSS[059] VSS[060] VSS[061] VSS[062] VSS[063] VSS[064] VSS[065] VSS[066] VSS[067] VSS[068] VSS[069] VSS[070] VSS[071] VSS[072] VSS[073] VSS[074] VSS[075] VSS[076] VSS[077] VSS[078] VSS[079] VSS[080] VSS[081]
Document Number
Rev
MP
MYALL2 Date: Thursday, March 30, 2006 D
Sheet E
5
of
57
1
A
B
C
D
E
1
H_XRCOMP
R416 24D9R2F-L-GP
2
2
1
H_XSWING R183 100R2F-L1-GP-U
C249 SCD1U16V2ZY-2GP
2
1
3
1
H_YRCOMP
2
R442 24D9R2F-L-GP
2
1D05V_S0
2
1
R430 54D9R2F-L1-GP
H_YSCOMP
1
1D05V_S0
3 CLK_MCH_BCLK 3 CLK_MCH_BCLK#
E1 E2 E4
H_XRCOMP H_XSCOMP H_XSWING
H_YRCOMP H_YSCOMP H_YSWING
Y1 U1 W1
H_YRCOMP H_YSCOMP H_YSWING
AG2 AG1
H_CLKIN H_CLKIN#
2
CALISTOGA
4
1D05V_S0
R196 100R2F-L1-GP-U H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4
H_VREF
H_BNR# 4 H_BPRI# 4 H_BREQ#0 4 H_CPURST# 4 H_DBSY# 4 H_DEFER# 4 H_DPWR# 4 H_DRDY# 4 H_DINV#[3..0]
J7 W8 U3 AB10
H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3
H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3
K4 T7 Y5 AC4
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3
H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
K3 T6 AA5 AC5
H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_HIT# H_HITM# H_LOCK#
D3 D4 B3
H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4
D8 G8 B8 F8 A8
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_RS#_0 H_RS#_1 H_RS#_2
B4 E6 D6
H_RS#0 H_RS#1 H_RS#2
H_SLPCPU# H_TRDY#
E3 E7
3
R192 200R2F-L-GP C262 SCD1U16V2ZY-2GP
4
H_DSTBN#[3..0]
4
H_DSTBP#[3..0]
4
2
H_HIT# 4 H_HITM# 4 H_LOCK# 4 H_REQ#[4..0]
4
H_RS#[2..0]
4
H_CPUSLP# 4,15 H_TRDY# 4
KI.94501.006
C627 SCD1U16V2ZY-2GP
2
1
R440 100R2F-L1-GP-U
E8 B9 C13 J13 C6 F6 C7 B7 A7 C3 J9 H8 K13
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_YSWING
1
2
R431 221R2F-2-GP
H_XRCOMP H_XSCOMP H_XSWING
H_ADS# H_ADSTB#_0 H_ADSTB#_1 H_VREF_0 H_BNR# H_BPRI# H_BREQ#0 H_CPURST# H_DBSY# H_DEFER# H_DPWR# H_DRDY# H_VREF_1
4
1
R180 221R2F-2-GP
H_A#[31..3]
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
2
1
1D05V_S0
H9 C9 E11 G11 F11 G12 F9 H11 J12 G14 D9 J14 H13 J15 F14 D12 A11 C11 A12 A13 E13 G13 F12 B12 B14 C12 A14 C14 D14
1
H_XSCOMP
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8 H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31
2
1
R415 54D9R2F-L1-GP
H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63
2
2
1D05V_S0
F1 J1 H1 J6 H3 K2 G1 G2 K9 K1 K7 J8 H4 J3 K11 G4 T10 W11 T3 U7 U9 U11 T11 W9 T1 T8 T4 W7 U5 T9 W6 T5 AB7 AA9 W4 W3 Y3 Y7 W5 Y10 AB8 W2 AA4 AA7 AA2 AA6 AA10 Y8 AA1 AB4 AC9 AB11 AC11 AB3 AC2 AD1 AD9 AC1 AD7 AC6 AB5 AD10 AD4 AC8
HOST
4
H_A#[31..3]
U39A H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
1
H_D#[63..0]
H_D#[63..0]
2
4
Place them near to the chip ( < 0.5")
1
1
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size
Document Number
GMCH (1 of 5)
Date: Thursday, March 30, 2006 A
B
C
D
Rev
MP
MYALL2
Sheet E
6
of
57
A
B
C
D
E
U39B
M_CKE0 M_CKE1 M_CKE2 M_CKE3
AU20 AT20 BA29 AY29
SM_CKE_0 SM_CKE_1 SM_CKE_2 SM_CKE_3
11,12 11,12 11,12 11,12
M_CS0# M_CS1# M_CS2# M_CS3#
AW13 AW12 AY21 AW21
SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3
M_OCDCOMP0 M_OCDCOMP1
2
M_RCOMPN M_RCOMPP
AF33 AG33 A27 A26 C40 D41
G_CLKIN# G_CLKIN D_REFCLKIN# D_REFCLKIN D_REFSSCLKIN# D_REFSSCLKIN
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3
AE35 AF39 AG35 AH39
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
16 16 16 16
DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3
DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3
AC35 AE39 AF35 AG39
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
16 16 16 16
DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3
DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3
AE37 AF41 AG37 AH41
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
16 16 16 16
DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3
DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3
AC37 AE41 AF37 AG41
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
SDVO_CTRLCLK SDVO_CTRLDATA LT_RESET# NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18
RN17 PM_EXTTS#0 PM_EXTTS#1 CALISTOGA
SRN10KJ-5-GP
1
1
2 R161DUMMY-R2
CFG19
1
2 R162DUMMY-R2
CFG20
1
2 R157DUMMY-R2
CFG3
1
2 R178DUMMY-R2
CFG4
1
2 R187DUMMY-R2
CFG5
1
2 R158DUMMY-R2
CFG6
1
2 R156DUMMY-R2
CFG7
1
2 R166DUMMY-R2
CFG8
1
2 R179DUMMY-R2
CFG9
1
2 R168DUMMY-R2
CFG10
1
2 R167DUMMY-R2
CFG11
1
2 R193DUMMY-R2
CFG12
1
2 R203DUMMY-R2
CFG13
1
2 R165DUMMY-R2
CFG14
1
2 R202DUMMY-R2
CFG15
1
2 R159DUMMY-R2
CFG16
1
2 R197DUMMY-R2
CFG17
2
R217 80D6R2F-L-GP
CFG18
When High 1K Ohm
CFG6: 0=Moby Dick ,1=Calistoga (default)
When Low choice lower than 3.5K Ohm
13 GMCH_TXBOUT013 GMCH_TXBOUT113 GMCH_TXBOUT2-
G30 D30 F29
LB_DATA#_0 LB_DATA#_1 LB_DATA#_2
F30 D29 F28
LB_DATA_0 LB_DATA_1 LB_DATA_2
14 GMCH_HSYNC 14 GMCH_VSYNC
A16 C18 A19
TV_DACA_OUT TV_DACB_OUT TV_DACC_OUT
J20 B16 B18 B19
TV_IREF TV_IRTNA TV_IRTNB TV_IRTNC
GMCH_BLUE GMCH_BLUE# GMCH_GREEN GMCH_GREEN# GMCH_RED GMCH_RED#
E23 D23 C22 B22 A21 B21
CRT_BLUE CRT_BLUE# CRT_GREEN CRT_GREEN# CRT_RED CRT_RED#
GMCH_DDCCLK GMCH_DDCDATA GMCH_HS CRT_IREF GMCH_VS
C26 C25 G23 J22 H23
CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_IREF CRT_VSYNC
UMA 1 UMA 1 UMA 1 UMA 1
GMCH_BLUE
GMCH_RED
R107 UMA 0R2J-2-GP 1 2 GMCH_HS R109 UMA 0R2J-2-GP 1 2 GMCH_VS
2 2 2 2
TV_IREF TV_IRTNA TV_IRTNB TV_IRTNC
CALISTOGA
GMCH_RED#
EXP_A_RXP_0 EXP_A_RXP_1 EXP_A_RXP_2 EXP_A_RXP_3 EXP_A_RXP_4 EXP_A_RXP_5 EXP_A_RXP_6 EXP_A_RXP_7 EXP_A_RXP_8 EXP_A_RXP_9 EXP_A_RXP_10 EXP_A_RXP_11 EXP_A_RXP_12 EXP_A_RXP_13 EXP_A_RXP_14 EXP_A_RXP_15
D34 F38 G34 H38 J34 L38 M34 N38 P34 R38 T34 V38 W34 Y38 AA34 AB38
PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15
EXP_A_TXN_0 EXP_A_TXN_1 EXP_A_TXN_2 EXP_A_TXN_3 EXP_A_TXN_4 EXP_A_TXN_5 EXP_A_TXN_6 EXP_A_TXN_7 EXP_A_TXN_8 EXP_A_TXN_9 EXP_A_TXN_10 EXP_A_TXN_11 EXP_A_TXN_12 EXP_A_TXN_13 EXP_A_TXN_14 EXP_A_TXN_15
F36 G40 H36 J40 L36 M40 N36 P40 R36 T40 V36 W40 Y36 AA40 AB36 AC40
GTXN0 GTXN1 GTXN2 GTXN3 GTXN4 GTXN5 GTXN6 GTXN7 GTXN8 GTXN9 GTXN10 GTXN11 GTXN12 GTXN13 GTXN14 GTXN15
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
C248SCD1U10V2KX-5GP C610SCD1U10V2KX-5GP C254SCD1U10V2KX-5GP C615SCD1U10V2KX-5GP C259SCD1U10V2KX-5GP C618SCD1U10V2KX-5GP C263SCD1U10V2KX-5GP C620SCD1U10V2KX-5GP C272SCD1U10V2KX-5GP C622SCD1U10V2KX-5GP C278SCD1U10V2KX-5GP C628SCD1U10V2KX-5GP C281SCD1U10V2KX-5GP C631SCD1U10V2KX-5GP C286SCD1U10V2KX-5GP C638SCD1U10V2KX-5GP
PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15
EXP_A_TXP_0 EXP_A_TXP_1 EXP_A_TXP_2 EXP_A_TXP_3 EXP_A_TXP_4 EXP_A_TXP_5 EXP_A_TXP_6 EXP_A_TXP_7 EXP_A_TXP_8 EXP_A_TXP_9 EXP_A_TXP_10 EXP_A_TXP_11 EXP_A_TXP_12 EXP_A_TXP_13 EXP_A_TXP_14 EXP_A_TXP_15
D36 F40 G36 H40 J36 L40 M36 N40 P36 R40 T36 V40 W36 Y40 AA36 AB40
GTXP0 GTXP1 GTXP2 GTXP3 GTXP4 GTXP5 GTXP6 GTXP7 GTXP8 GTXP9 GTXP10 GTXP11 GTXP12 GTXP13 GTXP14 GTXP15
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
C251SCD1U10V2KX-5GP C608SCD1U10V2KX-5GP C253SCD1U10V2KX-5GP C612SCD1U10V2KX-5GP C257SCD1U10V2KX-5GP C617SCD1U10V2KX-5GP C261SCD1U10V2KX-5GP C619SCD1U10V2KX-5GP C271SCD1U10V2KX-5GP C621SCD1U10V2KX-5GP C275SCD1U10V2KX-5GP C624SCD1U10V2KX-5GP C279SCD1U10V2KX-5GP C630SCD1U10V2KX-5GP C283SCD1U10V2KX-5GP C635SCD1U10V2KX-5GP
PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15
RN58 G72 SRN0J-6-GP 2 3 1 4
R148 UMA 150R2F-1-GP 1 2
R151 0R2J-2-GP G72 GMCH_GREEN# 1 2
R154 UMA 150R2F-1-GP GMCH_GREEN 1 2
CRT_IREF
R408 G72 0R2J-2-GP 1 2 R195 G72 0R2J-2-GP 1 2
GMCH_BLUE
GMCH_RED 1D05V_S0
GMCH_BLUE#
R149 0R2J-2-GP G72 1 2
R409 G72 0R2J-2-GP 1 2
GMCH_RED#
R147 0R2J-2-GP UMA 1 2
TV_DACC
GMCH_RED
R153 UMA 150R2F-1-GP 1 2
R155 0R2J-2-GP UMA GMCH_GREEN# 1 2
TV_DACA TV_DACB
TV_DACA
R413 UMA 150R2F-1-GP 1 2
1 2
TV_DACB
R400 UMA 150R2F-1-GP 1 2
GMCH_BLUE#
TV_IREF TV_IRTNA
RN49 G72 SRN0J-6-GP 1 4 2 3
TV_DACC
R398 UMA 150R2F-1-GP 1 2
TV_IRTNB TV_IRTNC
RN8 G72 SRN0J-6-GP 1 4 2 3
CRT_IREF
R150 0R2J-2-GP UMA 1 2 R191 255R2F-L-GP UMA 1 2
PEG_RXN[15..0]
PEG_RXN[15..0] 46 4
PEG_RXP[15..0]
PEG_RXP[15..0] 46
3
PEG_TXN[15..0]
PEG_TXN[15..0] 46
PEG_TXP[15..0]
PEG_TXP[15..0] 46
2
KI.94501.006
GMCH_BLUE GMCH_GREEN
R152 0R2J-2-GP G72 1 2
PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15
RN18 UMA SRN100KJ-6-GP 1D05V_S0
BL_ON 2 GMCH_LCDVDD_ON 1
LIBG
GMCH_VS GMCH_HS
RN59 G72 SRN0J-6-GP 4 3
3 4
R181 UMA 1K5R2F-2-GP 1 2 RN11 G72 SRN0J-6-GP 2 3 1 4
RN9 UMA SRN10KJ-5-GP 2 1
LCTLA_CLK LCTLB_DATA
3 4
CLK_DDC_EDID DAT_DDC_EDID
RN16 UMA SRN10KJ-5-GP 3 2 4 1
3D3V_S0
1D5V_S0
1
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
GMCH (2 of 5) Size
Document Number
Rev
MP
MYALL2 D
Sheet
7
of
57
E
l.c
C
ai
B
om
Date: Thursday, March 30, 2006 A
tm
M_RCOMPP
2 R163DUMMY-R2
LA_DATA#_0 LA_DATA#_1 LA_DATA#_2
LA_DATA_0 LA_DATA_1 LA_DATA_2
14 GMCH_GREEN 14
C37 B35 A37
B37 B34 A36
R389 4K99R2F-L-GP R385 0R2J-2-GP R106 0R2J-2-GP R108 0R2J-2-GP
14
LA_CLK# LA_CLK LB_CLK# LB_CLK
13 GMCH_TXAOUT0+ 13 GMCH_TXAOUT1+ 13 GMCH_TXAOUT2+
G28 PM_BMBUSY# 16 F25 PM_EXTTS#0 13 GMCH_TXBOUT0+ R2130R2J-2-GP DY H26 PM_EXTTS#1 13 GMCH_TXBOUT1+ G6 PM_THRMTRIP-A# 4 13 GMCH_TXBOUT2+ AH33 1 2 VGATE_PWRGD 16,37 R215 0R2J-2-GP AH34 1 2 R212 1 2 PWROK 16,19 100R2J-2-GP PLT_RST1# 16,18,22,26,31,32,34,46,51 TV_DACA TP45 TPAD30 H28 14 TV_DACA TV_DACB TP44 TPAD30 H27 14 TV_DACB TV_DACC K28 MCH_ICH_SYNC# 16 14 TV_DACC D1 C41 C1 BA41 BA40 BA39 BA3 BA2 BA1 3D3V_S0 B41 RN10 DY B2 SRN10KJ-5-GP AY41 AY1 4 1 AW41 3 2 AW1 A40 A4 14 GMCH_DDCCLK A39 14 GMCH_DDCDATA A3
A33 A32 E27 E26
F34 G38 H34 J38 L34 M38 N34 P38 R34 T38 V34 W38 Y34 AA38 AB34 AC38
ho
2
M_RCOMPN
1
R216 80D6R2F-L-GP
13 GMCH_TXAOUT013 GMCH_TXAOUT113 GMCH_TXAOUT2-
KI.94501.006
3D3V_S0 1
GMCH_TXACLKGMCH_TXACLK+ GMCH_TXBCLKGMCH_TXBCLK+
EXP_A_RXN_0 EXP_A_RXN_1 EXP_A_RXN_2 EXP_A_RXN_3 EXP_A_RXN_4 EXP_A_RXN_5 EXP_A_RXN_6 EXP_A_RXN_7 EXP_A_RXN_8 EXP_A_RXN_9 EXP_A_RXN_10 EXP_A_RXN_11 EXP_A_RXN_12 EXP_A_RXN_13 EXP_A_RXN_14 EXP_A_RXN_15
f@
1D8V_S3
4 3
13 13 13 13
D40 D38
in
1 2
CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
R419 24D9R2F-L-GP 2 1 1D5V_PCIE_S0
EXP_A_COMPI EXP_A_COMPO
xa
2
1
PM_BMBUSY# PM_EXTTS#_0 PM_EXTTS#_1 PM_THRMTRIP# PWROK RSTIN#
13 GMCH_LCDVDD_ON CPU_SEL0 3,4 CPU_SEL1 3,4 CPU_SEL2 3,4
L_BKLTCTL L_BKLTEN L_CLKCTLA L_CLKCTLB L_DDC_CLK L_DDC_DATA L_IBG L_VBG L_VDDEN L_VREFH L_VREFL
he
2
1
DREFCLK# DREFCLK DREFSSCLK# DREFSSCLK
BL_ON
D32 J30 H30 H29 G26 G25 B38 C35 F32 C33 C32
VGA
SM_VREF_0 SM_VREF_1
31
13 CLK_DDC_EDID 13 DAT_DDC_EDID TPAD30 TP30 TPAD30 TP37
TPAD30 BL_ON LCTLA_CLK LCTLB_DATA CLK_DDC_EDID DAT_DDC_EDID LIBG L_LVBG GMCH_LCDVDD_ON
TV
AK1 AK41
NC
SM_RCOMP# SM_RCOMP
MISC
3D3V_S0
16 16 16 16
SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3
PM
3 CLK_MCH_3GPLL# 3 CLK_MCH_3GPLL 3 DREFCLK# 3 DREFCLK 3 DREFSSCLK# 3 DREFSSCLK
BA13 BA12 AY20 AU21 AV9 AT9
C649 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
3
2
C298
1
DDR_VREF_S3
SM_OCDCOMP_0 SM_OCDCOMP_1
K16 K18 J18 F18 E15 F15 E18 D19 D16 G16 E16 D15 G15 K15 C15 H16 G18 H15 J25 K27 J26
U39C TP36
LVDS
R214DY R209 DY 11,12 M_ODT0 40D2R2F-GP 40D2R2F-GP 11,12 M_ODT1 11,12 M_ODT2 11,12 M_ODT3
AL20 AF10
CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20
for calistoga configuration
GRAPHICS
11,12 11,12 11,12 11,12
H32 T32 R32 F3 F7 AG11 AF11 H7 J19 K30 J29 A41 A35 A34 D28 D27
PCI-EXPRESS
SM_CK#_0 SM_CK#_1 SM_CK#_2 SM_CK#_3
MUXING
AW35 AT1 AY7 AY40
DDR
M_CLK_DDR#0 M_CLK_DDR#1 M_CLK_DDR#2 M_CLK_DDR#3
CLK
11 11 11 11
RSVD_0 RSVD_1 RSVD_2 RSVD_3 RSVD_4 RSVD_5 RSVD_6 RSVD_7 RSVD_8 RSVD_9 RSVD_10 RSVD_11 RSVD_12 RSVD_13 RSVD_14 RSVD_15
DMI
SM_CK_0 SM_CK_1 SM_CK_2 SM_CK_3
1
1
AY35 AR1 AW7 AW40
CFG
2
M_CLK_DDR0 M_CLK_DDR1 M_CLK_DDR2 M_CLK_DDR3
RSVD
4
11 11 11 11
A
B
C
D
E
4
4
2
CALISTOGA
AU12 AV14 BA20
SA_CAS# SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
AY13 AJ33 AM35 AL26 AN22 AM14 AL9 AR3 AH4
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
AK33 AT33 AN28 AM22 AN12 AN8 AP3 AG5 AK32 AU33 AN27 AM21 AM12 AL8 AN3 AH5
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13
AY16 AU14 AW16 BA16 BA17 AU16 AV17 AU17 AW17 AT16 AU13 AT17 AV20 AV12
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13
SA_RAS# SA_RCVENIN# SA_RCVENOUT# SA_WE#
AW14 AK23 AK24 AY14
SA_RCVENIN# SA_RCVENOUT#
M_A_DM[7..0] M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 M_A_DQS[7..0]
M_A_DQS#[7..0]
M_A_A[13..0]
TP54 TPAD30 TP53 TPAD30
M_A_BS#0 11,12 M_A_BS#1 11,12 M_A_BS#2 11,12 M_A_CAS# 11,12 M_A_DM[7..0] 11
M_A_DQS[7..0] 11
M_A_DQS#[7..0] 11
M_A_A[13..0] 11,12
M_A_RAS# 11,12 M_A_WE# 11,12
Place Test PAD Near to Chip as could as possible
SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63
B
SA_BS_0 SA_BS_1 SA_BS_2
AK39 AJ37 AP39 AR41 AJ38 AK38 AN41 AP41 AT40 AV41 AU38 AV38 AP38 AR40 AW38 AY38 BA38 AV36 AR36 AP36 BA36 AU36 AP35 AP34 AY33 BA33 AT31 AU29 AU31 AW31 AV29 AW29 AM19 AL19 AP14 AN14 AN17 AM16 AP15 AL15 AJ11 AH10 AJ9 AN10 AK13 AH11 AK10 AJ8 BA10 AW10 BA4 AW4 AY10 AY9 AW5 AY5 AV4 AR5 AK4 AK3 AT4 AK5 AJ5 AJ3
MEMORY
MEMORY
SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63
SYSTEM
3
AJ35 AJ34 AM31 AM33 AJ36 AK35 AJ32 AH31 AN35 AP33 AR31 AP31 AN38 AM36 AM34 AN33 AK26 AL27 AM26 AN24 AK28 AL28 AM24 AP26 AP23 AL22 AP21 AN20 AL23 AP24 AP20 AT21 AR12 AR14 AP13 AP12 AT13 AT12 AL14 AL12 AK9 AN7 AK8 AK7 AP9 AN9 AT5 AL5 AY2 AW2 AP1 AN2 AV2 AT3 AN1 AL2 AG7 AF9 AG4 AF6 AG9 AH6 AF4 AF8
A
U39D M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
U39E M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
SYSTEM
M_A_DQ[63..0]
DDR
11 M_A_DQ[63..0]
M_B_DQ[63..0]
DDR
11 M_B_DQ[63..0]
SB_BS_0 SB_BS_1 SB_BS_2
AT24 AV23 AY28
SB_CAS# SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
AR24 AK36 AR38 AT36 BA31 AL17 AH8 BA5 AN4
M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7
AM39 AT39 AU35 AR29 AR16 AR10 AR7 AN5 AM40 AU39 AT35 AP29 AP16 AT10 AT7 AP5
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13
AY23 AW24 AY24 AR28 AT27 AT28 AU27 AV28 AV27 AW27 AV24 BA27 AY27 AR23
SB_RAS# SB_RCVENIN# SB_RCVENOUT# SB_WE#
AU23 AK16 AK18 AR27
M_B_BS#0 11,12 M_B_BS#1 11,12 M_B_BS#2 11,12 M_B_CAS# 11,12 M_B_DM[7..0] 11
M_B_DM[7..0]
M_B_DQS[7..0]
M_B_DQS[7..0] 11
3
M_B_DQS#[7..0]
M_B_DQS#[7..0] 11
M_B_A[13..0]
M_B_A[13..0] 11,12
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13
M_B_RAS# 11,12 TP52 TPAD30 TP51 TPAD30
SB_RCVENIN# SB_RCVENOUT#
2
M_B_WE# 11,12
Place Test PAD Near to Chip ascould as possible
CALISTOGA
KI.94501.006
KI.94501.006
1
1
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
GMCH (3 of 5) Size
Document Number
Rev
MP
MYALL2 Date: Thursday, March 30, 2006 A
B
C
D
Sheet E
8
of
57
A
B
C
D
E
2D5V_S0
UMA
E19 F19 C20 D20 E20 F20
VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1
AH1 AH2
VCCD_HMPLL0 VCCD_HMPLL1
1 R405 0R3-0-U-GP UMA
A28 B28 C28
VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2
1D5V_TVDAC_S0
D21
VCCD_TVDAC
A23 B23 B25
VCC_HV0 VCC_HV1 VCC_HV2
H19
VCCD_QTVDAC
V_DACB
1D5V_DPLLB
1 C599 SC10U10V5ZY-1GP
2
1 2
1 2 HCB1608KF121T30-GP 68.00230.041
R1341
2 0R2J-2-GP
C598 SCD1U10V2KX-4GP
1D5V_S0
L38 1D5V_HPLL_S0
2
R404 G72 0R3-0-U-GP 1
2
1
1
1 2 HCB1608KF121T30-GP 68.00230.041
R177 0R0603-PAD 2 1 1D5V_S0
2
C643
2
C644
2
1
C587 SC10U10V5ZY-1GP
2
1 2
R406 0R0603-PAD 2 1 3D3V_S0
1
1
1D5V_MPLL_S0 1 2 HCB1608KF121T30-GP SC10U10V5ZY-1GP SCD1U10V2KX-4GP 68.00230.041 C641 C639 SC10U10V5ZY-1GP SCD1U10V2KX-4GP
C247 SCD1U10V2KX-4GP
2
1
L34
2
V_DACC
G72
C593 SCD1U10V2KX-4GP
2
D9 UMA BAT54-4-GP
1
1D5V_S0
1D5V_QTVDAC_S0
1
1D5V_S0
R194 0R0603-PAD 2 1
1
3
2
R118 10R2J-2-GP
2
C256 SCD1U10V2KX-4GP
VCCA_CRTDAC R132 G72 0R3-0-U-GP 1 2
2 2
C229
SC10U10V5ZY-1GP
UMA
1 2
C296
SCD1U10V2KX-4GP
1 2
1
C293
SCD1U10V2KX-4GP
C226
C290
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
C227
2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C214
C228
R128 0R3-0-U-GP UMA V_TVBG 2 1
1
1 2
Divide by Trace (Layout Rule approve)
R129 UMA 0R3-0-U-GP V_DACC 2 1
2
2 3D3V_S0
L12 UMA HCB1608KF121T30-GP 1 2 68.00230.041
2
UMA
2
1
R119 10R2J-2-GP
2 1
1D5V_S0
R131 UMA 0R3-0-U-GP V_DACB 2 1
1
3D3V_TVDAC
R130 UMA 0R3-0-U-GP V_DACA 1
2
3
SCD1U10V2KX-4GP
2
D10 UMA BAT54-4-GP 1
1
1D5V_S0
1D5V_S0
C252
1
2D5V_S0
L14 UMA 2D5V_CRTDAC R133 UMA HCB1608KF121T30-GP 0R5J-6-GP 1 2 2 1 68.00230.041
1
2
UMA
C292
AK31 AF31 AE31 AC31 AL30 AK30 AJ30 AH30 AG30 AF30 AE30 AD30 AC30 AG29 AF29 AE29 AD29 AC29 AG28 AF28 AE28 AH22 AJ21 AH21 AJ20 AH20 AH19 P19 P16 AH15 P15 AH14 AG14 AF14 AE14 Y14 AF13 AE13 AF12 AE12 AD12
POWER
VCCAUX0 VCCAUX1 VCCAUX2 VCCAUX3 VCCAUX4 VCCAUX5 VCCAUX6 VCCAUX7 VCCAUX8 VCCAUX9 VCCAUX10 VCCAUX11 VCCAUX12 VCCAUX13 VCCAUX14 VCCAUX15 VCCAUX16 VCCAUX17 VCCAUX18 VCCAUX19 VCCAUX20 VCCAUX21 VCCAUX22 VCCAUX23 VCCAUX24 VCCAUX25 VCCAUX26 VCCAUX27 VCCAUX28 VCCAUX29 VCCAUX30 VCCAUX31 VCCAUX32 VCCAUX33 VCCAUX34 VCCAUX35 VCCAUX36 VCCAUX37 VCCAUX38 VCCAUX39 VCCAUX40
VCCP_GMCH_CAP3
2
C600 SCD47U10V3ZY-GP 2
VCCP_GMCH_CAP2 VCCP_GMCH_CAP1 C634 SCD47U10V3ZY-GP
C250 SCD22U16V3ZY-GP
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
SCD1U10V2KX-4GP CALISTOGA
GMCH (4 of 5)
KI.94501.006 Size
SCD1U10V2KX-4GP
Document Number
Rev
MP
MYALL2 Date: Friday, March 24, 2006
A
1
1 2
3
om
L30
V_DACA
VCCA_TVBG VSSA_TVBG
l.c
C597 SCD1U10V2KX-4GP
VCCA_MPLL
ai
RN14 G72 SRN0J-6-GP 1 4 2 3
VCCA_LVDS VSSA_LVDS
tm
1D5V_S0
A38 R182 2 1 0R2J-2-GP UMA B39 C595UMA SCD1U10V2KX-4GP R138G72 1D5V_MPLL_S0 AF2 0R2J-2-GP H20 1 2 V_TVBG G20
ho
1 C596 SC10U10V5ZY-1GP
2
1 2
1 2 HCB1608KF121T30-GP 68.00230.041
3
VCCA_DPLLA VCCA_DPLLB VCCA_HPLL
f@
1D5V_DPLLA
B26 C39 AF1
he
UMA
VCCA_CRTDAC0 VCCA_CRTDAC1 VSSA_CRTDAC
4
C274 C288 SC2D2U6D3V3MX-1-GP SC4D7U10V5ZY-3GP
in
L29
F21 E21 G21
C280 SCD1U10V2KX-4GP
xa
R401 G72 0R2J-2-GP 2 1
2
1
2D5V_S0 1D5V_S0
VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6 VCCA_3GPLL VCCA_3GBG VSSA_3GBG
1
1D5V_DPLLA 1D5V_DPLLB 1D5V_HPLL_S0
R613 UMA 0R3-0-U-GP 1 2
VCC_TXLVDS0 VCC_TXLVDS1 VCC_TXLVDS2
AC14 AB14 W14 V14 T14 R14 P14 N14 M14 L14 AD13 AC13 AB13 AA13 Y13 W13 V13 U13 T13 R13 N13 M13 L13 AB12 AA12 Y12 W12 V12 U12 T12 R12 P12 N12 M12 L12 R11 P11 N11 M11 R10 P10 N10 M10 P9 N9 M9 R8 P8 N8 M8 P7 N7 M7 R6 P6 M6 A6 R5 P5 N5 M5 P4 N4 M4 R3 P3 N3 M3 R2 P2 M2 D2 AB1 R1 P1 N1 M1
2
VCCA_CRTDAC
SCD1U10V2KX-4GP
VTT_0 VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8 VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25 VTT_26 VTT_27 VTT_28 VTT_29 VTT_30 VTT_31 VTT_32 VTT_33 VTT_34 VTT_35 VTT_36 VTT_37 VTT_38 VTT_39 VTT_40 VTT_41 VTT_42 VTT_43 VTT_44 VTT_45 VTT_46 VTT_47 VTT_48 VTT_49 VTT_50 VTT_51 VTT_52 VTT_53 VTT_54 VTT_55 VTT_56 VTT_57 VTT_58 VTT_59 VTT_60 VTT_61 VTT_62 VTT_63 VTT_64 VTT_65 VTT_66 VTT_67 VTT_68 VTT_69 VTT_70 VTT_71 VTT_72 VTT_73 VTT_74 VTT_75 VTT_76
1
2D5V_3GBG_S0
AJ41 AB41 Y41 V41 R41 N41 L41 AC33 G41 H41
1D05V_S0
VCCSYNC
2
C289
C30 B30 A30
1
C284
C294
H22
2
1
U39H C260 UMA SCD1U10V2KX-4GP R403G72 VCC_TXLVD 1 0R3-0-U-GP 2
2 1
C297
2
UMA
SCD1U10V2KX-4GP 2 1
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP 2 1
C285
2
1D5V_S0
1
R208 0R0603-PAD 1D5V_3GPLL_S0 2 1
2
1
1D5V_S0
2
C592 SCD1U10V2KX-4GP
1D5V_PCIE_S0 R211 0R0805-PAD 1 2 C291
SC4D7U6D3V3KX-GP 2 1
R410 0R0603-PAD 2 1
4
UMA
2
1
1
R190G72 0R2J-2-GP 1 2
2D5V_S0
SC4D7U6D3V3KX-GP 2 1
2D5V_3GBG_S0
R402 0R3-0-U-GP
R414 0R3-0-U-GP
C591 SCD1U10V2KX-4GP
2
SC4D7U6D3V3KX-GP
VCC_TXLVD
2
C588
1
1
2D5V_S0
B
C
D
Sheet E
9
of
57
1
A
1D05V_S0
AC41 AA41 W41 T41 VCC_NCTF0 P41 VCC_NCTF1 VSS_NCTF0 AE27 M41 VCC_NCTF2 VSS_NCTF1 AE26 J41 VCC_NCTF3 VSS_NCTF2 AE25 F41 VCC_NCTF4 VSS_NCTF3 AE24 AV40 VCC_NCTF5 VSS_NCTF4 AE23 AP40 VCC_NCTF6 VSS_NCTF5 AE22 AN40 VCC_NCTF7 VSS_NCTF6 AE21 AK40 VCC_NCTF8 VSS_NCTF7 AE20 AJ40 VCC_NCTF9 VSS_NCTF8 AE19 AH40 VCC_NCTF10 VSS_NCTF9 AE18 AG40 VCC_NCTF11 VSS_NCTF10 AC17 Y17 AF40 VCC_NCTF12 VSS_NCTF11 AE40 VCC_NCTF13 VSS_NCTF12 U17 B40 VCC_NCTF14 AY39 VCC_NCTF15 AW39 VCC_NCTF16 AV39 VCC_NCTF17 AR39 VCC_NCTF18 AN39 VCC_NCTF19 VCCAUX_NCTF0 AG27 AJ39 1D5V_S0 VCC_NCTF20 VCCAUX_NCTF1 AF27 AC39 VCC_NCTF21 VCCAUX_NCTF2 AG26 AB39 VCC_NCTF22 VCCAUX_NCTF3 AF26 AG25 AA39 VCC_NCTF23 VCCAUX_NCTF4 Y39 VCC_NCTF24 VCCAUX_NCTF5 AF25 W39 VCC_NCTF25 VCCAUX_NCTF6 AG24 V39 VCC_NCTF26 VCCAUX_NCTF7 AF24 AG23 T39 VCC_NCTF27 VCCAUX_NCTF8 R39 VCC_NCTF28 VCCAUX_NCTF9 AF23 P39 VCC_NCTF29 VCCAUX_NCTF10 AG22 N39 VCC_NCTF30 VCCAUX_NCTF11 AF22 M39 VCC_NCTF31 VCCAUX_NCTF12 AG21 L39 VCC_NCTF32 VCCAUX_NCTF13 AF21 J39 VCC_NCTF33 VCCAUX_NCTF14 AG20 H39 VCC_NCTF34 VCCAUX_NCTF15 AF20 AG19 G39 VCC_NCTF35 VCCAUX_NCTF16 F39 VCC_NCTF36 VCCAUX_NCTF17 AF19 D39 VCC_NCTF37 VCCAUX_NCTF18 R19 AT38 VCC_NCTF38 VCCAUX_NCTF19 AG18 AF18 AM38 VCC_NCTF39 VCCAUX_NCTF20 AH38 VCC_NCTF40 VCCAUX_NCTF21 R18 AG38 VCC_NCTF41 VCCAUX_NCTF22 AG17 AF38 VCC_NCTF42 VCCAUX_NCTF23 AF17 AE17 AE38 VCC_NCTF43 VCCAUX_NCTF24 C38 VCC_NCTF44 VCCAUX_NCTF25 AD17 AK37 VCC_NCTF45 VCCAUX_NCTF26 AB17 AH37 VCC_NCTF46 VCCAUX_NCTF27 AA17 AB37 VCC_NCTF47 VCCAUX_NCTF28 W17 AA37 VCC_NCTF48 VCCAUX_NCTF29 V17 Y37 VCC_NCTF49 VCCAUX_NCTF30 T17 R17 W37 VCC_NCTF50 VCCAUX_NCTF31 V37 VCC_NCTF51 VCCAUX_NCTF32 AG16 T37 VCC_NCTF52 VCCAUX_NCTF33 AF16 R37 VCC_NCTF53 VCCAUX_NCTF34 AE16 P37 VCC_NCTF54 VCCAUX_NCTF35 AD16 N37 VCC_NCTF55 VCCAUX_NCTF36 AC16 M37 VCC_NCTF56 VCCAUX_NCTF37 AB16 L37 VCC_NCTF57 VCCAUX_NCTF38 AA16 Y16 J37 VCC_NCTF58 VCCAUX_NCTF39 H37 VCC_NCTF59 VCCAUX_NCTF40 W16 G37 VCC_NCTF60 VCCAUX_NCTF41 V16 F37 VCC_NCTF61 VCCAUX_NCTF42 U16 D37 VCC_NCTF62 VCCAUX_NCTF43 T16 AY36 VCC_NCTF63 VCCAUX_NCTF44 R16 AW36 VCC_NCTF64 VCCAUX_NCTF45 AG15 AN36 VCC_NCTF65 VCCAUX_NCTF46 AF15 AH36 VCC_NCTF66 VCCAUX_NCTF47 AE15 AG36 VCC_NCTF67 VCCAUX_NCTF48 AD15 AC15 AF36 VCC_NCTF68 VCCAUX_NCTF49 AE36 VCC_NCTF69 VCCAUX_NCTF50 AB15 AC36 VCC_NCTF70 VCCAUX_NCTF51 AA15 C36 VCC_NCTF71 VCCAUX_NCTF52 Y15 B36 VCC_NCTF72 VCCAUX_NCTF53 W15 BA35 VCCAUX_NCTF54 V15 AV35 VCCAUX_NCTF55 U15 AR35 VCCAUX_NCTF56 T15 AH35 VCCAUX_NCTF57 R15 AB35 CALISTOGA KI.94501.006 AA35 Y35 W35 V35 T35 R35 P35 N35 C273 C276 C265 C287 C264 C270 C282 TC13 M35 ST220U2VBM-3GP SC10U10V5ZY-1GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP L35 SC10U10V5ZY-1GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP J35 H35 G35 Place these Caps close VCC_0 ~ VCC_110 F35 D35 AN34 1D8V_S3 U39F
AD27 AC27 AB27 AA27 Y27 W27 V27 U27 T27 R27 AD26 AC26 AB26 AA26 Y26 W26 V26 U26 T26 R26 AD25 AC25 AB25 AA25 Y25 W25 V25 U25 T25 R25 AD24 AC24 AB24 AA24 Y24 W24 V24 U24 T24 R24 AD23 V23 U23 T23 R23 AD22 V22 U22 T22 R22 AD21 V21 U21 T21 R21 AD20 V20 U20 T20 R20 AD19 V19 U19 T19 AD18 AC18 AB18 AA18 Y18 W18 V18 U18 T18
1
1
1
1
1
1
1
2
2
2
2
2
2
NCTF
2
VSS_0 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96
VSS
E
VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179
AK34 AG34 AF34 AE34 AC34 C34 AW33 AV33 AR33 AE33 AB33 Y33 V33 T33 R33 M33 H33 G33 F33 D33 B33 AH32 AG32 AF32 AE32 AC32 AB32 G32 B32 AY31 AV31 AN31 AJ31 AG31 AB31 Y31 AB30 E30 AT29 AN29 AB29 T29 N29 K29 G29 E29 C29 B29 A29 BA28 AW28 AU28 AP28 AM28 AD28 AC28 W28 J28 E28 AP27 AM27 AK27 J27 G27 F27 C27 B27 AN26 M26 K26 F26 D26 AK25 P25 K25 H25 E25 D25 A25 BA24 AU24 AL24 AW23
U39J
AT23 AN23 AM23 AH23 AC23 W23 K23 J23 F23 C23 AA22 K22 G22 F22 E22 D22 A22 BA21 AV21 AR21 AN21 AL21 AB21 Y21 P21 K21 J21 H21 C21 AW20 AR20 AM20 AA20 K20 B20 A20 AN19 AC19 W19 K19 G19 C19 AH18 P18 H18 D18 A18 AY17 AR17 AP17 AM17 AK17 AV16 AN16 AL16 J16 F16 C16 AN15 AM15 AK15 N15 M15 L15 B15 A15 BA14 AT14 AK14 AD14 AA14 U14 K14 H14 E14 AV13 AR13 AN13 AM13 AL13 AG13 P13 F13 D13 B13 AY12 AC12 K12 H12 E12 AD11 AA11 Y11
VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 CALISTOGA
C302
C303
DY
C301
C304
C677
B
C
J11 D11 B11 AV10 AP10 AL10 AJ10 AG10 AC10 W10 U10 BA9 AW9 AR9 AH9 AB9 Y9 R9 G9 E9 A9 AG8 AD8 AA8 U8 K8 C8 BA7 AV7 AP7 AL7 AJ7 AH7 AF7 AC7 R7 G7 D7 AG6 AD6 AB6 Y6 U6 N6 K6 H6 B6 AV5 AF5 AD5 AY4 AR4 AP4 AL4 AJ4 Y4 U4 R4 J4 F4 C4 AY3 AW3 AV3 AL3 AH3 AG3 AF3 AD3 AC3 AA3 G3 AT2 AR2 AP2 AK2 AJ2 AD2 AB2 Y2 U2 T2 N2 J2 H2 F2 C2 AL1
4
3
2
KI.94501.006
1
Wistron Corporation
C295
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
GMCH (5 of 5) Size
Document Number
Rev
MP
MYALL2 Date: Friday, March 24, 2006
A
VSS
VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360
KI.94501.006 SCD1U16V2ZY-2GP 2 1
C679
SCD1U16V2ZY-2GP 2 1
C678
SCD1U16V2ZY-2GP 2 1
C299
SCD1U16V2ZY-2GP 2 1
DY
SCD1U10V2KX-4GP 2 1
CALISTOGA KI.94501.006
C680
SCD1U10V2KX-4GP 2 1
TC5
SCD1U10V2KX-4GP 2 1
CALISTOGA
SCD1U10V2KX-4GP 2 1
VCC
VCC_SM_0 VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35 VCC_SM_36 VCC_SM_37 VCC_SM_38 VCC_SM_39 VCC_SM_40 VCC_SM_41 VCC_SM_42 VCC_SM_43 VCC_SM_44 VCC_SM_45 VCC_SM_46 VCC_SM_47 VCC_SM_48 VCC_SM_49 VCC_SM_50 VCC_SM_51 VCC_SM_52 VCC_SM_53 VCC_SM_54 VCC_SM_55 VCC_SM_56 VCC_SM_57 VCC_SM_58 VCC_SM_59 VCC_SM_60 VCC_SM_61 VCC_SM_62 VCC_SM_63 VCC_SM_64 VCC_SM_65 VCC_SM_66 VCC_SM_67 VCC_SM_68 VCC_SM_69 VCC_SM_70 VCC_SM_71 VCC_SM_72 VCC_SM_73 VCC_SM_74 VCC_SM_75 VCC_SM_76 VCC_SM_77 VCC_SM_78 VCC_SM_79 VCC_SM_80 VCC_SM_81 VCC_SM_82 VCC_SM_83 VCC_SM_84 VCC_SM_85 VCC_SM_86 VCC_SM_87 VCC_SM_88 VCC_SM_89 VCC_SM_90 VCC_SM_91 VCC_SM_92 VCC_SM_93 VCC_SM_94 VCC_SM_95 VCC_SM_96 VCC_SM_97 VCC_SM_98 VCC_SM_99 VCC_SM_100 VCC_SM_101 VCC_SM_102 VCC_SM_103 VCC_SM_104 VCC_SM_105 VCC_SM_106 VCC_SM_107
AU41 AT41 AM41 AU40 BA34 AY34 AW34 AV34 AU34 AT34 AR34 BA30 AY30 AW30 AV30 AU30 AT30 AR30 AP30 AN30 AM30 AM29 AL29 AK29 AJ29 AH29 AJ28 AH28 AJ27 AH27 BA26 AY26 AW26 AV26 AU26 AT26 AR26 AJ26 AH26 AJ25 AH25 AJ24 AH24 BA23 AJ23 BA22 AY22 AW22 AV22 AU22 AT22 AR22 AP22 AK22 AJ22 AK21 AK20 BA19 AY19 AW19 AV19 AU19 AT19 AR19 AP19 AK19 AJ19 AJ18 AJ17 AH17 AJ16 AH16 BA15 AY15 AW15 AV15 AU15 AT15 AR15 AJ15 AJ14 AJ13 AH13 AK12 AJ12 AH12 AG12 AK11 BA8 AY8 AW8 AV8 AT8 AR8 AP8 BA6 AY6 AW6 AV6 AT6 AR6 AP6 AN6 AL6 AK6 AJ6 AV1 AJ1
SCD1U10V2KX-4GP 2 1
1
VCC_0 VCC_1 VCC_2 VCC_3 VCC_4 VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12 VCC_13 VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34 VCC_35 VCC_36 VCC_37 VCC_38 VCC_39 VCC_40 VCC_41 VCC_42 VCC_43 VCC_44 VCC_45 VCC_46 VCC_47 VCC_48 VCC_49 VCC_50 VCC_51 VCC_52 VCC_53 VCC_54 VCC_55 VCC_56 VCC_57 VCC_58 VCC_59 VCC_60 VCC_61 VCC_62 VCC_63 VCC_64 VCC_65 VCC_66 VCC_67 VCC_68 VCC_69 VCC_70 VCC_71 VCC_72 VCC_73 VCC_74 VCC_75 VCC_76 VCC_77 VCC_78 VCC_79 VCC_80 VCC_81 VCC_82 VCC_83 VCC_84 VCC_85 VCC_86 VCC_87 VCC_88 VCC_89 VCC_90 VCC_91 VCC_92 VCC_93 VCC_94 VCC_95 VCC_96 VCC_97 VCC_98 VCC_99 VCC_100 VCC_101 VCC_102 VCC_103 VCC_104 VCC_105 VCC_106 VCC_107 VCC_108 VCC_109 VCC_110
SC10U10V5ZY-1GP 2 1
2
D
U39I
1
3
C
2
4
B
U39G
AA33 W33 P33 N33 L33 J33 AA32 Y32 W32 V32 P32 N32 M32 L32 J32 AA31 W31 V31 T31 R31 P31 N31 M31 AA30 Y30 W30 V30 U30 T30 R30 P30 N30 M30 L30 AA29 Y29 W29 V29 U29 R29 P29 M29 L29 AB28 AA28 Y28 V28 U28 T28 R28 P28 N28 M28 L28 P27 N27 M27 L27 P26 N26 L26 N25 M25 L25 P24 N24 M24 AB23 AA23 Y23 P23 N23 M23 L23 AC22 AB22 Y22 W22 P22 N22 M22 L22 AC21 AA21 W21 N21 M21 L21 AC20 AB20 Y20 W20 P20 N20 M20 L20 AB19 AA19 Y19 N19 M19 L19 N18 M18 L18 P17 N17 M17 N16 M16 L16
ST220U2VBM-3GP 2 1
1D05V_S0
D
Sheet E
10
of
57
C
DM2
BA0 BA1
5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
11 29 49 68 129 146 167 186
DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7#
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7
13 31 51 70 131 148 169 188
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
114 119
OTD0 OTD1
1 2
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
8 M_B_DQ[63..0]
3
2
8 M_B_DQS#[7..0]
8 M_B_DQS[7..0]
M_ODT2 M_ODT3
MH1
M_CS2# 7,12 M_CS3# 7,12
CKE0 CKE1
79 80
CK0 CK0#
30 32
CK1 CK1#
164 166
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
10 26 52 67 130 147 170 185
M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7
SDA SCL
195 197
SMBD_ICH_1 SMBC_ICH_1
VDDSPD
199
SA0 SA1
198 200
NC#50 NC#69 NC#83 NC#120 NC#163/TEST
50 69 83 120 163
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
81 82 87 88 95 96 103 104 111 112 117 118
VREF VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196
GND
GND
201
MH1
MH2
MH2
8,12
M_A_BS#2
8,12 8,12
M_A_BS#0 M_A_BS#1
107 106
BA0 BA1
5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
11 29 49 68 129 146 167 186
/DQS0 /DQS1 /DQS2 /DQS3 /DQS4 /DQS5 /DQS6 /DQS7
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7
13 31 51 70 131 148 169 188
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
114 119
ODT0 ODT1
1 2
VREF VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
GND
GND
M_CKE2 7,12 M_CKE3 7,12 M_CLK_DDR3 7 M_CLK_DDR#3 7
1
M_CLK_DDR2 7 M_CLK_DDR#2 7 M_B_DM[7..0] 8
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
8 M_A_DQ[63..0] SRN33J-5-GP-U RN20
1 2
R251 10KR2J-3-GP 2 3D3V_S0
4 3
SMBD_ICH 3,18 SMBC_ICH 3,18
3D3V_S0
1D8V_S3
8 M_A_DQS[7..0]
8 M_A_DQS#[7..0]
7,12 7,12
M_ODT0 M_ODT1
DDR_VREF_S3 C321 SC4D7U6D3V3KX-GP
202 BC1
SCD1U16V2ZY-2GP
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2
/RAS /WE /CAS
108 109 113
M_A_RAS# 8,12 M_A_WE# 8,12 M_A_CAS# 8,12
/CS0 /CS1
110 115
M_CS0# 7,12 M_CS1# 7,12
CKE0 CKE1
79 80
M_CKE0 7,12 M_CKE1 7,12
CK0 /CK0
30 32
M_CLK_DDR0 7 M_CLK_DDR#0 7
CK1 /CK1
164 166
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
10 26 52 67 130 147 170 185
M_CLK_DDR1 7 M_CLK_DDR#1 7 M_A_DM[7..0]
SDA SCL
195 197
VDDSPD
199
SA0 SA1
198 200
NC#50 NC#69 NC#83 NC#120 NC#163/TEST
50 69 83 120 163
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
81 82 87 88 95 96 103 104 111 112 117 118 3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196 201
M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7
4
8
SMBD_ICH_1 SMBC_ICH_1 3D3V_S0
3
1D8V_S3
2
DDR2-200P-2-GP
62.10017.691
High 5.2mm
SCD1U16V2ZY-2GP
1
DDR2-200P-23-GP
tm
ai
62.10017.A71
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Date: A
B
C
D
ho
High 9.2mm
f@
2
BC2
110 115
102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 85
in
1
202 2
C380 SC4D7U6D3V3KX-GP
1
1
DDR_VREF_S3
CS0# CS1#
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13
xa
7,12 7,12
107 106
M_B_BS#0 M_B_BS#1
M_B_RAS# 8,12 M_B_WE# 8,12 M_B_CAS# 8,12
he
8,12 8,12
M_B_BS#2
108 109 113
E
DM1
8,12 M_A_A[13..0]
RAS# WE# CAS#
1
8,12
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2
1
4
102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 85
2
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13
2
8,12 M_B_A[13..0]
D
om
B
l.c
A
Document Number
DDR2 Socket
Thursday, March 30, 2006
MYALL2
Sheet
E
Rev
MP 11
of
57
A
B
C
D
PARALLEL TERMINATION
Decoupling Capacitor
Put decap near power(0.9V) and pull-up resistor
M_CKE2 7,11 M_B_BS#2 8,11
1
1 2
2
1 2
2
2
2
1
1
1
1
1
2
SCD1U16V2ZY-2GP
2
C322
SCD1U16V2ZY-2GP
2
C392
SCD1U16V2ZY-2GP
2
C378
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
C354
2
C355
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
C353
2
C377
SCD1U16V2ZY-2GP
2
1
1
C375
SCD1U16V2ZY-2GP
2
1
C376
SCD1U16V2ZY-2GP
2
1
C351
2
C395 SCD1U16V2ZY-2GP
2
1
1
1
1
1
C396 SCD1U16V2ZY-2GP
2
C394
SCD1U16V2ZY-2GP
SRN56J-2-GP
C326
M_B_A[13..0] 8,11 C393
M_ODT2 7,11 M_CS2# 7,11 M_B_RAS# 8,11
C352
M_A_A[13..0] 8,11
SCD1U16V2ZY-2GP
8 7 6 5
SRN56J-2-GP RN35 1 M_B_A13 2 3 4
M_B_A[13..0]
C325
SCD1U16V2ZY-2GP
M_A_A[13..0]
M_B_A5 M_B_A3 M_B_A1 M_B_A10
1 2 3 4
C323
SCD1U16V2ZY-2GP
RN31
8 7 6 5
C379
SCD1U16V2ZY-2GP
M_ODT1 7,11 M_ODT3 7,11
C324
SCD1U16V2ZY-2GP
2 R235 2 56R2J-4-GP R249 2 56R2J-4-GP M_A_A9 R234 2 56R2J-4-GP M_B_A8 R248 56R2J-4-GP
C397
SCD1U16V2ZY-2GP
SRN56J-2-GP
1
1
4
C356
2
M_B_A12 M_B_A9
1
1 2 3 4
1 1 1 1
Put decap near power(0.9V) and pull-up resistor
DDR_VREF_S0
RN30
8 7 6 5
2
DDR_VREF_S0
4
E
RN34 M_B_BS#1 8,11
1
1
2
2
2 1 2
2 SRN56J-2-GP
2
SCD1U16V2ZY-2GP
M_ODT0 7,11 M_CS0# 7,11 M_A_RAS# 8,11
C388
SCD1U16V2ZY-2GP
M_A_A13
C387
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
RN28
1 2 3 4
C386
2
C385
SRN56J-2-GP
8 7 6 5
1
2 1
M_B_BS#0 8,11 M_B_WE# 8,11 M_CS3# 7,11 M_B_CAS# 8,11
SC2D2U6D3V3MX-1-GP
1 2 3 4
C734
SC2D2U6D3V3MX-1-GP
RN32
8 7 6 5
C733
SC2D2U6D3V3MX-1-GP
M_CKE3 7,11
SRN56J-2-GP
C732
SC2D2U6D3V3MX-1-GP
M_B_A6 M_B_A7 M_B_A11
C731
SC2D2U6D3V3MX-1-GP
1 2 3 4
1
C730
RN33
8 7 6 5
1
1
SRN56J-2-GP
3
Place these Caps near DM1
1D8V_S3
1
M_B_A0 M_B_A2 M_B_A4
2
1 2 3 4
2
8 7 6 5
3
2
RN27
8 7 6 5
1 2 3 4
M_A_A0 M_A_A2 M_A_A4
M_A_BS#1 8,11
Place these Caps near DM2
1D8V_S3
M_CKE1 7,11
SRN56J-2-GP
1 2
1
1 2 1 2
1
1 2
2 M_A_A6 M_A_A7 M_A_A11
C343 SCD1U16V2ZY-2GP
1 2 3 4
C338 SCD1U16V2ZY-2GP
1
SCD1U16V2ZY-2GP
RN26
C342
2
C337
SRN56J-2-GP
8 7 6 5
2
2 1
M_CKE0 7,11 M_A_BS#2 8,11
C767 SC2D2U6D3V3MX-1-GP
M_A_A12 M_A_A8
SCD1U16V2ZY-2GP
1 2 3 4
C770 SC2D2U6D3V3MX-1-GP
RN21
8 7 6 5
C769 SC2D2U6D3V3MX-1-GP
SRN56J-2-GP
C771 SC2D2U6D3V3MX-1-GP
M_A_BS#0 8,11 M_A_WE# 8,11 M_A_CAS# 8,11 M_CS1# 7,11
SC2D2U6D3V3MX-1-GP
1 2 3 4
1
C768
RN23
8 7 6 5
2
1
SRN56J-2-GP
1
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
RN22
8 7 6 5
1 2 3 4
M_A_A5 M_A_A3 M_A_A1 M_A_A10
Title
DDR2 Termination Resistor Size
SRN56J-2-GP
Document Number
Rev
MP
MYALL2 Date: Thursday, March 30, 2006 A
B
C
D
Sheet E
12
of
57
Layout 40 mil
WLAN_LED# 3
U18
2
AAT4280IGU-1-T1GP C467 SCD1U16V2ZY-2GP
C470 SC1U10V3ZY-6GP
LVDS_TXACLKLVDS_TXACLK+ LVDS_TXAOUT2LVDS_TXAOUT2+
48 48 48 48
1 2 3 4
SRN0J-7-GP RN54 UMA 8 7 6 5
GMCH_TXAOUT0+ GMCH_TXAOUT0GMCH_TXAOUT1+ GMCH_TXAOUT1-
7 7 7 7
1 2 3 4
SRN0J-7-GP RN50 G72 8 7 6 5
LVDS_TXAOUT1LVDS_TXAOUT1+ LVDS_TXAOUT0LVDS_TXAOUT0+
48 48 48 48
1
LCD_TXBOUT0LCD_TXBOUT0+ LCD_TXBOUT1LCD_TXBOUT1+
1 2 3 4
SRN0J-7-GP RN56 UMA 8 7 6 5
GMCH_TXBOUT0GMCH_TXBOUT0+ GMCH_TXBOUT1GMCH_TXBOUT1+
7 7 7 7
D36 1N4148W-7-F-GP
1 2 3 4
SRN0J-7-GP RN52 G72 8 7 6 5
LVDS_TXBOUT1+ LVDS_TXBOUT1LVDS_TXBOUT0+ LVDS_TXBOUT0-
48 48 48 48
1 2 3 4
SRN0J-7-GP RN57 UMA 8 7 6 5
1 2 3 4
SRN0J-7-GP RN53 G72 8 7 6 5
DY
SC100P50V2JN-U
2
2
SC100P50V2JN-U
R652 0R2J-2-GP
C6
1 2
WEBCAM_PW_SW 31 LCD_TXBOUT2LCD_TXBOUT2+ LCD_TXBCLKLCD_TXBCLK+
1
C465 SCD1U25V3ZY-3GP
2
SC10U10V5ZY-1GP
1
DY
2
C5
DY
SCD1U25V3ZY-3GP
3D3V_S0
LED BD CONN 1
SCD1U16V2ZY-2GP R417 220R2J-L2-GP R420 220R2J-L2-GP R421 220R2J-L2-GP R422 220R2J-L2-GP R423 220R2J-L2-GP
5V_S0
LEDBD1 13 1
2 3 4 5 6 7 8 9 10 11 12 14
1 1 1 1 1 1
2 2 2 2 2 2
INT_MIC
2D5V_S0
Q24 UMA FDN337N-1-GP
LCD_TXAOUT2LCD_TXAOUT2+
7 CLK_DDC_EDID 51 G72_LCD_EDID_CLK
EVEN CHANNEL
R325 0R3-0-U-GP 1 2
S
LCD_TXAOUT0LCD_TXAOUT0+
R328 0R3-0-U-GP G72 1 2
51 G72_LCD_EDID_DAT
CAP_LED# / NUM_LED# / IDE_LED# DY 1000p near LEDBD1 BY EMI REQUEST
R326 0R0603-PAD EDID_CLK 1 2
D
S
7 DAT_DDC_EDID
LCD_TXBOUT0LCD_TXBOUT0+
29
G72 Q25 UMA FDN337N-1-GP D
R327 0R0603-PAD EDID_DAT 1 2
EC27DY SCD1U16V2ZY-2GP
1
LCD_TXACLKLCD_TXACLK+
C604 DY SC1000P50V3JN-GP C607 DY SC1000P50V3JN-GP C616 DY SC1000P50V3JN-GP C613 DY SC1000P50V3JN-GP C609 DY SC1000P50V3JN-GP C606 DY SC1000P50V3JN-GP C601 DY SC1000P50V3JN-GP
SRN2K2J-1-GP RN46
SRN0J-7-GP
3D3V_S0
MEDIA_LED# CAP_LED# 31 NUM_LED# 31 WLAN_LED# 26,30 BLT_LED#_2 31 WIRELESS_BTN# 31 BLT_BTN# 31
3D3V_S0 LVDS_TXBCLK+ 48 LVDS_TXBCLK- 48 LVDS_TXBOUT2+ 48 LVDS_TXBOUT2- 48
R424 10KR2J-3-GP
EC15
ACES-CON12-GP 20.K0174.012
GMCH_TXBOUT2- 7 GMCH_TXBOUT2+ 7 GMCH_TXBCLK- 7 GMCH_TXBCLK+ 7
RN61 SRN10KJ-5-GP
C232 SC1U16V3KX-2GP 2
2
1 2
C469
1 Green
4 3
1 2
4
AAT4250IGV-T1-GP
31 FRONT_PWRLED#
EC26 DY SCD1U16V2ZY-2GP
ODD CHANNEL
LCD_TXBOUT2LCD_TXBOUT2+ D30 IDE_LED#
2 1 SRN0J-6-GP
USBPN6 USBPP6
16 16
MEDIA_LED#
5
2
SATA_LED#
4
3
ODD_LED#
IDE_LED# 20 SATA_LED# 15
R425 0R0402-PAD IDE_LED# 1 2 ODD_LED#
Wistron Corporation ai
3 4
tm
USB_6USB_6+
om
1
RN88
l.c
6
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
ODD_LED# 20
ho
LCD_TXBCLKLCD_TXBCLK+
RB731U-1GP-U
f@
JAE-CON44-3-GP 20.F0690.044
2
5V_S5
Title
LCD CONN & LED Size
in
46
R288 120R2F-GP 1 2
1 Green
xa
MH2 55
FRONT_PWRLED#
5V_S0
he
54
OUT IN GND NC#3 ON/OFF#
C846 SC4D7U10V5ZY-3GP 1 2
LCDVDD
LCD_TXBOUT1LCD_TXBOUT1+
LED3 LED-OG-17-GP Orange 3
1
53
C460 SCD1U16V2ZY-2GP
5
BRIGHTNESS FPBACK
LCD_TXAOUT1LCD_TXAOUT1+
R291 120R2F-GP 1 2
2
52
C462 SC4D7U10V5ZY-3GP
1 2 3
STDBY_LED#
G
51
U84
DCBATOUT
EDID_CLK EDID_DAT
STDBY_LED#
3D3V_S0
1
SRN0J-7-GP RN51 G72 8 7 6 5
1
50
2
2
7 7 7 7
5V_S0
2
1
C7
1
2
BRIGHTNESS 31 FPBACK 31
1
3D3V_S0 BRIGHTNESS FPBACK
49
R287 120R2F-GP 1 2
1 1 1 1 1
1
2
LCD_TXAOUT0+ LCD_TXAOUT0LCD_TXAOUT1+ LCD_TXAOUT1-
USB_6USB_6+
DC_BATFULL#
2 2 2 2 2
1 2 3 4
GMCH_TXAOUT2+ GMCH_TXAOUT2GMCH_TXACLK+ GMCH_TXACLK-
S
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
LED4 LED-OG-17-GP Orange 3
1 1
LCD/INVERTER CONN
31
UMA 8 7 6 5
2
1
31 DC_BATFULL#
LED5 LED-YO-3-GP-U K A
3
1 2 3 4
3
R317 DY 0R2J-2-GP
G
48
CHARGE_LED#
R286 120R2F-GP 1 2
G
2
BLT_LED#_1
LCD_TXAOUT2+ LCD_TXAOUT2LCD_TXACLK+ LCD_TXACLK-
Q21 G72 2N7002PT-U
31 CHARGE_LED#
D20 DY BAV99PT-GP-U 2
RN55
45
R289 330R2J-3-GP LED6 LED-B-77-GP-U 1 2 K A
1
R315 G72 10KR2J-3-GP R318 G72 0R2J-2-GP 1 2
D
47 MH1
BLT_LED#_1
2 2
IN GND IN
1
OUT GND ON/OFF#
6 5 4
1 2
1 1
2
C468 SC1U10V3ZY-6GP
LCD1
BLT_LED#_1
R290 120R2F-GP 1 2
1 2
1 2 3
LCDVDD_ON_1
3D3V_S0
51 NV_LCDVDD_ON#
31
WLAN_LED#
1
R320 UMA 1KR2J-1-GP 1 2
7 GMCH_LCDVDD_ON
26,30 WLAN_LED#
4 3
LCDVDD 3D3V_S0
5V_S0
D19 DY BAV99PT-GP-U 2
1 2
LED
Document Number
Rev
MP
MYALL2 Date: Tuesday, April 11, 2006
Sheet
13
of
57
A
B
C
2
CRT_G
13
CRT_HSYNC1
9
5V_CRT_S0
8
SC100P50V2JN-3GP CRT_B
3
CRT_VSYNC1
1
2
12
C441
14
C440
4
C439
10 15
SC18P50V2JN-1-GP
CLK_DDC1_5
5
1
2
16
R648 0R2J-GP CRT_DEC
1
SC18P50V2JN-1-GP
C442 SC100P50V2JN-3GP
VIDEO-15-21-U3-GP R646 10KR2J-3-GP
31
C438
SCD01U16V2KX-3GP
MH2
5V_S0
2
1
C448
2
C447
1
Layout Note: * Must be a ground return path between this ground and the ground on the VGA connector. Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
DAT_DDC1_5
1
1 C446
1
DY
CRT_B
2
DY
2 FCB1608CF-GP
20.20334.015
2
2
2
2
DY
1 C453
1 7
SC3P50V2CN-1-GP
R294 R295 R296 150R2F-1-GP 150R2F-1-GP 150R2F-1-GP
C452
SC3P50V2CN-1-GP
0R2J-2-GP
C457
2
BLUE 0R2J-2-GP
4
11
CRT_R
L24
1
2
MH1 6
2
2
UMA
0R2J-2-GP SC3P50V2CN-1-GP
GMCH_BLUE
G72
CRT1
17
CRT_G
2 FCB1608CF-GP
SC3P50V2CN-1-GP
1 R371 1 R372
CRT_BLUE
CRT_R
2 FCB1608CF-GP L23
1
2
1
0R2J-2-GP
2
UMA
GREEN
0R2J-2-GP
2
7
2
SC3P50V2CN-1-GP
47
G72
1
7 GMCH_GREEN
1 R373 1 R374
1
2
4
2
SC3P50V2CN-1-GP
CRT_GREEN
UMA
L22 RED
0R2J-2-GP
1
47
2
1
GMCH_RED
G72
1
7
1 R375 1 R376
Ferrite bead impedance: 10 ohm@100MHz
1
CRT_RED
E
CRT I/F & CONNECTOR
Layout Note: Place these resistors close to the CRT-out connector 47
D
2 5V_S0 3
2
1
Hsync & Vsync level shift
R647 DY 0R2J-GP
D24 CH751H-40PT 3D3V_S0
2D5V_S0
3D3V_S0
VSYNC
CRT_VSYNC1
R305 1
2 0R2J-2-GP
UMA
47 G72_CRT_EDID_DAT
R297 1
2 0R2J-2-GP
G72
U16B TSAHCT125PW-GP
47 G72_CRT_EDID_CLK
R303 1
2 0R2J-2-GP
G72
7 GMCH_DDCCLK
R304 1
2 0R2J-2-GP
UMA
2
L19 TVOUT 1 2 IND-1D2UH-5-GP C454
Q19 FDN337N-1-GP
S
C443
1 3 8 9
5V_S0 D1 TVOUT BAV99PT-GP-U 2 DACB
2
TVOUT
SC150P-GP
TVOUT
2
CRT_G 3
3
SC270P50V2JN-2GP
1
TVOUT
1 BAV99PT-GP-U
DACA
1
D23
2
COMP_1
2
CRT_B 3
3
Wistron Corporation
1
C444
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
1 BAV99PT-GP-U Title
TVOUT 2
TVOUT
SC150P-GP
D22
2 DACC
TVOUT
1
1 R301 150R2F-1-GP
2
TV_DACA
R378 UMA 0R2J-2-GP 1 2
L20 TVOUT 1 2 IND-1D2UH-5-GP C455
1 BAV99PT-GP-U
D2 TVOUT BAV99PT-GP-U
DACA
2
SC270P50V2JN-2GP
TVOUT
Size
2
7
R377 G72 0R2J-2-GP 1 2
D21
D3 TVOUT BAV99PT-GP-U
C445
C450 SC33P50V3JN-GP 1 2
1
47 G72_TV_COMP
5V_S0
1
22.10021.H61 TVOUT
TVOUT
1
Q20 FDN337N-1-GP
CRT_R 3
3
CRMA_1
2
R302 150R2F-1-GP
L21 TVOUT 1 2 IND-1D2UH-5-GP C456
1
1
DACC
2
TV_DACC
NC#5
2
GND GND GND GND
2
7
R383 UMA 0R2J-2-GP 1 2
5
NC#2
MINDIN7-19-GP-U2 C451 SC33P50V3JN-GP 1 2
1
47 G72_TV_CRMA
LUMA CRMA COMP
SC270P50V2JN-2GP
TVOUT
R382 G72 0R2J-2-GP 1 2
4 6 7
TVOUT 2
TVOUT
SC150P-GP
CLK_DDC1_5
D
TVOUT1 LUMA_1
1
1 R300 150R2F-1-GP
2
TV_DACB
DACB
DAT_DDC1_5
D
TVOUT
2
7
R380 UMA 0R2J-2-GP 1 2
1
47 G72_TV_LUMA
C449 SC33P50V3JN-GP 1 2
R379 G72 0R2J-2-GP 1 2
RN41 SRN10KJ-5-GP
2 1 S
DDC_CLK & DATA level shift
TV CONN
G72
G
U16A TSAHCT125PW-GP
6
R299 0R2J-2-GP
UMA
4 3
4 3
CRT_HSYNC1
3
R298 0R2J-2-GP
2
G72
CRT/TV Connector
Document Number
Date: Thursday, March 30, 2006 A
B
5V_CRT_S0
2
SRN2K2J-1-GP RN44
5V_CRT_S0
1
1 1 2
1 2
1
14
RN43 UMA SRN2K2J-1-GP
7 GMCH_DDCDATA
5
7
47
C459 SCD1U16V2ZY-2GP
G
7 GMCH_VSYNC
2
7
HSYNC
4
47
R306 UMA 0R2J-2-GP 1 2 R308 G72 0R2J-2-GP HSYNC_4 1 2 R313 UMA 0R2J-2-GP 1 2 R311 G72 0R2J-2-GP 1 2VSYNC_4
14
7 GMCH_HSYNC
2
1
2D5V_S0
1
2
5V_S0
3 4
3
C
D
Rev
MP
MYALL2
Sheet E
14
of
57
A
B
C
D
E
C722 SC4D7P50V2CN-1GP 1 2 4
4
2
1
C709 DY SCD1U16V2ZY-2GP
C739 SC1U10V3ZY-6GP
19
RTC_RST#
AA3
INTRUDER# INTVRMEN
Y5 W4
INTRUDER# INTVRMEN
W1 Y1 Y2 W3
EE_CS EE_SHCLK EE_DOUT EE_DIN
INTRUDER#
2
5 ACES-CON3-GP 20.F0714.003
R526
2 1MR2J-1-GP
2nd source: 20.D0198.103 LAN_RSTYNC
21 ACZ_BTCLK_MDC 28
R529 DY 0R2J-2-GP
21,28 ACZ_RST#
R528 1 2 22R2J-2-GP 1 R240 1 R242
R495 0R0402-PAD
R496 0R0402-PAD
2
2
21,28 ACZ_SDATAOUT
2
2 39R2J-L-GP 2 39R2J-L-GP
LAN_CLK LAN_RSTSYNC
U5 V4 T5
LAN_RXD0 LAN_RXD1 LAN_RXD2
U7 V6 V7
LAN_TXD0 LAN_TXD1 LAN_TXD2
ACZ_BIT_CLK ACZ_SYNC_R
U1 R6
ACZ_BIT_CLK ACZ_SYNC
ACZ_RST#_R
R5
ACZ_RST#
T2 T3 T1 TPAD30 TP83 R241 ACZ_SDATAOUT_R T4 1 2 39R2J-L-GP AF18 13 SATA_LED#
ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2
AF3 AE3 AG2 AH2
SATA0RXN SATA0RXP SATA0TXN SATA0TXP
SATA2RXN AF7 SATA2RXP AE7 AG6 AH6
SATA2RXN SATA2RXP SATA2TXN SATA2TXP
20 SATA_RXN0 20 SATA_RXP0 20 SATA_TXN0 20 SATA_TXP0
2
Change to 24.9 1% ohm when use SATA HD
RTC_AUX_S5
3 CLK_PCIE_SATA# 3 CLK_PCIE_SATA
1
1
2
R238 300KR2J-GP P.H. for internal VCCSUS1_05
INTVRMEN
1
Place within 500 mils of ICH7ball
20 20 20 20 20 20
AC3 AA5
LPC_LDRQ0# 32
LFRAME#
AB3
LPC_LFRAME# 31,32,34
A20GATE A20M#
AE22 AH28
KA20GATE_1 31 R502 DY H_A20M# 4 0R2J-2-GP 1 2
31,32,34 Open R179 for Dothan A step Shunt for Dothan B step & all Yonah
CPUSLP#
AG27
H_CPUSLP#_2
TP1/DPRSTP# TP2/DPSLP#
AF24 AH25
H_DPRSLP#
FERR#
AG26
GPIO49/CPUPWRGD
AG24
H_PWRGD 4,19
IGNNE# INIT3_3V# INIT# INTR
AG22 AG21 AF22 AF25
H_IGNNE# 4 FWH_INIT# 34 H_INIT# 4 H_INTR 4
RCIN#
AG23
KBRCIN#_1 31
NMI SMI#
AH24 AF23
H_NMI 4 H_SMI# 4
STPCLK#
AH22
H_STPCLK# 4
THERMTRIP#
AF26
DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15
AB15 AE14 AG13 AF13 AD14 AC13 AD12 AC12 AE12 AF12 AB13 AC14 AF14 AH13 AH14 AC15
IDE_PDD0 IDE_PDD1 IDE_PDD2 IDE_PDD3 IDE_PDD4 IDE_PDD5 IDE_PDD6 IDE_PDD7 IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15
DA0 DA1 DA2
AH17 AE17 AF17
IDE_PDA0 20 IDE_PDA1 20 IDE_PDA2 20
DCS1# DCS3#
AE16 AD16
IDE_PDCS1# 20 IDE_PDCS3# 20
1
R233 10KR2J-3-GP 2 3D3V_S0 1D05V_S0
R500 56R2J-4-GP
H_CPUSLP# 4,6
3
H_DPRSLP# 4,37
H_DPSLP# 4
H_FERR# 4
H_PWRGD
R498 DY 200R2F-L-GP 1 2
1D05V_S0
1D05V_S0
R501 56R2J-4-GP
H_THERMTRIP_R
SATALED#
AF1 AE1
SATA_CLKN SATA_CLKP
SATARBIAS AH10 R497 AG10 2 24D9R2F-L-GP
IDE_PDIOR# IDE_PDIOW# IDE_PDDACK# INT_IRQ14 IDE_PDIORDY IDE_PDDREQ
LDRQ0# LDRQ1#/GPIO23
ACZ_SDOUT
SATARBIASN SATARBIASP
AF15 AH15 AF16 AH16 AG16 AE15
DIOR# DIOW# DDACK# IDEIRQ IORDY DDREQ ICH7-M-GP
R239 DY 0R2J-2-GP
IDE
Layout Note: R568 needs to placed within 2" of ICH7, R568 must be placed within 2" of R169 w/o stub.
20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20
2
KI.80101.017
INTVRMEN
Enable
1
Disable
0
om
2
V3 U3
28 ACZ_SDATAIN0 21 ACZ_SDATAIN1
1
1
1
LAN_RSTYNC SATA2RXN SATA2RXP
ACZ_BITCLK 21,28 ACZ_SYNC
R527 22R2J-2-GP 2 1
RTCRST#
AA6 AB5 AC4 Y6
1
2
CH751H-40PT
2 20KR2J-L2-GP
1
LPC_LAD[3..0]
LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3
LAD0 LAD1 LAD2 LAD3
1
R525 1
1
1
R232
2 3
3
2BAT_D2 1KR2J-1-GP
RTC LPC
D15 BAT 1
1
RTXC1 RTCX2
LAN CPU
RTC1
4
LPC_LAD[3..0]
U65A RCT_X1 AB1 RCT_X2AB2
2
C737 SC4D7P50V2CN-1GP 1 2
2
C332 SC1U10V3ZY-6GP
RTC circuitry
AC-97/AZALIA
2
CH751H-40PT
H_DPSLP#
1
2
1
1
2
R520 10MR2J-L-GP
D32
2
R499 DY 56R2J-4-GP
1
X5 X-32D768KHZ-41GP 82.30001.731
RTC_AUX_S5
SATA
3D3V_AUX_S5
4
3
1
1D05V_S0
ai
l.c
1
tm
Wistron Corporation ho
Placement Note: Diatance between the ICH-7 M and cap on the "P" signal should be identical distance between the ICH-7 M and cap on the "N" signal for same pair.
in
f@
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Size
Document Number
Date: Thursday, March 30, 2006 A
B
C
D
he
ICH7-M (1 of 4)
xa
Title
Rev
MP
MYALL2
Sheet E
15
of
57
1
A
B
D
E
U65C
PIRQA# PIRQB# PIRQC# PIRQD#
AE5 AD5 AG4 AH4 AD9
RSVD[1] RSVD[2] RSVD[3] RSVD[4] RSVD[5]
RSVD[6] RSVD[7] RSVD[8] RSVD[9] MCH_SYNC#
ICH7-M-GP
KI.80101.017
3
GPIO2/PIRQE# GPIO3/PIRQF# GPIO4/PIRQG# GPIO5/PIRQH#
MISC
TPAD30
TP90
TPAD30
TP59
TPAD30
PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3
A7 E10 B18 1 A12 C9 E11 PCI_LOCK# B10 F15 F14 F16
28 ACZ_SPKR 31,32 PM_SUS_STAT#
PCI_IRDY# 25,30 PCI_PAR 24,30 R544 2 PCIRST1# 25,27,30 47R2J-2-GP PCI_DEVSEL# 25,30 PCI_PERR# 25,30
1 2 3 4 5
3D3V_S0
10 9 8 7 6
PCI_REQ#0 INT_PIRQH# PCI_REQ#5 PCI_IRDY#
MCH_ICH_SYNC# PCI_REQ#4 PCI_TRDY# INT_SERIRQ 3D3V_S0
1 2 3 4 5
10 9 8 7 6
PCI_STOP# PCI_REQ#1 PCI_REQ#2 PCI_FRAME#
INT_PIRQE# INT_PIRQF# INT_PIRQG# INT_PIRQH#
PCI_DEVSEL# PCI_LOCK# PCI_REQ#3 INT_PIRQE#
1 2 3 4 5
3D3V_S0
10 9 8 7 6
SPKR SUS_STAT# SYS_RST# GPIO0/BM_BUSY#
B23
GPIO11/SMBALERT#
AC20 AF21
PSW_CLR#
PSW_CLR#
GPIO18/STPPCI# GPIO20/STPCPU#
A21
GPIO26
B21 E23
GPIO27 GPIO28
AG18
GPIO32/CLKRUN#
AC19 U2
GPIO33/AZ_DOCK_EN# GPIO34/AZ_DOCK_RST#
25,30,31,32 INT_SERIRQ 19 THRM#
F20 AH21 AF20
WAKE# SERIRQ THRM#
7,37 VGATE_PWRGD
AD22
VRMPWRGD
31 KBC_SLP_WAKE 31 ECSCI#_1 31 ECSMI#
AC21 AC18 E21
GPIO6 GPIO7 GPIO8
ICH7_WAKE#
PM_CLKRUN# 1 R222 ACZ_SPKR 2
MCH_ICH_SYNC#
7
ICH7_GPI12 1 PM_BATLOW#_R 2 DBRESET# 3 SMB_LINK_ALERT# 4 5 3D3V_S5 3D3V_S0
10 9 8 7 6
3D3V_S5
3D3V_S0
1 2 3 4 5
26 26 26 26
PCIE_RXN1 PCIE_RXP1 PCIE_TXN1 PCIE_TXP1
C758 SCD1U10V2KX-5GP 2 C759 SCD1U10V2KX-5GP 2
PCIE_RXN3 PCIE_RXP3 PCIE_TXN3 PCIE_TXP3
C750 SCD1U10V2KX-5GP 2 C755 SCD1U10V2KX-5GP 2
1 1
1 1
ICH7_WAKE# PSW_CLR# SMB_ALERT# PM_RI#
SRN10KJ-L3-GP RP1 USB_OC#2 USB_OC#6 USB_OC#7 USB_OC#1
22 22 22 22
10 9 8 7 6
3D3V_S5 USB_OC#4 USB_OC#0 USB_OC#3 USB_OC#5
SRN10KJ-L3-GP 3D3V_S5 TPAD30 TP84
2 8K2R2J-3-GP R546 1 1KR2J-1-GP R229 1 2 10KR2J-3-GP R231 10KR2J-3-GP 2 1
ECSCI#_1
AC1 B2
CLK_ICH14 3 CLK48_ICH 3 PM_SUS_CLK 18
SUSCLK
C20
SLP_S3# SLP_S4# SLP_S5#
B24 D23 F22
PWROK
AA4 AC22
PWROK
RN38 SRN100KJ-6-GP 3 2 4 1
ECSWI# ECSMI#
SPI_ARB
RN86 SMLINK0 SMLINK1
3 4
2 1
SRN10KJ-5-GP
21 21
USB_OC#2 USB_OC#3
21
USB_OC#5
USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7
3D3V_S5
PM_BATLOW#_R
PWRBTN#
C23
LAN_RST#
C19
PWRBTN#_ICH R547 10KR2J-3-GP 1 2
RSMRST#
Y4
H
H
L
SPI
L
H
2
RSMRST#_SB
ECSWI#
3
F26 F25 E28 E27
PERn1 PERp1 PETn1 PETp1
H26 H25 G28 G27
PERn2 PERp2 PETn2 PETp2
K26 K25 J28 J27
PERn3 PERp3 PETn3 PETp3
M26 M25 L28 L27
PERn4 PERp4 PETn4 PETp4
P26 P25 N28 N27
PERn5 PERp5 PETn5 PETp5
T25 T24 R28 R27
PERn6 PERp6 PETn6 PETp6
DMI0RXN DMI0RXP DMI0TXN DMI0TXP
V26 V25 U28 U27
DMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0
7 7 7 7
DMI1RXN DMI1RXP DMI1TXN DMI1TXP
Y26 Y25 W28 W27
DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1
7 7 7 7
DMI2RXN DMI2RXP DMI2TXN DMI2TXP
AB26 AB25 AA28 AA27
DMI_RXN2 DMI_RXP2 DMI_TXN2 DMI_TXP2
7 7 7 7
DMI3RXN DMI3RXP DMI3TXN DMI3TXP
AD25 AD24 AC28 AC27
DMI_RXN3 DMI_RXP3 DMI_TXN3 DMI_TXP3
7 7 7 7
DMI_CLKN DMI_CLKP
AE28 AE27
CLK_PCIE_ICH# 3 CLK_PCIE_ICH 3
C25 D25
DMI_IRCOMP_R
DMI_ZCOMP DMI_IRCOMP
R2 P6 P1
SPI_CLK SPI_CS# SPI_ARB
P5 P2
SPI_MOSI SPI_MISO
D3 C4 D5 D4 E5 C3 A2 B3
OC0# OC1# OC2# OC3# OC4# OC5#/GPIO29 OC6#/GPIO30 OC7#/GPIO31
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P
F1 F2 G4 G3 H1 H2 J4 J3 K1 K2 L4 L5 M1 M2 N4 N3
USBRBIAS# USBRBIAS
D2 D1
USBPN0 USBPP0 USBPN1 USBPP1 USBPN2 USBPP2 USBPN3 USBPP3
21 21 26 26 21 21 21 21
USBPN5 USBPP5 USBPN6 USBPP6 USBPN7 USBPP7
21 21 13 13 21 21
Layout Note: PCIE AC coupling caps need to be within 250 mils of the driver.
1D5V_S0 Place within 500 mils of ICH R250 24D9R2F-L-GP
2
USB Pair
USB_RBIAS_PN
KI.80101.017
Device
0
USB2
1
MINIC1
2
USB3
3
USB4
4
NC
5
USB1
6
CAMERA
7
BLUETOOTH
2
D14 BAT54PT-GP RSMRST#_SB 1
3 1
1
R236 10KR2J-3-GP
2
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size
Document Number
ICH7-M (2 of 4)
Date: Thursday, March 30, 2006 A
31
ICH7_GPI12
2
H
PM_PWRBTN# 31
3
R542 22D6R2F-L1-GP
31 RSMRST#_KBC
GNT5# GNT4#
PCI
1
PM_DPRSLPVR 37
2
Default:H LPC
R223 100R2J-2-GP 1 2 R224 DY 100KR2J-1-GP D33 BAS16-1-GP
2 1
KI.80101.017
ICH7-M-GP
R227 DY 4K7R2J-2-GP
1
4
7,19
PM_DPRSLPVR_R
C21
E20 A20 F19 E19 R4 E22 R3 D20 AD21 AD20 AE20
3D3V_S0
PM_SLP_S3# 18,31,35,40,41,45,56 PM_SLP_S4# 31,41
TP0/BATLOW#
GPIO9 GPIO10 GPIO12 GPIO13 GPIO14 GPIO15 GPIO24 GPIO25 GPIO35 GPIO38 GPIO39
8 7 6 5
TP57 TPAD30
1
PWROK
SATA0_R2 1 SATA0_R0 2 SATA0_R3 3 SATA0_R1 4 SRN10KJ-4-GP
U65D
AE9 AG8 AH8 F21 AH20
SRN8K2J-2-GP
3D3V_S0
SATA0_R0 SATA0_R1 SATA0_R2 SATA0_R3
CLK14 CLK48
GPIO16/DPRSLPVR
GPIO
ICH7-M-GP
3D3V_S5 PCI_SERR# INT_PIRQD# INT_PIRQB# INT_PIRQA#
34
INT_PIRQE# 30 INT_PIRQF# 25 INT_PIRQG# 25
RP4
SRN8K2J-2-GP RP5
2
PM_STPPCI# PM_STPCPU#
25,30 25,30 25,30 25,30
3D3V_S0
SRN8K2J-2-GP RP3
3 3
RI#
AB18
25,30,31,32 PM_CLKRUN# PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME#
RP2 INT_PIRQF# INT_PIRQC# PCI_PERR# INT_PIRQG#
PM_BMBUSY#
DBRESET#
A19 A27 A22
SMB_ALERT#
24,30 24,30 24,30 24,30
C26 PLT_RST1# 7,18,22,26,31,32,34,46,51 A9 CLK_ICHPCI 3 B19 ICH_PME#_1 1 2 ICH_PME# 22 R545 0R0402-PAD G8 F7 F8 G7
7
A28
AF19 AH18 AH19 AE19
1
Interrupt I/F
A3 B4 C5 B5
TP60
PM_RI#
GPIO21/SATA0GP GPIO19/SATA1GP GPIO36/SATA2GP GPIO37/SATA3GP
2
PLTRST# PCICLK PME#
TPAD30
RN84
SMBCLK SMBDATA LINKALERT# SMLINK0 SMLINK1
1
IRDY# PAR PCIRST# DEVSEL# PERR# PLOCK# SERR# STOP# TRDY# FRAME#
TP58
C22 B22 SMB_LINK_ALERT# A26 SMLINK0 B25 SMLINK1 A25
18,26 SMB_CLK 18,26 SMB_DATA
25 25 30 30
SATA GPIO
B15 C12 D12 C15
PCI_REQ#0 PCI_GNT#0 PCI_REQ#1 PCI_GNT#1
Clocks
C/BE0# C/BE1# C/BE2# C/BE3#
PCI_REQ#0 PCI_GNT#0 PCI_REQ#1 PCI_GNT#1 PCI_REQ#2 PCI_GNT#2 PCI_REQ#3 PCI_GNT#3 PCI_REQ#4 PCI_GNT#4 PCI_REQ#5 PCI_GNT#5
SMB
D7 E7 C16 D16 C17 D17 E13 F13 A13 A14 C8 D8
Direct Media Interface
INT_PIRQB#
PCI
REQ0# GNT0# REQ1# GNT1# REQ2# GNT2# REQ3# GNT3# REQ4#/GPIO22 GNT4#/GPIO48 GPIO1/REQ5# GPIO17/GNT5#
USB
INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
PCI-Express
4
E18 C18 A16 F18 E16 A18 E17 A17 A15 C14 E14 D14 B12 C13 G15 G13 E12 C11 D11 A11 A10 F11 F10 E9 D9 B9 A8 A6 C7 B6 E6 D6
SYS GPIO Power MGT
U65B PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
SPI
24,25,30 PCI_AD[31..0]
25
C
B
C
D
Rev
MP
MYALL2
Sheet E
16
of
57
D
E
ICH7-M-GP
2
2
1
1 2
2
1 2 1
2 1
2 1
1
1
2
2
1 2
1
1
DY
1 2
1 2
1
NO_STUFF
1
1
1D5V_S0
om l.c
TP55 TPAD28
C315
2
C328
ai
TP89 TPAD28 TP56 TPAD28 1D5V_S0
ho
tm
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
f@
A1 H6 H7 J6 J7
Title
ICH7-M (3 of 4) Size
KI.80101.017
Document Number
Rev
MP
MYALL2 Date: Friday, March 24, 2006
A
2
1
1 SCD1U10V2KX-4GP
2
2
C361
DY
2
1 2
2
1 2 1 2
1
1 2
1 2 1 2
1 2 1 2
CORE IDE
2 1
C381
in
C28 G20
3D3V_S5 R245 0R0603-PAD 1 2
xa
K7
2
3D3V_S0
he
1 2
VccSus1_05[2] VccSus1_05[3] VccSus1_05/VccLAN1_05[1] VccSus1_05/VccLAN1_05[2]Vcc1_5_A[26] Vcc1_5_A[27] Vcc1_5_A[28] Vcc1_5_A[29] Vcc1_5_A[30]
C350 SCD1U10V2KX-4GP
2
1 2
1 2 1 2
VccSus1_05[1]
2
1 2 1 2
1 2
1 2
PCI
1 2 1 1 2 1 2
USB
2 2 1 1 2 1 2 1 2
AB8 AC8
C363
Layout Note: IDE decoupling
C334
SC10U10V5ZY-1GP C715
Vcc1_5_A[24] Vcc1_5_A[25]
3D3V_ICH_S5
NO_STUFF
Layout Note: Place near AB3
SC10U10V5ZY-1GP C329
AA2 Y7
T7 F17 G17
RTC_AUX_S5
DY
C336
VccUSBPLL
Vcc1_5_A[21] Vcc1_5_A[22] Vcc1_5_A[23]
V3D3A_VCCPSUS R243 0R0603-PAD 3D3V_S5 2 1
C369
SCD1U10V2KX-4GP
TPAD28 TP81
VccSus3_3[19]
AB17 AC17
C368
SCD1U10V2KX-4GP
C384 SCD01U16V2KX-3GP
DY
E3 C1
Vcc1_5_A[19] Vcc1_5_A[20]
3D3V_S0
C389
C765
1D5V_ICH_S0
SCD1U10V2KX-4GP
C714 SCD1U10V2KX-4GP
VccSus3_3[7] VccSus3_3[8] VccSus3_3[9] VccSus3_3[10] VccSus3_3[11] VccSus3_3[12] VccSus3_3[13] VccSus3_3[14] VccSus3_3[15] VccSus3_3[16] VccSus3_3[17] VccSus3_3[18]
K3 K4 K5 K6 L1 L2 L3 L6 L7 M6 M7 N7
Layout Note: PCI decoupling
3D3V_S0
SCD1U10V2KX-4GP
NO_STUFF
Vcc1_5_A[10] Vcc1_5_A[11] Vcc1_5_A[12] Vcc1_5_A[13] Vcc1_5_A[14] Vcc1_5_A[15] Vcc1_5_A[16] Vcc1_5_A[17] Vcc1_5_A[18]
A24 C24 D19 D22 G19
SC4D7U10V5ZY-3GP
1
C349
Vcc3_3[2]
AB10 AB9 AC10 AD10 AE10 AF10 AF9 AG9 AH9
P7
VccSus3_3[2] VccSus3_3[3] VccSus3_3[4] VccSus3_3[5] VccSus3_3[6]
C359
SCD1U10V2KX-4GP
1D5V_S0
AH11
ATX
DY
3D3V_ICH_S5
VccSATAPLL
VccSus3_3[1]
SCD1U10V2KX-4GP
NO_STUFF NO_STUFF C319 C318 SCD1U10V2KX-4GPSCD1U10V2KX-4GP
AD2
VccRTC
W5
C391
C320
C314
SCD1U10V2KX-4GP
C383 SCD1U10V2KX-4GP
Vcc1_5_A[1] Vcc1_5_A[2] Vcc1_5_A[3] Vcc1_5_A[4] Vcc1_5_A[5] Vcc1_5_A[6] Vcc1_5_A[7] Vcc1_5_A[8] Vcc1_5_A[9]
A5 B13 B16 B7 C10 D15 F9 G11 G12 G16
SCD1U10V2KX-4GP
1D5V_S0
VccDMIPLL
AB7 AC6 AC7 AD6 AE6 AF5 AF6 AG5 AH5
ARX
3D3V_S0
C316 SCD1U10V2KX-4GP
C371
Vcc3_3[1]
AG28
Vcc3_3[12] Vcc3_3[13] Vcc3_3[14] Vcc3_3[15] Vcc3_3[16] Vcc3_3[17] Vcc3_3[18] Vcc3_3[19] Vcc3_3[20] Vcc3_3[21]
C327
C358
SCD1U10V2KX-4GP
C366
B27
SCD1U10V2KX-4GP
1D5V_ICH_S0
1D5V_S0 SCD1U10V2KX-4GP
R226 0R0603-PAD 1 2
SCD01U16V2KX-3GP
SC10U10V5ZY-1GP
1D5V_S0
1 2 IND-1D2UH-5-GP C716 C720
AA7 AB12 AB20 AC16 AD13 AD18 AG12 AG15 AG19
3
3D3V_S0
SCD1U10V2KX-4GP
2
SCD1U10V2KX-4GP
L41
1D5V_S0
1D5V_GPLL_ICH_S0
Vcc3_3[3] Vcc3_3[4] Vcc3_3[5] Vcc3_3[6] Vcc3_3[7] Vcc3_3[8] Vcc3_3[9] Vcc3_3[10] Vcc3_3[11]
4
1D05V_S0
SCD1U10V2KX-4GP
C390
AE23 AE26 AH26
C340
C333 SCD1U10V2KX-4GP
R7
V_CPU_IO[1] V_CPU_IO[2] V_CPU_IO[3]
SCD1U10V2KX-4GP
3D3V_S0
C372 SCD1U16V2ZY-2GP
C345 SCD1U10V2KX-4GP
3D3V_S5
SCD1U10V2KX-4GP
V5REF_S5
R244 100R2J-2-GP
3D3V_S0
SCD1U10V2KX-4GP
D17 CH751H-40PT
VccSus3_3/VccSusHDA
C360
C357
DY
SCD1U10V2KX-4GP
5V_S5
U6
C330
C346
3D3V_S5
SCD1U10V2KX-4GP
3D3V_S5
Vcc3_3/VccHDA
VCCA3GP
Layout Note: Place near ICH7
C367 SCD1U16V2ZY-2GP
V5 V1 W2 W7
USB CORE
1 2
1 2
1 2
1 2
1 2
1
2
2 1
V5REF_S0
1
3
R228 100R2J-2-GP
VccSus3_3/VccLAN3_3[1] VccSus3_3/VccLAN3_3[2] VccSus3_3/VccLAN3_3[3] VccSus3_3/VccLAN3_3[4]
C331
C344
SCD1U10V2KX-4GP
D16 CH751H-40PT
Vcc1_5_B[1] Vcc1_5_B[2] Vcc1_5_B[3] Vcc1_5_B[4] Vcc1_5_B[5] Vcc1_5_B[6] Vcc1_5_B[7] Vcc1_5_B[8] Vcc1_5_B[9] Vcc1_5_B[10] Vcc1_5_B[11] Vcc1_5_B[12] Vcc1_5_B[13] Vcc1_5_B[14] Vcc1_5_B[15] Vcc1_5_B[16] Vcc1_5_B[17] Vcc1_5_B[18] Vcc1_5_B[19] Vcc1_5_B[20] Vcc1_5_B[21] Vcc1_5_B[22] Vcc1_5_B[23] Vcc1_5_B[24] Vcc1_5_B[25] Vcc1_5_B[26] Vcc1_5_B[27] Vcc1_5_B[28] Vcc1_5_B[29] Vcc1_5_B[30] Vcc1_5_B[31] Vcc1_5_B[32] Vcc1_5_B[33] Vcc1_5_B[34] Vcc1_5_B[35] Vcc1_5_B[36] Vcc1_5_B[37] Vcc1_5_B[38] Vcc1_5_B[39] Vcc1_5_B[40] Vcc1_5_B[41] Vcc1_5_B[42] Vcc1_5_B[43] Vcc1_5_B[44] Vcc1_5_B[45] Vcc1_5_B[46] Vcc1_5_B[47] Vcc1_5_B[48] Vcc1_5_B[49] Vcc1_5_B[50] Vcc1_5_B[51] Vcc1_5_B[52] Vcc1_5_B[53]
SCD1U10V2KX-4GP
5V_S0
AA22 AA23 AB22 AB23 AC23 AC24 AC25 AC26 AD26 AD27 AD28 D26 D27 D28 E24 E25 E26 F23 F24 G22 G23 H22 H23 J22 J23 K22 K23 L22 L23 M22 M23 N22 N23 P22 P23 R22 R23 R24 R25 R26 T22 T23 T26 T27 T28 U22 U23 V22 V23 W22 W23 Y22 Y23
SCD1U10V2KX-4GP
3D3V_S0
C341 SCD1U10V2KX-4GP
*Within a given well, 5VREF needs to be up before the corresponding 3.3V rail
C382 SCD1U10V2KX-4GP
2
1
C365 SCD1U10V2KX-4GP
2
1
C736 SC10U10V5ZY-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U10V5ZY-1GP
2
C347
C339
SC10U10V5ZY-1GP
C362
C348
SCD1U10V2KX-4GP
C335
V5REF_Sus
L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18
1D05V_S0
SCD1U10V2KX-4GP
1D5V_ICH7 C740
F6
Vcc1_05[1] Vcc1_05[2] Vcc1_05[3] Vcc1_05[4] Vcc1_05[5] Vcc1_05[6] Vcc1_05[7] Vcc1_05[8] Vcc1_05[9] Vcc1_05[10] Vcc1_05[11] Vcc1_05[12] Vcc1_05[13] Vcc1_05[14] Vcc1_05[15] Vcc1_05[16] Vcc1_05[17] Vcc1_05[18] Vcc1_05[19] VCC PAUX Vcc1_05[20]
SCD1U10V2KX-4GP
V5REF_S5
V5REF[2]
SCD1U10V2KX-4GP
1D5V_S0 R237 0R0603-PAD 1 2
V5REF[1]
AD17
SCD1U10V2KX-4GP
4
G10
1
U65F V5REF_S0
1
Layout Note: Place near pin AA19
1
C
2
B
2
A
B
C
D
Sheet E
17
of
57
1
A
B
C
D
E
U65E
3D3V_S5
32K suspend clock output U11
1 2 3
OE A GND
VCC
5
Y
4
R256 10R2J-2-GP 1 2
32KHZ
G792_32K 19
1
16,31,35,40,41,45,56 PM_SLP_S3# 16 PM_SUS_CLK
DY
NC7SZ126P5X-GP
R255 240KR2J-1-GP
3
2 S
D
1
G
2
RUN_POWER_ON
2N7002W-7-GP Q17 3
SMBUS 3D3V_S0 3D3V_S5
4 3
5V_S0
4 3
RN37 SRN4K7J-8-GP
1 2
G
1 2
RN36 SRN4K7J-8-GP
16,26
Q16 S2N7002-7F-GP
D
SMB_CLK
SMBC_ICH 3,11
G
2
D
16,26 SMB_DATA
Q15 S2N7002-7F-GP
SMBD_ICH 3,11
Q13 & Q14 connect SMLINK and SMBUS in S) for SMBus 2.0 compliance
PLT_RST1#
C461 SC100P50V2JN-3GP
9
U16C TSAHCT125PW-GP
8
RSTDRV#_5 20
1
7,16,22,26,31,32,34,46,51
R310 33R2J-2-GP 1 2
10
5V_S0
R314 10KR2J-3-GP 1
2
1
4
14
2
P28 R1 R11 R12 R13 R14 R15 R16 R17 R18 T6 T12 T13 T14 T15 T16 T17 U4 U12 U13 U14 U15 U16 U17 U24 U25 U26 V2 V13 V15 V24 V27 V28 W6 W24 W25 W26 Y3 Y24 Y27 Y28 AA1 AA24 AA25 AA26 AB4 AB6 AB11 AB14 AB16 AB19 AB21 AB24 AB27 AB28 AC2 AC5 AC9 AC11 AD1 AD3 AD4 AD7 AD8 AD11 AD15 AD19 AD23 AE2 AE4 AE8 AE11 AE13 AE18 AE21 AE24 AE25 AF2 AF4 AF8 AF11 AF27 AF28 AG1 AG3 AG7 AG11 AG14 AG17 AG20 AG25 AH1 AH3 AH7 AH12 AH23 AH27
7
3
VSS[98] VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194]
1
4
VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97]
2
A4 A23 B1 B8 B11 B14 B17 B20 B26 B28 C2 C6 C27 D10 D13 D18 D21 D24 E1 E2 E4 E8 E15 F3 F4 F5 F12 F27 F28 G1 G2 G5 G6 G9 G14 G18 G21 G24 G25 G26 H3 H4 H5 H24 H27 H28 J1 J2 J5 J24 J25 J26 K24 K27 K28 L13 L15 L24 L25 L26 M3 M4 M5 M12 M13 M14 M15 M16 M17 M24 M27 M28 N1 N2 N5 N6 N11 N12 N13 N14 N15 N16 N17 N18 N24 N25 N26 P3 P4 P12 P13 P14 P15 P16 P17 P24 P27
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
ICH7-M-GP KI.80101.017 Title
ICH7-M (4 of 4) Size
Document Number
Rev
MP
MYALL2 Date: Thursday, March 30, 2006 A
B
C
D
Sheet E
18
of
57
FAN1_VCC
1
C22 SC10U10V5ZY-1GP
C38 DY SC2200P50V2KX-2GP
5V_S0
1
2
1
D5 BAT54-4-GP
C31 SCD1U16V3KX-3GP
R32 10KR2J-3-GP
2
2
C206 put near FAN1 / 5V_S0 add 0.1u near FAN by EMI request
1
2
2
2
C36 DY SCD1U16V2ZY-2GP
3
1
1
*Layout* 15 mil
C206 put near FAN1 / 5V_S0 add 0.1u near FAN by EMI request
FAN1
5 3 2 1
C30 SC100P50V2JN-3GP
*Layout* 15 mil 4
2
1
FAN1_VCC
ACES-CON3-1-GP
20.F0735.003
R386 49K9R2F-L-GP
G792_DXN3 G27
G792SFUF-GP
1
3D3V_S0
2
2
DY
SC2200P50V2KX-2GP
R395 10KR2J-3-GP
Place near chip as close as possible
2
THRM# 16
1
C562
1
R368 10KR2J-3-GP
DXP1:108 Degree DXP2:H/W Setting DXP3:88 Degree
3
1 3
1
PMBS3904-1-GP
Q30 C589 1
PMBS3904-1-GP
System Sensor
G792_RESET#
2 4K7R2J-2-GP R387
Q13 1
G26
2
1
PWROK
1
DCBATOUT
Hardware shutdown H_THERMDA 4 H_THERMDC 4
1
5V_AUX_S5
1
R105 1MR2J-1-GP U5
5
HTH GND RESET#/RESET LTH
1 2 3
G680LT1F-GP
D29 BAW56PT-U
HTH
INTRUDER#
15
2
RSMRST# 31
1
1
2 3 1
R103 DY 110KR2F-GP
2004/11/10 CHANGE
D8 DY BAT54-4-GP
2
2
R95 10KR2J-3-GP
R87 DY 0R2J-2-GP 2 1
R104 DY 15KR2F-GP
Output type: Open-Drain RESET#
D7 DY BAS16-7-F-GP
3
3D3V_AUX_S5
4
3
1
2
LOW3_OFF
DY
VCC
2
T8_HW_SHUT#
DY
1
2
DY C172 SCD1U16V2ZY-2GP
OVERT#
1
(dummy, KBC already delay) C155 DY SCD1U16V2ZY-2GP
tm
ai
l.c
om
2
C174 SCD1U16V2ZY-2GP
ho
f@
in
xa
1KR2J-1-GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Q8 PMBT2222A-1GP
B
Title Size
he
2
E
1
1
H_PWRGD
Wistron Corporation
C
R100 4,15
2
2
51
1
7,16
C277
2
G792_DXN2
SC470P50V2KX-3GP SC470P50V2KX-3GP
2
H_THERMDC
2
V_DEGREE =(((Degree-72)*0.02)+0.34)*VCC
SGND1 SGND2 SGND3
8 10 12
H_THERMDA G792_DXP3 G792_DXP2
2
ALERT# THERM# THERM_SET RESET#
5 17
C556 SC2200P50V2KX-2GP
15 13 3 2
DGND DGND
G792_32K 18 SMB_DATA_W 31 SMB_CLK_W 31
C557 SC2200P50V2KX-2GP
DXP1 DXP2 DXP3
1
7 9 11
FAN1 FG1 CLK SDA SCL NC#19
2
VCC DVCC
1 4 14 16 18 19
C551 SC2200P50V2KX-2GP 2 1
THRM# T8_HW_SHUT# V_DEGREE
6 20
GAP-CLOSE 1 2
1 C550
C549 SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP 2 1
SC4D7U10V5ZY-3GP 2
1
C548
1
Setting T8 as 100 Degree
R388 4K99R2F-L-GP
1 2
C558 SCD1U16V2ZY-2GP
1
200R2F-L-GP
2nd source: 20.F0700.003
U32 5V_G791_S0
2
2
1
*Layout* 30 mil
GAP-CLOSE 1 2
R390
2
5V_S0 5V_S0
Thermal/Fan Controllor
Document Number
PM_THRMTRIP-I# 4 Date: Thursday, March 30, 2006
MYALL2
Sheet
Rev
MP 19
of
57
5V_S0
3D3V_S0
CD-ROM Connector
8 7 6 5 1 2 3 4 IDE_PDIORDY IDE_PDDACK# INT_IRQ14
RSTDRV#_5 18 IDE_LED# 13 INT_IRQ14 15 IDE_PDIORDY 15 IDE_PDIOR# 15 IDE_PDIOW# 15 IDE_PDDREQ 15 IDE_PDDACK# 15
INT_IRQ14 IDE_PDIORDY IDE_PDIOR# IDE_PDIOW# IDE_PDDREQ IDE_PDDACK#
5V_S0
44 32 11A
R29 10KR2J-3-GP
IDE_PDDACK#
1
PDIAG IDE_PDA2 IDE_PDCS3#
2
NP1 NP2
SATA_TXN1 SATA_TXP1
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
NP1 NP2
40 30 26 24 22 43 19 45 46 2 S1 S4 S7 4A 5A 6A 10A 12A
SATA Connector 12 1 2 3 4 5 6 7 8 9 10 11 14
15 SATA_TXP0 15 SATA_TXN0
2
1
15 SATA_RXN0 15 SATA_RXP0
SATA1
TC6
5V_S0 R56 10KR2J-3-GP 1 2
CSEL
R55 DY 0R2J-2-GP
SPD-CONN50-4R-17GP-U
20.80677.050
5V_S0
20.F0794.066
SCD1U16V2ZY-2GP
ODD_LED# 13
For HDD & SATA both
CON44+15P+S7-GP
C374
R30 10KR2J-3-GP
HDD Connector
SATA PN : 20.F0794.066 PATA PN : 20.E0021.222
3D3V_S0
C37
IDE_PDIOW# IDE_PDIORDY INT_IRQ14 IDE_PDA1 IDE_PDA0 IDE_PDCS1#
1
S3 S2
C34
5V_S0
2
AA+
C45 SC10U10V5ZY-1GP
RSTDRV#_5 IDE_PDD7 IDE_PDD6 IDE_PDD5 IDE_PDD4 IDE_PDD3 IDE_PDD2 IDE_PDD1 IDE_PDD0
SATA1
5V_S0
ST100U4VBM-10-GP
D35 B240LA-13F-GP
SATA1 SATA1 FCI-CON11-GP-U 13
1
DA0 DA1 DA2 CS0# CS1#
SATA_RXP1 SATA_RXN1
TC27
2
35 33 36 37 38
S6 S5
3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 52
2
IDE_PDA0 IDE_PDA1 IDE_PDA2 IDE_PDCS1# IDE_PDCS3#
B+ B-
ST100U6D3VDM-5
DD15 DD14 DD13 DD12 DD11 DD10 DD9 DD8 DD7 DD6 DD5 DD4 DD3 DD2 DD1 DD0
SCD1U16V2ZY-2GP
18 16 14 12 10 8 6 4 3 5 7 9 11 13 15 17
K
IDE_PDD15 IDE_PDD14 IDE_PDD13 IDE_PDD12 IDE_PDD11 IDE_PDD10 IDE_PDD9 IDE_PDD8 IDE_PDD7 IDE_PDD6 IDE_PDD5 IDE_PDD4 IDE_PDD3 IDE_PDD2 IDE_PDD1 IDE_PDD0
1
5V_S0
2
RESERVED#44 RESERVED#32 RESERVED#11A
R252 470R2J-2-GP 1
1
V12 V12 V12
2
2
13A 14A 15A
HDDCSEL PDIAG RSTDRV#_5
SCD1U16V2ZY-2GP
V5 V5 V5
20 28 34 1 39 31 27 25 23 21 29
A
IDE_PDA0 IDE_PDA1 IDE_PDA2 IDE_PDCS1# IDE_PDCS3#
7A 8A 9A
1
15 15 15 15 15
IDE_PDD15 IDE_PDD14 IDE_PDD13 IDE_PDD12 IDE_PDD11 IDE_PDD10 IDE_PDD9 IDE_PDD8 IDE_PDD7 IDE_PDD6 IDE_PDD5 IDE_PDD4 IDE_PDD3 IDE_PDD2 IDE_PDD1 IDE_PDD0
V33 V33 V33
2
15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15
1A 2A 3A
KEY CSEL PDIAG# RESET# DASP# INTRQ IORDY DIOR# DIOW# DMARQ DMACK#
1
TPAD30 TP91
+5V_MOTOR +5V_LOGIC
2
TPAD30 TP86
42 41
4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50
IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15 IDE_PDDREQ IDE_PDIOR#
HDD1
5V_S0
51 1
1
2
ODD1
2
2
1
RN39 SRN4K7J-6-GP
TC26
1
DY
ST100U6D3VDM-5
K A
D34 SSM22LLPT-GP
1
C402
2
1 2
SCD1U16V2ZY-2GP
1 2
C403
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
C401
C760 SCD1U25V3ZY-3GP
Put near SATA2 Connector
15
20.F0872.011
RN25 SATA_TXP0 SATA_TXN0
2 1
3 4
SATA_TXP1 SATA_TXN1
SATA2
SRN0J-6-GP
Dummy when use IDE
RN29 SATA_RXN0 SATA_RXP0
2 1
3 4
SATA_RXN1 SATA_RXP1
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
SATA2
SRN0J-6-GP
? 0 Ohms closae to SATA2 Connector
Title
ME : 20.F0777.022
Size
HDD and CDROM
Document Number
Rev
MP
MYALL2 Date: Thursday, March 30, 2006
Sheet
20
of
57
USB2
7 5
5V_USB0_S0
8 7 6 5
6 8
EC19 TPS2062D-GP
DY
SCD1U16V2ZY-2GP
1
USB_OC#2 16 USB_OC#3 16
2
1
OC1# OUT1 OUT2 OC2#
2
1
2 3 4
EC20
SKT-USB-105-GP-U 22.10218.J11
DY
SCD1U16V2ZY-2GP
2
1 2
1
C300 SCD1U16V3KX-3GP
GND IN EN1# EN2#
1
1 2 3 4
31 USB_PWR_EN# EC3 SC1000P50V3JN-GP
USB_0USB_0+
2 1 SRN0J-6-GP
2
1
100 mil
2
3 4
U7
5V_USB1_S0
EC1 DY SCD1U16V2ZY-2GP
USBPN0 USBPP0
5V_USB0_S0 5V_S5
TC1 SE150U6D3VDM-GP
16 16
5V_USB2_S0
EC52 SC1000P50V3JN-GP
2
1
EC42 DY SCD1U16V2ZY-2GP
2
TC16 SE150U6D3VDM-GP
1
5V_USB0_S0
RN60
2
1
100 mil
5V_USB2_S0
USB3
1
EC57 SC1000P50V3JN-GP
USBPN2 USBPP2
3 4
USB_2USB_2+
2 1 SRN0J-6-GP
5V_S5
1 2 3 4
GND IN IN EN#
OUT OUT OUT OC#
8 7 6 5
C8 SCD1U16V3KX-3GP
SKT-USB-105-GP-U 22.10218.J11
EC2 DY SCD1U16V2ZY-2GP
2
2
TPS2061D-GP
2 3 4 6 8
USB_OC#5 16
1
31 USB_PWR_EN#
1
16 16
5V_USB1_S0
U1
1
5V_USB0_S0
RN70
2
EC56 DY SCD1U16V2ZY-2GP
2
1
7 5
TC4 SE150U6D3VDM-GP
2
1
100 mil
USB4
7 5
BLUETOOTH MODULE RN83
3D3V_BT_S0 U9
1 2 3
EC21 DY SCD1U16V2ZY-2GP
5
OUT IN GND NC#3 ON/OFF#
1
4
16 16
C364 SC4D7U10V5ZY-3GP 2
USBPN3 USBPP3
3 4
USB_3USB_3+
2 1 SRN0J-6-GP
6 8 SKT-USB-105-GP-U 22.10218.J11
6
EC21 put near BLUE1 / all USB put one choke near connector by EMI request
2 3 4
BLUETOOTH_EN 31
AAT4250IGV-T1-GP
2
1
3D3V_BT_S0
3D3V_S0
74.04250.A3F
1
5V_USB2_S0
RN24
4 3 2
BLUE1 ACES-CON4-1-GP 20.D0197.104
3 4
2 1
USBPN7 USBPP7
16 16 USB1
SRN0J-6-GP 3D3V_BT_S0
1
5V_USB1_S0
RN42
5
16 16
USBPN5 USBPP5
3 4
6 1
USB_5USB_5+
2 1 SRN0J-6-GP
1st source: 20.D0197.104
2 3 4 5 SKT-USB-97-UGP 22.10218.H01
MDC 1.5 CONNECTOR
CHANGE TO AZ MDC1
om l.c
1
Wistron Corporation tm
ai
1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
f@
ho
C490 DUMMY-C2 Title
in
R334
USB / MDC / BLUETOOTH
xa
2nd source: 20.F0604.012
ACZ_BTCLK_MDC 15 C491
Size
he
C23 R23 DY DY SCD47U10V3ZY-GP 10R2J-2-GP 2 1 2 1
3D3V_S5
2
20.F0582.012
TP65 TPAD28
2
AMP-CONN12A-GP
TP64 TPAD28
100KR2J-1-GP
2
C21 SC22P50V2JN-4GP
4 6 8 10 12 17 18
SC4D7U10V5ZY-3GP
2ACSDATAIN1_A 39R2J-L-GP ACZ_RST#
3 5 7 9 11 MH2 16
1
ACZ_SYNC 1 R16
1
15,28 ACZ_SYNC 15 ACZ_SDATAIN1 15,28 ACZ_RST#
15 14 2
2
15,28 ACZ_SDATAOUT
R15 0R2J-2-GP ACZ_SDATAOUT 1 2
13 MH1 1
Document Number
MYALL2
Date: Thursday, March 30, 2006
Rev
MP Sheet
21
of
57
A
B
SCD1U16V2ZY-2GP
AVDD18
SCD1U16V2ZY-2GP
C486 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C507 SCD1U16V2ZY-2GP
1
1
C489
C499 SCD1U16V2ZY-2GP
C523 SCD1U16V2ZY-2GP
2
SC22U6D3V5MX-2GP
1
C493
2
SCD1U16V2ZY-2GP
1
C503
2
SCD1U16V2ZY-2GP
4
DVDD33
1
C508
R335 0R0603-PAD 1 2
2
SCD1U16V2ZY-2GP
1
C527
2
SCD1U16V2ZY-2GP
1
C500
2
1
1
SCD1U16V2ZY-2GP
3D3V_LAN_S5
2
SC22U6D3V5MX-2GP
C506
2
1
AVDD18
2
1 2
C540
C498
DVDD33
40 mils
4
1
C528
2
SCD1U16V2ZY-2GP
1
C530
2
SC4D7U6D3V3KX-GP
1
C525
2
2
E
AVDD33 R333 0R0603-PAD AVDD33 1 2
2
CTRL18
D
EVDD18
1
1
E
20 mils B
C
Q29 2SB1188-U
EVDD18 R345 0R0603-PAD 1 2
2
3D3V_LAN_S5
C
SCD1U16V2ZY-2GP
1
C509
C487 SCD1U16V2ZY-2GP
2
C
2
SCD1U16V2ZY-2GP
1
C
E
2
C504
2
CTRL15
1
2
1
3
20 mils B
Q27 2SB1182-GP
1
3D3V_LAN_S5
C529 SCD1U16V2ZY-2GP
3D3V_S5
DVDD15
1
1
SCD1U16V2ZY-2GP
C505 SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
C488
2
1
1
SCD1U16V2ZY-2GP
C485
2
SC22U6D3V5MX-2GP
C524
2
1
DVDD15
2
2
1
40 mils C510
G24 GAP-CLOSE-PWR-2U 1 2
AGND
3D3V_LAN_S5
R52 0R0603-PAD 1 2 R51 0R0603-PAD 1 2
60 ~ 100 mils C501 SCD1U16V2ZY-2GP
3
3
1
C483 SC15P50V3JN-GP 2 1
2 C482
2 R651 0R0402-PAD
1
ACT_LED# 23 RTL_LED# 23
DVDD33
23 23
MDIP3 MDIN3
DVDD15
1
C511 SCD1U16V2ZY-2GP
2
AT93C46-10SU-1GP
2
1
8 7 6 5
2
2
DVDD15
DVDD33 DVDD15
CTRL15
LAN_X2 LAN_X1 AVDD33 DVDD15 ACT_LED# RTL_LED1#
RTL8111B-GP-U1
VCC DC ORG GND
D28 BAT54-4-GP
1 3
MDIP2 MDIN2
CS SK DI DO
R340 1KR2J-1-GP DVDD15 DVDD33 ISOLATE#
2
23 23
LAN_EESK LAN_EEDI DVDD33 LAN_EEDO LAN_EECS DVDD15
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
1 2 3 4
1
MDIP1 MDIN1
EESK EEDI VDD33 EEDO EECS VDD15 SPICSB VDD15 SPISCK TCS VDD15 VDD33 ISOLATEB SPISI SPISO VDD15
3D3V_S0
DVDD33
U24 LAN_EECS LAN_EESK LAN_EEDI LAN_EEDO
DVDD15
R339 15KR2F-GP
2
23 23
VCTRL18 AVDD33 MDIP0 MDIN0 AVDD18 MDIP1 MDIN1 AVDD18 MDIP2 MDIN2 AVDD18 MDIP3 MDIN3 AVDD18 VDD15 VDD33
NC#17 NC#18 LANWAKEB PERSTB VDD15 EVDD18 HSIP HSIN EGND REFCLK_P REFCLK_N EVDD18 HSOP HSON EGND VDD15
MDIP0 MDIN0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
R338 DY 10KR2J-3-GP
1
AGND DVDD15
ICH_PME# PLT_RST1# PCIE_TXP1 PCIE_TXN1 CLK_PCIE_LAN CLK_PCIE_LAN# PCIE_RXP1 C69 PCIE_RXN1 C74
EVDD18
16 ICH_PME# 7,16,18,26,31,32,34,46,51 PLT_RST1# 16 PCIE_TXP1 16 PCIE_TXN1 3 CLK_PCIE_LAN 3 CLK_PCIE_LAN# 16 PCIE_RXP1 16 PCIE_RXN1
AGND
1
DVDD15 EVDD18
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
23 23
CTRL18 AVDD33 MDIP0 MDIN0 AVDD18 MDIP1 MDIN1 AVDD18 MDIP2 MDIN2 AVDD18 MDIP3 MDIN3 AVDD18 DVDD15 DVDD33
GND RSET VCTRL15 GVDD CKTAL2 CKTAL1 AVDD33 VDD15 LED0 LED1 LED2 LED3 VDD33 VDD15 TD TCLK VDD15
U23 2
R336 3K6R3-GP
65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
R337 2K49R2F-GP 1 2
1
SCD1U16V2ZY-2GP
1
SCD1U16V2ZY-2GP
EEPROM LED OPTION USE '01' (DEFINED IN SPEC) => LED0 : ACT => LED1 : LINK (BOTH 10/100 AND GIGA CHIP)
X2 XTAL-25MHZ-67GP
2
1
C492
2
2
1
C484 SC15P50V3JN-GP 2 1
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
SCD1U10V2KX-5GP 2 SCD1U10V2KX-5GP 2
1 1
Size
Document Number
RTL8111B
Date: Thursday, March 30, 2006 A
B
C
D
Rev
MP
MYALL2
Sheet E
22
of
57
A
B
C
D
1.route on bottom as differential pairs. 2.Tx+/Tx- are pairs. Rx+/Rx- are pairs. 3.No vias, No 90 degree bends. 4.pairs must be equal lengths. 5.6mil trace width,12mil separation. 6.36mil between pairs and any other trace. 7.Must not cross ground moat,except RJ-45 moat.
2
EVDD18
4
R322 0R0402-PAD 1
XF2
1
C13 SCD01U16V2KX-3GP
2
C473 SCD01U16V2KX-3GP
2
1
TCT1
22 22
MDIP3 MDIN3
22 22
MDIP2 MDIN2
1 2 3 4 5 6
RD+ RDRDCT TDCT TD+ TD-
RX+ RXRXCT TXCT TX+ TX-
12 11 10 9 8 7
RJ45_7 RJ45_8 MCT4 MCT3 RJ45_4 RJ45_5
ACT_LED# ACT_LED# C1 SCD1U16V3KX-3GP 2 1 R1 CONN_PWR_B2 2 1 3D3V_S5 470R2J-2-GP LAN1 9 B1 MH1 RJ45_1 RJ45_1 B2
10/100/1000Mbps Lan Transformer
RJ45_2 RJ45_3 RJ45_4 RJ45_5 RJ45_6 RJ45_7 RJ45_8
XF1
1
22 22
MDIP0 MDIN0
1 2 3 4 5 6
RD+ RDRDCT TDCT TD+ TD-
RX+ RXRXCT TXCT TX+ TX-
12 11 10 9 8 7
RJ45_3 RJ45_6 MCT2 MCT1 RJ45_1 RJ45_2
RJ45_2 RJ45_3 RJ45_4 RJ45_5 RJ45_6 RJ45_7 RJ45_8
3
A1 A2 A3
C472 SCD01U16V2KX-3GP
2
C14 SCD01U16V2KX-3GP
2
1
3
MDIP1 MDIN1
4
22
XFORM-208-GP
22 22
E
RJ11_1 RJ11_2 RJ11_3 RJ11_4 MH2 10
RING TIP
XFORM-208-GP RN45 MCT4 MCT3 MCT2 MCT1
1 2 3 4
8 7 6 5
SRN75J-1-GP
C458 SC1KP2KV8KX-LGP 1 2
RJ45-75-GP 22.10245.A41 22
RTL_LED#
2
2
R2 470R2J-2-GP 2 1 CONN_PWR 1
3D3V_S5
2
B2:YELLOW
C2 SCD1U16V3KX-3GP
A1:ORANGE A3:GREEN TIP1
3D3V_S5 add 0.1u near LAN1 by EMI request RING_MDC
1
L1
2 0R0603-PAD
TIP
1
L2
2 0R0603-PAD
RING
Wistron Corporation om
2 4 1
TIP_MDC
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
l.c
3 1
ho
tm
ai
ACES-CON2-1-GP 20.D0197.102
Document Number
Date: Thursday, March 30, 2006 A
B
C
D
MYALL2
Sheet
xa
in
LAN CONN
he
Size
f@
Title
Rev
MP 23
of E
57
1
A
B
C
D
E
C782 should close Pin-P15 and Pin-R17.
2
SCD1U16V2ZY-2GP
P10 P8 P6 L14 L6 J14 J6 F14 F12 F9 F6
25,27
CBB_A[25..0]
25,27
Should be places as close to PCI7412 as possible
C761
SC1KP16V2KX-GP 2 1
1
C762
2
C775
SCD1U10V2KX-4GP
3D3V_S0
1
CBB_A13 27
Bypass/Decupoling Capacitors
2
H14
3
SCD1U10V2KX-4GP
CPAR/A13
* All 1394 signals must be routed on top side only * Differential pairs of each ports should have equal trace length * Stubs must be keep as short as possible
SC1KP16V2KX-GP 2 1
CBB_D3 27 CBB_D4 27 CBB_D11 27 CBB_D5 27 CBB_D12 27 CBB_D6 27 CBB_D13 27 CBB_D7 27 CBB_D15 27 CBB_A10 27 CBB_CE2# 27 CBB_OE# 27 CBB_A11 27 CBB_IORD# 27 CBB_A9 27 CBB_IOWR# 27 CBB_A17 27 CBB_A24 27 CBB_A7 27 CBB_A25 27 CBB_A6 27 CBB_A5 27 CBB_A4 27 CBB_A3 27 CBB_A2 27 CBB_A1 27 CBB_A0 27 CBB_D0 27 CBB_D8 27 CBB_D1 27 CBB_D9 27 CBB_D10 27
CC/BE3#/REG# CC/BE2#/A12 CC/BE1#/A8 CC/BE0#/CE1#
P19 N18 N17 M15 N19 M18 M17 L19 L18 L15 K18 K17 K15 J18 J15 J17 H19 F15 E17 D19 A16 E14 B15 B14 A14 C13 B13 C11 E11 F11 A10 C10
C781
3D3V_S0
C772
PCI7412ZHK-GP CBB_CE1# 27 CBB_A8 27 CBB_A12 27 CBB_REG# 27 SD_CD# 26
3D3V_PLL_S0
1
SD_WP SD_CMD SD_CLK SM_R#
C779
C784 SC1U10V2ZY
1 2
1394_AGND
C780
SC1U10V2ZY
RN85 CardReader SRN10KJ-5-GP
1
3D3V_S0
3D3V_S0
R560 0R0603-PAD 1 2
2
SD_CD#
2
SC1KP16V2KX-GP 2 1
E13 E18 H18 L17
SD_WP/SM_CE# SD_CMD/SM_ALE SD_CLK/SM_RE# MC_PWR_CTRL_1/SM_R/B# MC_PWR_CTRL_0 SD_CD# E7 C5 A4 F8 C8 E9
CAD0/D3 CAD1/D4 CAD2/D11 CAD3/D5 CAD4/D12 CAD5/D6 CAD6/D13 CAD7/D7 CAD8/D15 CAD9/A10 CAD10/CE2# CAD11/OE# CAD12/A11 CAD13/IORD# CAD14/A9 CAD15/IOWR# CAD16/A17 CAD17/A24 CAD18/A7 CAD19/A25 CAD20/A6 CAD21/A5 CAD22/A4 CAD23/A3 CAD24/A2 CAD25/A1 CAD26/A0 CAD27/D0 CAD28/D8 CAD29/D1 CAD30/D9 CAD31/D10
2
26 26
26
4 3
SD_WP SD_CMD SD_CLK SM_R#
26
CBB_A[25..0]
U68A
SD_D[3..0]
CBB_D[15..0]
SC1KP16V2KX-GP 2 1
A15
W8 P1
SD_DAT3/SM_D7 SD_DAT2/SM_D6 SD_DAT1/SM_D5 SD_DAT0/SM_D4
VSSPLL
GND GND GND GND GND GND GND GND GND GND GND P9 P7 N6 M14 K14 K6 H6 G14 F13 F10 F7
26
SD_D[3..0] CBB_D[15..0]
SD_D3 SD_D2 SD_D1 SD_D0
1394_AGND
2
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCCCB
AVDD_33 AVDD_33 AVDD_33
VCCP VCCP
U15 P14 P13
J19 VCCCB
U19 P15
TI PCI7412
U14 U13 R14
71.07412.B0U
R559 0R0603-PAD 1 2
SCD1U25V3ZY-1GP
PAR
2
R558 0R0603-PAD 1 2
1
E6 B5 A5 C6
U7
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C777 C782
R17
R11 P11 U11 V11 W11 R10 U10 V10 R9 U9 V9 W9 V8 U8 R8 W7 W4 T2 T1 R3 P5 R2 R1 P3 N3 N2 N1 M5 M6 M3 M2 M1
AGND AGND AGND
PCI_PAR
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
4
3D3V_S0
VDDPLL_33 VDDPLL_15
VR_PORT VR_PORT
K2 VR_EN#
C/BE3# C/BE2# C/BE1# C/BE0# PCI_AD[31..0]
3
16,30
K19 K1
1 1
C766 C773 1 OF 2
16,25,30 PCI_AD[31..0]
SCD1U16V2ZY-2GP
PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3
P2 U5 V7 W10
16,30 16,30 16,30 16,30
VCC_ASKT_S0
1
SCD1U16V2ZY-2GP 2 2
1394_AGND 3D3V_PLL_S0 4
C
MC_PWR_CTRL 26 MC_PWR_CTRL1_0
Q34 CardReader CHT2222APT-GP
E
B
1
1
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size
TI PCI7412 (1 of 2)
Document Number
Date: Thursday, March 30, 2006 A
B
C
D
Rev
MP
MYALL2
Sheet E
24
of
57
A
B
C
D
E
4
4
1
1 1 1 W12 V12 U12
TP94 TPAD28
T19 1 2 1394_R0T18 R553 6K34R2F-GP R12 C776 SC15P50V2JN-2-GP 1394_XO R18 2 1 1394_XI R19
XO XI
X6 X-24D576MHZ-46GP 82.30023.351
B10 C4 D1 E1 E2 E3 F2 F3 F5 G6 H17 M19
C774 SC15P50V2JN-2-GP 2 1
1
2
2
R1 R0 CPS
3
XD_CD# 26 SM_CLE 26
TP95 TPAD30
MFUNC6 MFUNC5 MFUNC4 MFUNC3 MFUNC2 MFUNC1 MFUNC0 CLK_48 A_USB_EN# CBLOCK#/A19 TEST0 RSVD#G5
J5 H3 G3 G2 L5 P17 J3 J2 J1 H1 H2 H5 G1
R550 2 10KR2J-3-GP 1 R548
1
1
3D3V_PLL_S0
R551 2 4K7R2J-2-GP RN87
INTD#
3 4
PM_CLKRUN# 16,30,31,32 3D3V_S0
2 1
INT_SERIRQ INT_PIRQF# INT_PIRQB# INT_PIRQG#
SRN4K7J-8-GP
INTC# INTB# INTA#
F1 E10 H15 P12 G5
PCI_SPKR 28
2
47KR2J-2-GP
16,30,31,32 16 16 16
INTA# INTB# INTC# INTD#
CARBUS 1 (INT_PIRQG#) 1394 (INT_PIRQB#) Flash Media (INT_PIRQF#) SD Host (INT_PIRQG#) share
CLK48_CARDBUS MFUNC4:3 CBB_A19 27 MC_PWR_CTRL-1
use bit 19-16 Register define.
1
1394_R1
SM_CD#
CBB_A16 27 CBB_WP 27 CBB_RESET 27
R540 DY 100R2J-2-GP
TP87 TPAD30
1 2
1394_TPA0P 1394_TPA0N
2
2
26 26
A3 B4 B8
1
GRST# PCLK PRST#
1394_AGND
SUSPEND# SPKROUT SDA SCL RI_OUT#/PME# PHY_TEST_MA
CCD1#/CD1# CCD2#/CD2#
1394_TPB0P 1394_TPB0N
TPBIAS1 TPBIAS0 TPB1P TPB1N TPB0P TPB0N TPA1P TPA1N TPA0P TPA0N
F18 A11 C15
3D3V_S0
IDSEL:AD22 INTA-->:INT_PIRQG# INTB-->:INT_PIRQB# INTC-->:INT_PIRQF# INTD-->:INT_PIRQG# GNT:PCI_GNT#0 REQ:PCI_REQ#0
CVS1/VS1# CVS2/VS2#
W17 R13 V15 W15 V13 W13 V16 W16 V14 W14
XD_CD#/SM_PHYS_WP# SM_CLE SM_CD#
N15 B11
1394_TPBIAS1 2 SCD1U25V3ZY-1GP
MS_DATA3/SD_DAT3/SM_D3 MS_DATA2/SD_DAT2/SM_D2 MS_DATA1/SD_DAT1/SM_D1 MS_SDIO/DATA0/SD_DAT0/SM_D0 MS_CLK/SD_CLK/SM_EL_WP# MS_CD# MS_BS/SD_CMD/SM_WE#
A13 B16
B6 A6 C7 B7 A7 A8 E8
CAUDIO/BVD2/SPKR# CDEVSEL#/A21 CFRAME#/A23 CGNT#/WE# CINT#/READY/IREQ# CIRDY#/A15 CPERR#/A14 CREQ#/INPACK# CSERR#/WAIT# CSTOP#/A20 CSTSCHG/BVD1/STSCHG#/RI# CTRDY#/A22
MS_D3 MS_D2 MS_D1
MSCSDIO MS_CLK MS_CD# MSCBS
26 26
NC#E5
MS_D[3..1]
MS_D[3..1]
1 C783 26 1394_TPBIAS0
R538 33R2J-2-GP
CCLK/A16 CCLKRUN#/WP/IOIS16# CRST#/RESET
B12 F19 E19 G17 E12 F17 G19 C14 C12 G18 A12 G15
26
TI PCI7412
LATCH/VD3/VPPD0 CLOCK/VD1/VCCD0# DATA/VD2/VPPD1
26 26 26
1
TRDY# STOP# SERR# REQ# PERR# IRDY# IDSEL GNT# FRAME# DEVSEL#
C9 A9 B9
26
W5 V6 W6 L3 R7 V5 R552 7412_IDSEL N5 2 100R2F-L1-GP-U L2 R6 U6
RSVD#B10/D2 RSVD#C4/VD0/VCCD1# RSVD#D1 RSVD#E1 RSVD#E2 RSVD#E3 RSVD#F2 RSVD#F3 RSVD#F5 RSVD#G6 RSVD#H17/A18 RSVD#M19/D14
3
16,30 PCI_TRDY# 16,30 PCI_STOP# 16,30 PCI_SERR# 16 PCI_REQ#0 16,30 PCI_PERR# 16,30 PCI_IRDY# 16,24,30 PCI_AD22 16 PCI_GNT#0 16,30 PCI_FRAME# 16,30 PCI_DEVSEL#
PCI7412ZHK-GP
2 OF 2
U68B
2
CLK48CARDBUS C764
DY
SC10P50V2JN-4GP
K5 L1 K3
2 GAP-CLOSE 1394_AGND
PC2 PC1 PC0
G82
1
TP93 TPAD28 TP92 TPAD28
E5
TP88 TPAD28
PCIRST1# 16,27,30 PCLK_PCM 3 3D3V_S0
27
CBB_CD2# 27 CBB_CD1# 27 CBB_VS2# 27 CBB_VS1# 27 CBB_A22 27 CBB_BVD1# 27 CBB_A20 27 CBB_WAIT# 27 CBB_INPACK# 27 CBB_A14 27 CBB_A15 27 CBB_RDY 27
CBB_D2 CBB_A18 CBB_D14 CB_LATCH CB_CLOCK CB_DATA CBB_BVD2# CBB_A21 CBB_A23 CBB_WE#
om
1 R536 2 43KR2J-GP 27 27 27 27 27 27 27 27 27
ai
l.c
1
ho
tm
Wistron Corporation in
f@
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
xa
Title
TI PCI7412 (2 of 2)
he
Size
Document Number
Date: Thursday, March 30, 2006 A
B
C
D
Rev
MP
MYALL2
Sheet E
25
of
57
1
A
B
C
D
E
Mini Card Connector 3D3V_S0
L17 1394 FILTER-79-GP 69.10084.071
1D5V_S0 MINIC1
4
25 1394_TPA0P
CN2
3
7
4
1
1
R554 1394 56R2J-4-GP
C785
2 3
L16 1394 FILTER-79-GP 69.10084.071
8 4
TPA0+ TPA0TPB0+
4 3 2
TPB0-
1
2 5
6 SKT-1394-4P-2 62.10027.561
1394
R556 1394 56R2J-4-GP
2
2
2
2
R555 1394 56R2J-4-GP
R557 1394 56R2J-4-GP
1
1
C710 SCD1U16V2ZY-2GP
1
1
1 2
25 1394_TPBIAS0
Place near MINIC2
1
1
4 9 15 18 21 26 27 29 34 35 40 50 53 54
TPAD30
2
GND GND GND GND GND GND GND GND GND GND GND GND GND GND
SMB_CLK 16,18 SMB_DATA 16,18 TP80
C723 SC1U10V2ZY
SCD1U16V2ZY-2GP
WAKE# CLKREQ# PERST#
1 7 22
C728 SC1U10V2ZY
1
SMB_CLK SMB_DATA
30 32
16 16
25 1394_TPB0N
1394
1394
R561 1394 5K1R2-GP
SC220P50V3JN-GP
SC1U10V3ZY-6GP
2
2
PLT_RST1# 7,16,18,22,31,32,34,46,51
C786
SKT-MINI52P-3-GP 20.F0832.052
SC1U10V3ZY-6GP
C749
CardReader
SCD1U16V2ZY-2GP
C778
CardReader
U67
1 2 3
C748
OUT IN GND NC#3 ON/OFF#
5 4
MC_PWR_CTRL 24
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
CardReader
R549 CardReader 100KR2J-1-GP 1 2 SD_WP
NP1 NP2
3D3V_S0
1
CardReader
1
C752
2
R541 CardReader 100KR2J-1-GP 1 2 MSCBS
3D3V_CR_S0
1
LED_WWAN# LED_WLAN# LED_WPAN#
3
3D3V_CR_S0
2
42 44 46
USBPN1 USBPP1
C707
1
1
LED_WPAN# WLAN_LED# LED_WWAN#
USB_DUSB_D+
36 38
C684
2
1
PCIE_TXN3 16 PCIE_TXP3 16
1 4
1
TP79
RESERVED#3 RESERVED#5 RESERVED#8 RESERVED#10 RESERVED#12 RESERVED#14 RESERVED#16 RESERVED#17 RESERVED#19 RESERVED#20 RESERVED#37 RESERVED#39 RESERVED#41 RESERVED#43 RESERVED#45 RESERVED#47 RESERVED#49 RESERVED#51
PETN0 PETP0
NP1 NP2
TPAD28
13,30 WLAN_LED# TP78 TPAD28
+3.3VAUX
PCIE_RXN3 16 PCIE_RXP3 16
31 33
3D3V_S5
25 1394_TPA0N 25 1394_TPB0P
2
1 2
3
3 5 8 10 12 14 16 17 19 20 37 39 R488 41 10KR2J-3-GP 43 45 47 49 51
+3.3V
23 25
1D5V_S0
2
24
PERN0 PERP0
3D3V_S0
1
+1.5V +1.5V
CLK_PCIE_MINI2 3 CLK_PCIE_MINI2# 3
2
28 48
13 11
SCD1U16V2ZY-2GP
3.3V
REFCLK+ REFCLK-
1
2
52
30,31 WIRELESS_EN
1.5V
2
6
AAT4250IGV-T1-GP 74.04250.A3F
2
3D3V_S5
1394 Connector
C745
CardReader
SC1U10V3ZY-6GP
CardReader
R539 CardReader 100KR2J-1-GP 1 2 SD_CLK R535 CardReader 22KR2J-GP 1 2 SM_R#
SD_D[3..0]
SD_D[3..0]
SD_D0 SD_D1 SD_D2 SD_D3 MS_D[3..1]
MS_D[3..1] 25
MS_D1 MS_D2 MS_D3
2
24
2
CARD1 25 24 24 24 25 24 25 25
XD_CD# SM_R# SD_CLK SD_WP SM_CLE SD_CMD MSCBS MSCSDIO
XD_CD# SM_R# SD_CLK SD_WP SM_CLE SD_CMD MSCBS
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
MS_CLK-R MSCSDIO MS_D1 MS_D2 MS_D3 SD_D0 SD_D1 SD_D2 SD_D3 3D3V_CR_S0
NP1 NP2 24
SD_CD#
SD_CD#
40 1 39 41
SD_WP
1
XD_1P XD_2P XD_3P XD_4P XD_5P XD_6P XD_7P XD_8P XD_9P XD_10P XD_11P XD_12P XD_13P XD_14P XD_15P XD_16P XD_17P XD_18P
MS_1P MS_2P MS_3P MS_4P MS_5P MS_6P MS_7P MS_8P MS_9P MS_10P
20 21 22 23 24 25 26 27 28 29
SD_1P SD_2P SD_3P SD_4P SD_5P SD_6P SD_7P SD_8P SD_9P
30 31 32 33 34 35 36 37 38
GND GND GND
44 43 42
NP1 NP2 SW XD_SW SD_SW#39 SD_SW#41
MSCBS MS_D1 MSCSDIO MS_D2 MS_CD# MS_D3 R532 0R0402-PAD MS_CLK-R 1 2 3D3V_CR_S0
MS_CD#
25
MS_CLK
25
MS_D3 MSCBS 3D3V_CR_S0 MS_CLK-R MSCSDIO MS_D1 MS_D2
1
CARD-PUSH-41P-GP-U 20.I0036.001
XD MS / MS PRO SD / SD IO / MMC
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
CardReader Title
MINI CARD / 1394 / CARD READER Size
Document Number
Date: Friday, March 31, 2006 A
B
C
D
Rev
MYALL2
Sheet
E
MP 26
of
57
5
4
3
2
1
PCMCIA Socket Cardbus I/F
CBB_IORD# CBB_A9
1 2
SC1KP16V2KX-GP 2 1
SC4D7U10V5ZY-3GP
C756
2
C763
1
CBB_IOWR# C
CBB_A8 CBB_A17 C757 CBB_A13 SCD1U25V3ZY-1GPCBB_A18 CBB_A14 CBB_A19 CBB_WE# CBB_A20 CBB_RDY CBB_A21
1
1
2
2
VPP_ASKT_S0
C743 C747 SCD1U25V3ZY-1GP SC4D7U10V5ZY-3GP
CBB_A16 CBB_A22 CBB_A15 CBB_A23 CBB_A12 CBB_A24 CBB_A7 CBB_A25 CBB_A6 CBB_VS2#
CBB_A16
CBB_A5 CBB_RESET CBB_A4 CBB_WAIT# CBB_A3
B
CBB_INPACK# CBB_A2
1
CBB_REG# CBB_A1
Place close to pin 19.
CBB_BVD2#
2
C744 DUMMY-C2
Clock AC termination 33MHz clock for 32-bit Cardbus card I/F
CBB_A0 CBB_BVD1# CBB_D0 CBB_D8 CBB_D1 CBB_D9 CBB_D2 CBB_D10 CBB_WP CBB_CD2#
3D3V_S0
13
5V_S0 C742 SC4D7U10V5ZY-3GP
C754
DY PC1
1
4
2
3
DATA CLOCK LATCH RESET# SHDN#
AVCC AVCC
9 10
AVPP
8
C751
1 SCD1U16V2ZY-2GP
2
VPP_ASKT_S0
1
R530 2 10KR2J-3-GP
1
3 4 5 12 21
C746
3.3V
TPAD28 TP85 TP82 TPAD28
1 2
OC#
15
5V 5V
7 20
NC#24 NC#23 NC#22 NC#19 NC#18 NC#17 NC#16 NC#14 NC#6
24 23 22 19 18 17 16 14 6
12V 12V
11 25
GND GND
C753 SCD1U16V2ZY-2GP
R531 100KR2J-1-GP
2
CBB_A11
CB_DATA CB_CLOCK CB_LATCH PCIRST1#
1
CBB_CE2# CBB_OE# CBB_VS1#
25 25 25 25 25 25
VCC_ASKT_S0
U66 25 25 25 16,25,30 5V_S0
SC1U10V3ZY-6GP 2
CBB_A10
25 25
1
CBB_D15 VCC_ASKT_S0
Power switch 25 25
SCD1U16V2ZY-2GP 2
CBB_CE1#
CBB_CE1# 24 CBB_CE2# 24 CBB_BVD1# CBB_BVD2# CBB_CD1# CBB_CD2# CBB_VS1# CBB_VS2#
D
1
CBB_CD1# CBB_D4 CBB_D11 CBB_D5 CBB_D12 CBB_D6 CBB_D13 CBB_D7 CBB_D14
24,25
2
CBB_D3
24,25
CBB_A[25..0] CBB_IORD# 24 CBB_IOWR# 24 CBB_OE# 24 CBB_WE# 25 CBB_REG# 24 CBB_RDY CBB_WP CBB_RESET 25 CBB_WAIT# CBB_INPACK#
CN1
NP1 1 35 2 36 3 37 4 38 5 39 6 40 7 41 8 42 9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 59 26 60 27 61 28 62 29 63 30 64 31 65 32 66 33 67 34 68 NP2
CBB_D[15..0]
1
CBB_A[25..0]
2
CBB_D[15..0]
D
C
TPS2220APWPRG-GP 74.02220.A7G
CARDBUS-SKT43-GP 21.H0056.011
B
om
2
1
CARDBUS68P-11-GP 62.10024.601 C741 DY SCD01U16V2KX-3GP
ai
l.c
A
ho
tm
Wistron Corporation
Size
Document Number
Date: Thursday, March 30, 2006 5
4
3
2
PCMCIA
he
Title
xa
in
f@
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Rev
MP
MYALL2
Sheet 1
27
of
57
A
A
B
C
D
E
4
4
5VA_S0
C431 SC22P50V2JN-4GP
R281 28K7R2F-GP
U15
1
SHDN# SET
2
GND
3
IN
5VA_SET
5
2
2
1
1
5V_S0
4
R280 10KR2F-2-GP
1 C423 SC10U10V5ZY-1GP
2
OUT
G923-330T1UF-GP C434 SC1U10V3KX-3GP
2
2
1
1
5VA_S0
25
PCI_SPKR
1 SCD47U10V3ZY-GP
2 C413
5VA_S0
3D3V_S0
"VAUX" Pull high to enable standby mode
1
2 C405
R257 1KR2J-1-GP
1
2
ACZ_RST# 15,21 ACZ_SYNC 15,21 ACZ_BITCLK 15 2 1 R284 10KR2J-3-GP
AUD_MICIN_L
LINE1-L LINE1-R LINE2-L LINE2-R
SC1U10V3ZY-6GP SC1U10V3ZY-6GP
29 31
LINE1-VREFO LINE2-VREFO
34 13
12 11 10 6 33
44 43 LFE-OUT CEN-OUT
SENSE_B SENSE_A
5 8
SPDIFO SPDIFI/EAPD
48 47
SIDESURR-OUT-L SIDESURR-OUT-R
45 46
SURR-OUT-L SURR-OUT-R
39 41
FRONT-OUT-L FRONT-OUT-R
35 36
ACZ_SDATAOUT 15,21 ACZ_SDATAIN0 15
AC97_DATIN 1 R258 2 39R2J-L-GP
SPDIF 29 G1421_MUTE 29
R262 4K7R2J-2-GP
2
AUD_LOL 29 AUD_LOR 29
CD-L CD-R CD-GND 18 20 19
ALC883-1-GP
GPIO0 GPIO1
2 1
MIC1-VREFO-R MIC1-VREFO-L MIC2-VREFO
2 3
2 1
R282 2K2R2J-2-GP
32 28 30
JDREF PIN37_VREFO
MIC1V_R MIC1V_L
VREF
2
40 37
R283 2K2R2J-2-GP 1 2 1 2
ALC 883
MIC1-L MIC1-R MIC2-L MIC2-R
27
ALC883_MIC1_L 21 ALC_883MIC1_R 22 16 17
1 1
AVSS1 AVSS2 DVSS1 DVSS2
AUD_MICIN_R
SDATA-OUT SDATA-IN
1
23 24 14 15
2 2
2 29
C418 C420
ALC861_LINE_IN_L ALC861_LINE_IN_R
SC1U10V3ZY-6GP SC1U10V3ZY-6GP
26 42 4 7
R285 0R0402-PAD
C430 C432 1 1
PCBEEP RESET# SYNC BIT-CLK VAUX
1 9 25 38 DVDD1 DVDD2 AVDD1 AVDD2
2 2
1
29
LINE_IN_L LINE_IN_R
3
SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP
C407 SC100P50V3JN-2GP
U14
29 29
C433 SCD1U10V2KX-4GP
2
2
1
C422
C406
2
1 SCD47U10V3ZY-GP
C411
2
KBC_BEEP
2AUDIP_PC_BEEP
SC1U10V3KX-3GP
SRN47KJ-1-GP 31
C408 1
AUDIO_BEEP
1
5 6 7 8
2
CB_SPKR_1 4 1 2 C404 3 KBC_BEEP_1 2 SCD47U10V3ZY-GP SPKR_SB_1 1
1
ACZ_SPKR
2
16 3
1
RN40
71.00883.A0G
C791 C790 SC4D7U10V5ZY-3GP SC4D7U10V5ZY-3GP
SYS_LOUT_IN#
29
TPAD30 TPAD30
DY
C435
R266 4K99R2F-L-GP
SCD47U10V3ZY-GP
1
SC10U10V5ZY-1GP
1
C436
2
2
1
2
TP61 TP63
1
1
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Date: A
B
C
D
AZALIA CODEC - ALC883 Document Number
Rev
MYALL2 Sheet
Thursday, March 30, 2006 E
MP 28
of
57
A
B
C
D
E
AUDIO OP AMPLIFIER I/P signal level need +5V level 5V_S0 4
R279 1 2 0R0603-PAD
1
DY
13
1
R579 100KR2J-1-GP
C419 SC1U10V3ZY-6GP
3
E
R581 100KR2J-1-GP
G1421_MUTE
5
2
6
1
LINE_IN_R
1
28
LINE_IN_L
1
B
SC2D2U16V5ZY-2GP
2 1
C425
Q36 2N3906-3-GP-U
R584 100KR2J-1-GP
E
2
2
R269 10KR2J-3-GP
R583 49K9R2F-L-GP 1 2 C
1
RB731U-1GP-U R270 10KR2J-3-GP
2
EC66 SC1KP16V2KX-GP
PHONE-JK234-GP 22.10133.B11
EC67 SC1KP16V2KX-GP
2
KBC_MUTE_GPIO8
R274 2 AUD_LINE_R 1KR2J-1-GP R271 2 AUD_LINE_L 1KR2J-1-GP
LINE OUT
5VA_OP_S0
R268 10KR2J-3-GP SYS_LOUT_IN
4
Q18 1 GND
R2
5
5V_S0
ON/OFF# NC#3 GND IN OUT
3 2 1
4 3 2
SPKR_R+
1
SCD1U16V2ZY-2GP
2
SPKR1 ACES-CON4-1-GP 20.D0197.104
EC70
C414 AAT4250IGV-T1-GP SCD1U16V2ZY-2GP
5V_SPDIF_S0
2
DTC114EUA-1-GP
SPKR_LSPKR_L+ SPKR_R-
SRC100P50V-2-GP ERC10 8 7 6 5
3 OUT
R1
1
2 IN
1
SYS_LOUT_IN#
2
2
2
U12
5
R267 10KR2J-3-GP
6
Internal Speaker
1 1
2
1 2 3 4
2
R263 100KR2J-1-GP
1
SYS_LOUT_IN C437 SC4D7U10V5ZY-3GP
R582 100KR2J-1-GP
1
1
GAP-CLOSE-PWR
28 1
MUTE_5
1
2
2
1
1
28
5VA_OP_S0
1 1
3
2 2
4
G17
10KR2J-3-GP R272 10KR2J-3-GP R273
KBC_MUTE
2
31
NP2 NP1 5 4 3 6 2 1
1
Q35 2N3906-3-GP-U
B
SC2D2U16V5ZY-2GP
LIN2
1
1 G1432Q5U-GP
LINE IN
2
R580 49K9R2F-L-GP 1 2 C410
2
2 16
2
11
3
D18
5VA_OP_S0
AUD_LOR 28 5VA_OP_S0 1
LBYPASS RBYPBASS
SC1U10V3ZY-6GP R265 10KR2J-3-GP C417 SOUND_R_OP1 2 SOUND_R2 2 1 1 R264 10KR2J-3-GP SPKR_R+ SOUND_R_OP1 2 1 SPKR_R-
18 17 19 12
C
IN1#/IN2
NC#6 NC#8 NC#23
3
5V_S0
5
VOL LVDD RVDD 6 8 23
MUTE
DY
RIN1 RIN2 ROUT+ ROUT-
GND GND
2
C415 SC1U10V3ZY-6GP
LIN1 LIN2 LOUT+ LOUT-
14 25
1
1 2 24 7
SHUTDOWN
AUD_LOL
GND/HS GND/HS GND/HS GND/HS
28
20 4 15
U13 SC1U10V3ZY-6GP C416 R259 10KR2J-3-GP 1 2 SOUND_L2 1 2 SOUND_L_OP1 R260 10KR2J-3-GP SOUND_L_OP1 SPKR_L+ 1 2 SPKR_L-
R261 10KR2J-3-GP 2
TP62 TPAD28
9 10 21 22
1 2
2
C421 SC10U10V5ZY-1GP
1
C412 SCD1U16V2ZY-2GP
1 2
2
C424 SCD1U16V2ZY-2GP
C409 SC10U10V5ZY-1GP
1
AMP_SHUTDOWN 31
2
4
1st source: 20.D0197.104 LOUT1
om l.c ai tm
1
EC63
Wistron Corporation ho
2 SC330P50V2KX-3GP
1
EC64
2 SC330P50V2KX-3GP
C788 SC680P50V2KX-2GP
1
C789
SC680P50V2KX-2GP 2
R563
PHONE-JK237-GP-U
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
f@
SPKR_R_A1
22.10205.251
in
SPKR_L_A1
2 R565 22R2J-2-GP
xa
2 R566 22R2J-2-GP
1
1
PHONE-JK233-GP 22.10133.B01
1
GND VCC VIN
Title
he
SPKR_R+1
C845 SC10U6D3V6MX-2GP R564
SPDIF
1
2
1
1
1KR2J-1-GP
EC69 SC1KP16V2KX-GP
AUD_LOR
9 8 7 16 6 5 4 2 3 1 NP1 NP2
28 SYS_LOUT_IN#
C844 SC10U6D3V6MX-2GP AUD_LOL 1 2 SPKR_L+1
2
EC68 SC1KP16V2KX-GP
1
AUD_MIC_L 1
2 R275 1KR2J-1-GP
2
10KR2J-3-GP R276 10KR2J-3-GP R277
1 1
1
AUD_MIC_R
2
28 AUD_MICIN_R 13 INT_MIC 28 AUD_MICIN_L
NP2 NP1 5 4 3 6 2 1
28
1KR2J-1-GP 2
R278 1KR2J-1-GP 1 2
2 2
1
LIN1
2
MIC IN
AUDIO AMP AND JACK Size
Document Number
Rev
A
B
C
MP
MYALL2 Date: Thursday, March 30, 2006 D
Sheet E
29
of
57
1
A
B
C
D
E
PCI_AD[31..0]
16,24,25 PCI_AD[31..0]
3D3V_S0
BT_COEX2 PCI_C/BE#3 PCI_AD23
16,24 PCI_C/BE#3
PCI_AD21 PCI_AD19 PCI_AD17 PCI_C/BE#2
16,24 PCI_C/BE#2 16,25 PCI_IRDY#
3
16,25,31,32 PM_CLKRUN# 16,25 PCI_SERR# 16,25 PCI_PERR# 16,24 PCI_C/BE#1
PCI_C/BE#1 PCI_AD14 PCI_AD12 PCI_AD10 PCI_AD8 PCI_AD7 PCI_AD5 CVBS PCI_AD3 5V_S0
AUDIO-RIGHT
SCD1U16V2ZY-2GP
1 2
SCD1U16V2ZY-2GP
1 2
2 2 PCI_AD21 R94 100R2J-2-GP
R117 100KR2J-1-GP WLAN_LED# 13,26
PCI_PAR 16,24
PCI_AD18 PCI_AD16
D PCI_FRAME# 16,25 PCI_TRDY# 16,25 PCI_STOP# 16,25
80211_ACTIVE
3
2N7002PT-U Q10
1 G
PCI_DEVSEL# 16,25 PCI_AD15 PCI_AD13 PCI_AD11
S D
PCI_AD9 PCI_C/BE#0
PCI_C/BE#0 16,24
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0
WIRELESS_EN
2N7002PT-U Q9
1 G
INT_SERIRQ 16,25,31,32
S
AUDIO-LEFT
Q26 CHDTC124EU-1GP
1
PCISLT124-4-GP 62.10032.061
TVIN1
1 4
CN3
Layout 75 ohm
AVIN 2 5 3
1 2 3
RF
YTH-CONN5-1-GP-U
1
AVIN
GND IN GND IPEX-CON3 20.G0005.001
20.90045.001
AVIN 8
S-VIDEO-Y
1
CVBS AUDIO-RIGHT S-VIDEO-C AUDIO-LEFT
4 2 5 7 6 3
CN3 close to JK1
GND
IN
31 WLAN_TEST_LED
JK1
2
R2
124 126
1
R1
123
PCI_AD22 PCI_AD20
TPAD28 TP71
3D3V_S0 C161 SC22P50V2JN-4GP
OUT
2
PCI_AD1
PCI_AD28 PCI_AD26 PCI_AD24 MOD_IDSEL
TP72
3
PCI_AD27 PCI_AD25
TPAD28
TPAD28
PME#_MINI BT_COEX1 PCI_AD30
2
TP77
PCI_GNT#1 16
3
PCI_AD31 PCI_AD29
PCIRST1# 16,25,27 3D3V_S0
2
PCI_REQ#1
3
16
4
2
3 PCLK_MINI
5V_S0 INT_PIRQE# 16
S-VIDEO-Y
C187
1
S-VIDEO-C
C186
2
INT_PIRQE# 3D3V_S0
PIN 3-16 : LAN RESERVE
C162 SCD1U16V2ZY-2GP
26,31 WIRELESS_EN
4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122
1
80211_ACTIVE
125 2
3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121
2
4
1
1
MINI1
9
AV-IN
MINDIN7-15-GP-U
1
22.10021.F41
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size
Document Number
MINI-PCI / AV-IN
Date: Thursday, March 30, 2006 A
B
C
D
Rev
MP
MYALL2
Sheet E
30
of
57
A
B
C
D
E
3D3V_AUX_S5 5V_S0 C44 SC18P50V2JN-1-GP 1 2 KCOL[18..1]
33
KROW[8..1]
33
KBC_XO
8 7 6 5
KCOL[18..1] 3D3V_AUX_S5
KROW[8..1]
G
1 2 3 4
1
S
D
G
1
R60 10KR2J-3-GP
D
S
E51CS# BAT_IN# KBC_BB_ENABLE# WEBCAM_PW_SW PM_PWRBTN#
STDBY_LED# 13 INTERNET# 33 MAIL# 33 PM_SLP_S4# 16,41 CHG_3S_4S# 42 PM_SUS_STAT# 16,32 CRT_DEC 14 CAP_LED# 13 FRONT_PWRLED# 13
3
KBC_MUTE 29 KEY5# 33
GPIO6_KBC
3D3V_AUX_S5
GMODULE_RST# 46 WIRELESS_BTN# 13
KBRCIN# KA20GATE
KEY4#
RN47 43 43
33 BAT_IN#
WLAN_TEST_LED 30 ECSMI# 16 WIRELESS_EN 26,30 PM_CLKRUN# 16,25,30,32 FPBACK 13 NUM_LED# 13
ECSMI#
2 1
BAT_SCL BAT_SDA
43
3 4 SRN8K2J-3-GP
R53 DY 10KR2J-3-GP KBC_SLP_WAKE 2 1 PLT_RST1# 7,16,18,22,26,32,34,46,51 R34 DY 10KR2J-3-GP 2 1
3D3V_S5
BLUETOOTH_EN 21 DC_BATFULL# 13 BLT_LED#_1 13 BLT_LED#_2 13 MAIL_LED# 33 CHARGE_LED# 13
PRE_CHG R50 100KR2J-1-GP
VCC3VSB KBC_PCIRST# KBC_BL_ON
AMP_SHUTDOWN 1 2 R49 0R0402-PAD
29
C57 SC1U10V3ZY-6GP
C51 SC150P50V2JN-3GP
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7
KB3910SF-2-GP
1
1
G1 GAP-OPEN
SC1U6D3V2KX-GP
B
2 1
CH3906PT-GP Q2
3 4
RSMRST# 19
RN5
GMODULE_RST# GPIO6_KBC S5_ENABLE
KBC_SLP_WAKE
R59 8K2R2J-3-GP
A1 for the internal pull-up resistors on XIOCS[F:0] pins==>High=enable,Low=Disable A4 for DMRP==>High=Disable,Low=Enable
R58 8K2R2J-3-GP
R141 8K2R2J-3-GP
5V_AUX_S5
1
ai
21 USB_PWR_EN#
tm
GPIO05 for Clock test mode==>High=test Mode,Low=32KHz clock in normal running(Recommended) GPIO06 for DPLL test mode==>High=Test Mode,Low=Normal operation(Recommended)
1
A5 for EMWB==>High=Enable,Low=Disable
Title
A
B
C
D
ho f@
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
in
Wistron Corporation CIR_SENSE
xa
0R0402-PAD 2
he
CIR
R35 1
2
R36 DY 10KR2J-3-GP
32
om
1
Place near K/B Connector (TOP side)
l.c
PM_SLP_S3# KBC_PWRBTN# AC_IN# KBC_LID# KBC_SLP_WAKE
7
NV_BL_ON 51
SRN10KJ-5-GP
C29
C 16,18,35,40,41,45,56 33 42 33 16
BL_ON
G72
EC_RST# ECSCI#
R47 0R2J-2-GP 1 2
1
DA0 DA1 DA2 DA3 DA4 DA5 DA6 DA7
PM_PWRBTN# RSMRST#_KBC S5_ENABLE BRIGHTNESS
2
R46 UMA 0R2J-2-GP 1 2
2
2
R13 10KR2J-3-GP
1
1
160 158
BAT_SCL BAT_SDA KBC_SCL2 KBC_SDA2
163 164 169 170 SCL1 SDA1 SCL2 SDA2
1
168 175 171 165 162 156
R654 10KR2J-3-GP
3D3V_AUX_S5
2
1
16 16 39 13
KBC_BB_ENABLE#
ECSWI#
A1
CIR_SENSE
KBC_BEEP
16
BRIGHTNESS
28
RSMRST#_KBC
SRN10KJ-5-GP
81 82 83 84 87 88 89 90
43 40 39 38 37 36 33 32
4 3
TCLK_5 TDATA_5
99 100 101 102 1 42 47 174
RN3
GPWU0 GPWU1 GPWU2 GPWU3 GPWU4 GPWU5 GPWU6 GPWU7
SRN10KJ-4-GP
1 2
XCLKO XCLKI
KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7 KROW8
71 72 73 74 77 78 79 80 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16 KCOL17 KCOL18
49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68 153 154
161 VCCBAT
PS/2
GPIOI2D GPIO2F GPIO2E GPIO2C GPIO2B GPIO2A
R21 100KR2J-1-GP
2
PSDAT3 PSCLK3 PSDAT2 PSCLK2 PSDAT1 PSCLK1
1
117 116 115 114 111 110
TDATA_5 TCLK_5
2 26 29 30 44 76 172 176
5V_S0
33 33
PWM7 PWM6 PWM5 PWM4 PWM3 PWM2 PWM1 PWM0
2
1 2 3 4
98 97 94 93 92 91
R57 100KR2J-1-GP
2
RN4
8 7 6 5
GPIO1F GPIO1E GPIO1D GPIO1C GPIO1B GPIO1A
R14 100KR2J-1-GP
3D3V_S5
13
1
5V_S0
41 28 27 25 24 23
3D3V_S0
2
CH731UPT-GP
GPIO0F GPIO0E GPIO0D GPIO0C GPIO0B GPIO0A
TP1
3D3V_AUX_S5
2
ECSCI#
MATRIXID2# 34 MATRIXID1# 34 PRE_CHG 42 BLT_BTN# 13 CHG_ON# 42 AD_OFF 43 WEBCAM_PW_SW
E
3
E51TXD
GND GND GND GND GND GND
4
ECSCI#_1
17 35 46 122 137 167
KBRCIN#
KB3910
2
2
X-bus ROM
155 149 148 119 118 109 108 107 106 105 86 85 75 70 69 63 62 55 54 48 22 21 20 12 11 8 6 5 4 3
2
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
GPIO29 GPIO28 GPIO27 GPIO26 GPIO25 GPIO24 GPIO23 GPIO22 GPIO21 GPIO20 GPIO19 GPIO18 GPIO17 GPIO16 GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO09 GPIO08 GPIO07 GPIO06 GPIO05 GPIO04 GPIO03 GPIO02 GPIO01 GPIO00
SMB_CLK_W 19 SMB_DATA_W 19
1
124 125 126 127 128 131 132 133 143 142 135 134 130 129 121 120 113 112 104 103
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
AGND BATGND
KBRCIN#_1
5
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
LPC
96 159
KA20GATE
2 Q7 2N7002PT-U
KB Matrix
ECRST# ECSCI#
1
3
2
D0 D1 D2 D3 D4 D5 D6 D7
KBC_SCL2 KBC_SDA2
1
138 139 140 141 144 145 146 147
U3
2
KBC_D0 KBC_D1 KBC_D2 KBC_D3 KBC_D4 KBC_D5 KBC_D6 KBC_D7
2 Q6 2N7002PT-U
1
RD# WR# MEMCS# IOCS#
3
2
150 151 173 152
C42 SC18P50V2JN-1-GP 1 2
1
KBCBIOS_RD# KBCBIOS_WE# KBCBIOS_CS#
KBC_XI
2
LFRAME# LCLK SERIRQ
4
1
9 18 7
3D3V_S0
4
2
LAD0 LAD1 LAD2 LAD3
RN6 SRN10KJ-4-GP
X1 RESO-32D768KHZ-GP
1
15 14 13 10
19 31
D6
6
1 VCC VCC VCC VCC VCC VCC VCC VCCA
LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3
3
KA20GATE_1
2 16 34 45 123 136 157 166 95
1
C17 SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
C25
LPC_LAD[3..0]
34 KBCBIOS_RD# 34 KBCBIOS_WE# 34 KBCBIOS_CS# KBC_D[7..0] KBC_D[7..0]
34
16
3D3V_KBC_AUX_S5
2
0R0603-PAD
15,32,34 LPC_LFRAME# 3 PCLK_KBC 16,25,30,32 INT_SERIRQ
15
3
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17
1 L3
15,32,34 LPC_LAD[3..0]
15
2
1 2
SCD1U16V2ZY-2GP
1
C73
2
C53 SCD1U16V2ZY-2GP
2
C16 SCD1U16V2ZY-2GP
1
3D3V_AUX_S5 4
Size
Document Number
Date:
Friday, March 31, 2006
KBC ENE
Rev
MP
MYALL2 Sheet
E
31
of
57
5
4
3
2
1
D
D
LPC_LAD[3..0] LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3
LPC_LAD[3..0]
15,31,34
LPC_LDRQ0# 15 PLT_RST1# 7,16,18,22,26,31,34,46,51 INT_SERIRQ 16,25,30,31 LPC_LFRAME# 15,31,34
3D3V_S0
IR
2 NC#42 NC#33 NC#37 NC#39 NC#41 NC#4 NC#18 NC#26 NC#29 NC#31
42 33 37 39 41 4 18 26 29 31
C537 DUMMY-C2 1
VSS VSS VSS
CLK14_SIO_RC 2
PC87381-VBH-GP 71.87381.A0G
9 23 34
IRRX1 IRRX2_IRSL0/GPIO17 IRTX
C546 DUMMY-C2 1
B
IRRX1 IRSL0 IRTX
5 7 6
11 12 13 14 15 17 21 19 22 20
B
PCLK_SIO_RC 2
C
R355 DUMMY-R2
2
43 25
IR
SIO PC87381
Connecting a 10 K external pull-down resistor makes the base address sample low, setting the Index-Data pair at 2Eh-2Fh.
R363 DUMMY-R2
CLKIN LCLK
16 27 28 30 LDRQ#/XOR_OUT LRESET# SERIRQ LFRAME#
32 36 38 40
CTS1# DCD1# DSR1# RI1# SIN1 VCORF DTR1#_BOUT1/BADDR RTS1#/TRIS# SOUT1/TEST#
GPIO00 GPIO01 GPIO02 GPIO03 GPIO04 GPIO20 GPIO21/LPCPD# CLKRUN#/GPIO22 GPIO23 RESERVED/GPO24
1 44 45 3 46 VCORF 10 BADRR_STRAP 2 47 48 R359 IR 10KR2J-3-GP
2
SCD1U16V2ZY-2GP
1
IR
2
C543
1
VDD VDD VDD
U29
1
1
PCLK_SIO 3
SCD1U16V2ZY-2GP
LAD0 LAD1 LAD2 LAD3
IR
SCD1U16V2ZY-2GP
C539
8 24 35
1
1
IR
SC1U10V3ZY-6GP
C547
2
2
C
2
1
CLK14_SIO 3 C542
3D3V_S0
R365 IR 10KR2J-3-GP 1 2
PM_CLKRUN# 16,25,30,31 LPCPD#
1
2
PM_SUS_STAT# 16,31
R366 DUMMY-R2
VISHAY FIR/CIR Module IR
,C583 near Pin1 and Pin6
SCD1U16V2ZY-2GP
C794
IR
1
IR
R568 IR 10KR2J-3-GP
SCD1U16V2ZY-2GP
IRTX IRRX1 IRSL0
2
SC10U10V5ZY-1GP
C793
1
IR
2
2
C795
1
R569 DY 0R2J-2-GP 1 2
1
3D3V_AUX_S5
R570 0R2J-2-GP 1 2
2
3D3V_S0
Layout Guide: (1) FIR_3D3V : 30 mils, (2) C583, C581 close to U32 Place C581
A
31
U71
1 2 3 4 5 6 7 8
VCC2/IRED_ANODE IRED_CATHODE TXD RXD SD VCC1 RC-RXD GND FIR-TFDU7100-GPU 56.15001.091
CIR
A
IR
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
IR_GND G25 GAP-CLOSE 1 2
Title Size
IR_GND
Document Number
SIO 87381 / IR
Date: Thursday, March 30, 2006 5
4
3
2
Rev
MP
MYALL2 Sheet 1
32
of
57
A
B
C
D
E
Cover Up Switch
1
3D3V_AUX_S5
3D3V_S5
R4 10KR2J-3-GP
SW2
4
1
1
SW3
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
3
1 K
1 2 R9 120R2F-GP
R8 120R2F-GP
2
2 4
1
1
2
2 1 3 SCRL2 1
MAIL LED FOR BUTTON SIDE
SW-TACT-59-GP-U1 62.40009.431
SCRL3 1
3
4
1 2
ACES-CON12-GP 20.K0174.012
3
4
SW-TACT-59-GP-U1 62.40009.431 SCRL4 1
TP_SCROLL_DOWN 2
LEFT1
1
TP_LEFT 2
5
E-Button
3
2nd source: 62.40009.341
3
5
SW-TACT-59-GP-U1 62.40009.431
SW-TACT-45-U1-GP 62.40009.431
TP_RIGHT TP_SCROLL_RIGHT TP_SCROLL_UP TP_SCROLL_LEFT TP_SCROLL_DOWN TP_LEFT
TP_SCROLL_RIGHT 2
5
MAIL_LED# 31
SCD1U16V2ZY-2GP
TP_SCROLL_LEFT 2
4
EC13 SC47P50V2JN
1
5 LED1 LED-Y-47-GP
2
1 C9
5
Morar_SB
SC47P50V2JN
1 LED2 LED-G-62-GP
POWER LED FOR BUTTON SIDE
TP_SCROLL_UP 2
2 3 4 5 6 7 8 9 10 11 12 14
TP_DATA TP_CLK
4 3 SRN100J-3-GP EC12
SCRL1 1
5V_S0
5V_S0
Program Button 2
1 2
TDATA_5 TCLK_5
1
4
TPAD1
RN13 31 31
SRC100P50V-2-GP ERC9
SW-TACT-45-U1-GP 62.40009.431
C225 <2nd> SC1U10V3ZY-6GP
13 1
C4 SCD1U16V2ZY-2GP
2
3
R7 470R2J-2-GP
EC14 DY SCD1U16V2ZY-2GP RN12 SRN10KJ-5-GP
KBC_PWRBTN# 31
4 3 2 1
5
5V_S0
3 4
2
1
A
1
5 6 7 8
1 2
TOUCH PAD
2
2nd source: 20.K0185.012
3
4
2
MAIL# 31 INTERNET# 31 KEY4# 31 KEY5# 31
SRN470J-3-GP RN1
Power Button
SW1 1
ACES-CON2-1-GP 20.D0197.102
KBC_LID# 31
C3 SCD22U16V3ZY-GP
R6 10KR2J-3-GP
2
SW5
SCD1U16V2ZY-2GP
C12
SW-TACT-45-U1-GP 62.40009.431 3
8 7 6 5
PWRBTN#
2
4
KBC_LID#
2
5V_S0
1 2 3 4
SW4
5
2 SC100P50V2JN-3GP
1
1
100R2F-L1-GP-U
2 4
3D3V_AUX_S5
SW-TACT-45-U1-GP 62.40009.431 MAIL#_1 INTERNET#_1 KEY4#_1 KEY5#_1
3
EC4
COVER_SW#
4
SW-TACT-45-U1-GP 62.40009.431
1
R3
3 1
1
C11
4
MAIL_LED#
5
2
5
LID1
SRN10KJ-4-GP
2
C10
1 2 3 4
2
3
1
2
2
1
8 7 6 5
1
MAIL#_1 INTERNET#_1 KEY4#_1 KEY5#_1
Mail Button
2
Internet Button
2
RN2
RIGHT1 1
TP_RIGHT 2
5
4
3
SW-TACT-59-GP-U1 62.40009.431
5
4
3
SW-TACT-59-GP-U1 62.40009.431
4
SW-TACT-59-GP-U1 62.40009.431
EMI Bypass cap. 1 2 3 4
KCOL5 KCOL6 KCOL7 KCOL8
1 2 3 4
SRC100P50V-2-GP ERC2 DY 8 7 6 5
KCOL1 KCOL2 KCOL3 KCOL4
1 2 3 4
SRC100P50V-2-GP ERC1 DY 8 7 6 5
KCOL9 KCOL10 KCOL11 KCOL12
1 2 3 4
SRC100P50V-2-GP ERC3 DY 8 7 6 5
KROW1 KROW2 KROW3 KROW4
1 2 3 4
SRC100P50V-2-GP ERC5 DY 8 7 6 5
Internal KeyBoard CONN 1
25
1 2 3 4
SRC100P50V-2-GP ERC4 DY 8 7 6 5
KCOL13 KCOL14 KCOL15 KCOL16
........ CHECK KB SPEC. AND PIN DEFINE
om
ERC8 DY SRC100P50V-2-GP 1 8 2 7 3 6 4 5
l.c
1
TP_SCROLL_UP TP_SCROLL_LEFT TP_SCROLL_DOWN TP_LEFT
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size
BUTTONs / KB / TOUCHPAD
Document Number
SRC100P50V-2-GP Date: Thursday, March 30, 2006 A
B
C
2
ai
C77 SC100P50V2JN-U 1 2
ERC7 DY SRC100P50V-2-GP 1 8 2 7 3 6 4 5
tm
KROW8
KCOL18
C76 SC100P50V2JN-U 1 2
8 7 6 5
TP_DATA TP_CLK TP_RIGHT TP_SCROLL_RIGHT
ho
1
KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7 KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16 KCOL17 KCOL18
26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2
KB1 ETY-CON26-2-GP 20.K0127.026
KCOL17
DY
ERC6 KROW5 KROW6 KROW7 KROW8
f@
31
in
KCOL[18..1]
27
28
31
xa
KCOL[18..1] 2
KROW[8..1]
he
KROW[8..1]
D
Rev
MP
MYALL2
Sheet E
33
of
57
1
A
B
C
D
E
1
3D3V_AUX_S5
2
C787 SCD1U16V2ZY-2GP U69
3
31 KBCBIOS_CS# 31 KBCBIOS_RD# 31 KBCBIOS_WE# R572 10KR2J-3-GP 2
1
3D3V_AUX_S5
26 28 11 47 12
CE# OE# WE# BYTE# RESET#
45 43 41 39 36 34 32 30 44 42 40 38 35 33 31 29
RY/BY#
15
NC#14 NC#13 NC#10 NC#9
14 13 10 9
A0
LPC_LAD[3..0]
15,31,32 LPC_LAD[3..0]
4
GOLDEN FINGER FOR DEBUG BOARD 5V_S0 KBC_D7 KBC_D6 KBC_D5 KBC_D4 KBC_D3 KBC_D2 KBC_D1 KBC_D0
5V_S0 U70
KBC_D[7..0]
KBC_D[7..0]
TOP VIEW
31 7,16,18,22,26,31,32,46,51 PLT_RST1# 15,31,32 LPC_LFRAME# 3
A15
(B1)
A14
(B2)
A2
(B14)
A1
(B15)
PLT_RST1# LPC_LFRAME#
PCLK_FWH
PCLK_FWH
R567 DY 100R2J-2-GP
46 27
GND GND
31
1
Q15/A-1 Q14 Q13 Q12 Q11 Q10 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
2
A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
1
VCC
16 17 48 1 2 3 4 5 6 7 8 18 19 20 21 22 23 24 25
2
A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1
....
31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31
....
37 4
PCLKFWH C792 DY
15
FWH_INIT#
FWH_INIT# LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0 EXT_FWH# 3D3V_S0
SC10P50V2JN-4GP
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15
PLT_RST1# LPC_LFRAME# PCLK_FWH FWH_INIT# LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0 EXT_FWH#
TP99 TPAD30
3D3V_S0
FOX-GF30 ZZ.GF030.XXX
3
MX29LV800CBTC-GP 72.29800.0F9
R571 10KR2J-3-GP 1 2
(BOTTOM VIEW)
72.29800.0F9 FOR LEAD FREE ROM SIZE MAX. 1MB
3D3V_S0
2
2 1
2
3 4
SRN10KJ-5-GP RN15
PH at ICH6M SW6 16
MATRIXID1# MATRIXID2#
1
31 31
1 2 3 4
PSW_CLR#
SW-DIP-4-2-U2-GP 62.40013.061
EC16 DY SC1000P50V3JN-GP
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
2
1
5 6 7 8
Title Size
BIOS Document Number
Date: Thursday, March 30, 2006 A
B
C
D
Rev
MP
MYALL2
Sheet E
34
of
57
1
Run Power 5V_S0 DCBATOUT
Q12 TP0610K-T1-GP
R124
RUN_POWER_ON
2
Q37 2N7002PT-U
1
D D D D
3D3V_S5
8 7 6 5
AO4422-1-GP
1D8V_S3 U46
1 2 3 4
R144 G72 0R2J-2-GP 1 2
1 G
D D D D
8 7 6 5
2
S S S G
AO4422-1-GP
S
1
G72
R2
2
2
1
C230 DUMMY-C2
G72
GND
IN
PM_SLP_S3#
S S S G
1D8V_S0 Q38 2N7002PT-U
3
2
U36
1 2 3 4
R1
Q11 CHDTC124EU-1GP
8 7 6 5
AO4422-1-GP 3D3V_S0
D
OUT
G S
D D D D
3
3
D
S S S G
K A
MMGZ5242BPT-GP
2
D11
330KR2J-L1-GP
1
R145
R126 1KR2J-1-GP PM_SLP_S3 2
R653 100R2F-L1-GP-U 1 2
SCD1U50V3ZY-GP
G
2
1
C234
1
3
1
2
D
2
R125 330KR2J-L1-GP 1 2RUN_POWER2
16,18,31,40,41,45,56
1 2 3 4
RUN_POWER_ON
10KR2J-3-GP
3D3V_S0
5V_S5 U37
SCD1U16V2ZY-2GP RUN_POWER1
S
1
C602 1
Aux Power 3D3V_AUX_S5
1 2
1
C308
R219 DY 10KR2F-2-GP
DY
Ry
om
C307
l.c
C305 SC10U10V5ZY-1GP
1
DY
2
1 2
2
4
Output = 3.3V output=1.25(1+(Rx/Ry))
tm
C656 DY SC1U50V5ZY-1-GP
OUT
3D3V_G913_SET
ai
1
C661
DUMMY-C3
2
ho
Wistron Corporation Title Size
xa
in
f@
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
RUN POWER and 3D3V_AUX_S5 he
DY
5
1
1 LP2951CDR2G-GP
8 7 6
2
OUTPUT INPUT SENSE FEEDBACK SHUTDOWN VO TAP 100mA GND ERROR# OUTPUT
1
1 2 3 4
G913CF-GP
5
Rx R218 DY 16K5R2F-1-GP
2
C675 DY SC1U10V3ZY-6GP
DUMMY-C5
1 2
1 2
DY
SCD1U16V2ZY-2GP
C313 SC1U10V3ZY-6GP
U57 C671
C312
DCBATOUT
SC10U10V5ZY-1GP
C663 DY SCD1U16V2ZY-2GP 1 2
SET
SC1U10V3ZY-6GP
C309
5V_AUX_S5
SHDN# GND IN
SC1U10V3ZY-6GP
1 2 3
DY 2
U8
C306
1
R650 0R0402-PAD 1 2
SC22P50V2JN-4GP 2 1
R649 0R0402-PAD 1 2
3D3V_AUX_S5
3D3V_AUX_S5
2
3D3V_AUX
1
5V_AUX_S5
2
5V_AUX
Document Number
Date: Thursday, March 30, 2006
Rev
MYALL2
Sheet
MP 35
of
57
5
4
3
2
1
Max8744 3D3V/5V CPU_CORE Intersil ISL6262
Input Power
Output Signal PGOOD1(OD / 5V)
VID Setting
H_VID0 D
Output Signal
VID0(I / 1.05V)
H_VID1
PGOOD(OD / 3.3V)
VID1(I / 1.05V)
H_VID2
VID2(I / 1.05V)
H_VID3
CLK_EN#(O)
DCBATOUT 6262_PWRGOOD
VIN
PGOOD2(OD / 5V) D
CLK_EN# Output Power
VID3(I / 1.05V)
H_VID4
VID4(I / 1.05V)
H_VID5
Output Power
VID5(I / 1.05V)
H_VID6
VID6(I / 1.05V)
VCC_CORE_PWR(O)
Input Signal
PSI# CPUCORE_ON PM_DPRSLPVR H_DPRSTP#
5V_DC_S5 (5A)
5V(O) VCC_CORE_S0(Imax=48A) Input Signal
PSI# (I / 3.3V) PGD_IN (I / 3.3V)
Max8744_ON3
DPRSLPVR (I / 3.3V) Max8744_ON5
DPRSTP# (I / 3.3V)
3D3V_DC_S5 (5A)
3D3V(O)
ON3 ON5
Voltage Sense VCC_SENSE
VSEN(I / Vcore)
C
VSS_SENSE
C
RTN(I / Vcore) Input Power
DCBATOUT_6262
VCC(I)
0D9V_S3 5V_S0
5V_S5
VCC(I)
VIN
1D8V_S0
3D3V_S0
PM_SLP_S3# Input Power 5V_S5 DCBATOUT
Charger_ISL6255 B
CHG_ON#/OFF BAT_IN#
KBC_SCL0 KBC_SDA0 CHG_I_PRE_SEL
AC_IN
A
AD+
VLDOIN
ISL6269_VGA_Core 1D0V
VCC(I)
Input Signal EN (I / 3.3V) THM (I / 3.3V)
Output Signal
CHLIM (IO / 5V)
1D0V (O)
S3 VTTREF
PM_SLP_S5#
S5
1D0V (7.2A)
TPS51100
VIN
B
AC_IN
ACPRN (O / 3.3V)
Input Signal CHARGE_LED#
XTAL2/PB4 (O/5V)
PM_SLP_S3#
PGOOD
SCL (IO / 5V) SDA (IO / 5V)
VCC
Output Power
VTT
Output Power
Adapter
EN Output Signal
AD_OFF
PG
DCBATOUT
VCC (O)
Output Signal
BT+
5V_AUX_S5
PB0/MOSI/AIN0
DC_IN+
(O)
Input Power AD_JK
VCC (O)
Input Signal (I)
Output Power AD+
VCC(O)
VCC(I) VCC(I)
A
Input Power DCIN (I)
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
Power Block Diagram Size
Document Number
Date: Friday, March 24, 2006 5
4
3
2
Rev
MP
MYALL2
Sheet 1
36
of
57
5
4
3
DCBATOUT_6262 DCBATOUT_6262
1
5V_S0
1
1
DCBATOUT
2
3D3V_S0
1 2
2 1
48 3V3
PGOOD
GND_T
BOOT1
6262_UGATE1
35 36 6262_BOOT1
2
31 27
VID0
6262_VID1 38
VID1
UGATE2
6262_VID2 39
VID2
BOOT2
6262_VID3 40
VID3
6262_VID4 41
VID4
6262_VID5 42
VID5
28
6262_PHASE2
38
LGATE2
30
6262_LGATE2
38
45
DPRSLPVR
PGND2
29
6262_DPRSTP#
46
DPRSTP#
6262_CLKEN#
47
CLK_EN#
ISEN2
C708
2
2
R474 10KR3J-L1-GP 1 2
6262_ISENP2
38
6262_ISENN2
38
DY R475 0R3-0-U-GP
1 R484
2 1R3F-GP
B
1 ISL6262CRZ-T-GPU
1 DFB
R493 1KR3F-GP
6262_DFB R505 3K24R3F-1-GP 1 2
1
R445 NTC-10K-9-GP
Place close to phase 1 chocke C717 SCD22U10V2KX-1GP
6262_AGND
G11
1 1 C713
2 SC180P-GP
6262_VO
2
om
C721
U64
R490 11KR2F-L-GP
GAP-CLOSE-PWR
l.c
C719 SCD01U25V2KX-3GP 6262_VSEN
18 6262_VO
17
VW
C711
6262_AGND
ai
COMP
15 2
C
1 2 R519 11K5R3F-GP
C712
6262_RTN
1
ho
tm
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
6262_AGND
When test without cpu,change to 0 ohms
38
CPU_GND
38
If VCC_SENSE and VSS_SENSE pins have pulled resistors to VCC_CORE_S0 ==> Remove R44/R45/R46/R47.
CPU Vcore Power_1
xa
Title CPU_CORE
he
R503 10R3J-3-GP 1 2 R504 10R3J-3-GP 1 2
Size
Document Number
Date: Thursday, March 30, 2006 5
4
3
2
in
f@
6262_AGND
6262_VSUM
FB
1
C718
VSUM
19
2 SC1000P50V3JN-GP
FB2
RTN
6262_VW 9
38
R489 2K61R3F-GP
2
A
1
R509 2 0R3-0-U-GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
1
5 VCC_SENSE
R507 2 0R3-0-U-GP
2
1
6262_OCSET
VO
C738 SC47P50V3JN-GP 1 2
5 VSS_SENSE
8
2
6262_COMP10
6262_ISENN1
2
11
2 SCD033U25V3KX-GP C729
R523 4K42R3F-GP 1 2
OCSET VDIFF
DROOP
1
1
6262_AGND
SCD22U10V3KX-2GP
6262_COMP_1 2 61K9R2F-GP
1 2 C724 SC390P50V3JN-GP
25
6262_VSUM_2
6262_FB
1 R522
23 6262_ISEN2
1
6262_FB212 2KR2F-3-GP
2
6262_VSUM 1
C727
16
2
38
R467 3K65R3F-GP
1
6262_DPRSLP
6262_DROOP
1 DY R521
6262_ISENP1
1R3F-GP
2
VR_ON
VSEN
6262_FB2_1
B
R472 2 6262_BOOT2_1 0R3-0-U-GP C700 SCD22U16V3ZY-GP
1 R466
1
44
13
38
PHASE2 VID6
6262_CORE_ON
6262_VDIFF 2 SC470P50V2KX-3GP
2 SC4D7U10V5ZY-3GP 6262_UGATE2
26 6262_BOOT2 1
2 1K82R3F-GP
1 C725
1 C701
2
SOFT
14
R512 1 2 1K4R3F-1-GP
1
5V_S0
NTC
NC 1 R514
1
C703
2
CLK_EN#
VR_TT#
PVCC
6262_VSUM 1 2 R464 3K65R3F-GP 1 2 DY R483 R465 10KR3J-L1-GP 0R3-0-U-GP
1
4,15 H_DPRSLP#
ISEN1
24 6262_ISEN1
2
16 PM_DPRSLPVR
RBIAS
6262_VID0 37
6262_VID6 43
0R0402-PAD 2 0R0402-PAD 2 0R0402-PAD 2 0R0402-PAD 2
33
SCD22U16V3KX-1-GP
R506 1 R508 1 R510 1 R511 1
CPUCORE_ON
6
6262_SOFT7 2 SCD015U25V3KX-GP
1
38
PGND1
2
C726
LGATE1 PGD_IN
SCD033U25V3KX-GP
6262_AGND
38
6262_LGATE1
2
6262_NTC
2 NTC-470K-1-GP
6262_PHASE1
1
6262_RBIAS 4 2 147KR2F-GP 5
34 32
2
6262_PGD_IN3
PHASE1 PSI#
1
2
38
R471 2 6262_BOOT1_1 0R3-0-U-GP C702 SCD22U16V3ZY-GP
1
1
2
6262_AGND VIN 20
22
6262_PSI#
1 R513
6262_AGND
6262_NTC_1 1 2 4K02R3F-GP R446 2 SCD01U16V2KX-3GP R482 0R0402-PAD H_VID0 1 2 R485 0R0402-PAD H_VID1 1 2 R486 0R0402-PAD H_VID2 1 2 R487 0R0402-PAD H_VID3 1 2 R491 0R0402-PAD H_VID4 1 2 R492 0R0402-PAD H_VID5 1 2 R494 0R0402-PAD H_VID6 1 2
3
UGATE1
1
CPUCORE_ON
C735 1
40 CPUCORE_ON
GND
SCD22U16V3KX-1-GP
C
H_VID[6..0]
49
VGATE_PWRGD 7,16 D
2
R516 0R0402-PAD 1 2 R515 0R0402-PAD 1 2
PSI#
4 CPU_PROCHOT#
5
21
R517 0R0402-PAD 1 2
2
4
Place close to phase 1 chocke 1 R524
6262_PWRGOOD
6262_AGND
GAP-CLOSE-PWR
6262_AGND
C310
VCC
GAP-CLOSE-PWR G6 2
2
1
1
1
GAP-CLOSE-PWR G5 2
C311
2
1
GAP-CLOSE-PWR G4 2
R518 1K91R3F-GP
6262_VIN
1
GAP-CLOSE-PWR G8 2
SCD1U25V3ZY-1GP
1
GAP-CLOSE-PWR G7 2
SC1U10V3ZY-6GP
1
GAP-CLOSE-PWR G10 2
6262_5VS0_VCC
D
R220 10R3J-3-GP
R221 10R3J-3-GP
2
1
G9
1
Rev
MP
MYALL2
Sheet 1
37
of
57
A
5
4
3
2
1
DCBATOUT_6262
1
TC47 ST15U25VDM-1-GP
2
1
ST15U25VDM-1-GP
2
1 2
1 2
1 2
1 2
1 2
1
TC46
TC48
DY
ST15U25VDM-1-GP
1
1
1
2
TC19
2
1
1
G53 GAP-CLOSE-PWR
TC21
2
2
2 1
G55 GAP-CLOSE-PWR
TC9
2
4 3 2 1 5 6 7 8 U51 FDS6676AS-GP
Iomax=44A
VCC_CORE_S0
C645 SCD1U50V3ZY-GP
DY
6262_ISENN1
37
6262_ISENP1
37
4 3 2 1
4 3 2 1
S S S G
S S S G
Id=15A Qg=48nC, Rdson=6.2~7.5mohm
ST15U25VDM-1-GP
5 6 7 8
5 6 7 8 4 3 2 1
D D D D
D D D D
U52 FDS6676AS-GP
TC45
L36 2 L-D36UH-1-GP
1
5 6 7 8
6262_LGATE1
Panasonic ETQP4LR36WFC 10*11.5*4mm 0.34uH / 24A DCR=1.1mohm
SE330U2VDM-L-GP
6262_PHASE1
37
C670 SCD1U50V3ZY-GP
SE330U2VDM-L-GP
6262_UGATE1
37
C690 DY SC10U25V0KX-3GP
D
SE330U2VDM-L-GP
37
C689 DY SC10U25V0KX-3GP
U54 FDS6690A-3-GP
S S S G
S S S G
Id=9.3A Qg=9.8, Rdson=19.6~24mohm
D D D D
U53 FDS6690A-3-GP
D D D D
D
C692 DY SC10U25V0KX-3GP
2
C691 DY SC10U25V0KX-3GP
2
1
DCBATOUT_6262
C
C
PANASONIC 330uF / 2V / V size ESR=9mohm / Iripple=3.7A
1
C669 SCD1U50V3ZY-GP
2
1 2
1
C687 DY SC10U25V0KX-3GP
Panasonic ETQP4LR36WFC 10*11.5*4mm 0.34uH / 24A DCR=1.1mohm L35
B
1
B
2
G54 GAP-CLOSE-PWR
4 3 2 1
37
6262_ISENP2
37
6262_ISENN2
1
1
37
CPU_CORE
G100 GAP-CLOSE-PWR 2 1
37
CPU_GND
G101 GAP-CLOSE-PWR 2 1
TC18
2
2
2
G52 GAP-CLOSE-PWR
4 3 2 1
1 S S S G
Id=15A Qg=48nC, Rdson=6.2~7.5mohm
2
2
5 6 7 8
5 6 7 8
D D D D
S S S G
U49 FDS6676AS-GP
TC20
SE330U2VDM-L-GP
D D D D
U50 FDS6676AS-GP
TC10
SE330U2VDM-L-GP
6262_LGATE2
1
L-D36UH-1-GP SE330U2VDM-L-GP
37
C688 DY SC10U25V0KX-3GP
2
1
U48 FDS6690A-3-GP
4 3 2 1
4 3 2 1
C686 DY SC10U25V0KX-3GP
2
2
C685 DY SC10U25V0KX-3GP
1
6262_PHASE2
S S S G
6262_UGATE2
37
D D D D
37
S S S G
Id=9.3A Qg=9.8, Rdson=19.6~24mohm
D D D D
U47 FDS6690A-3-GP
5 6 7 8
5 6 7 8
1
DCBATOUT_6262
If VCC_SENSE and VSS_SENSE pins have pulled resistors to VCC_CORE_S0 ==> Remove R44/R45/R46/R47.
A
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size
CPU Vcore Power_2 Document Number
Date: Thursday, March 30, 2006 5
4
3
2
Rev
MP
MYALL2
Sheet 1
38
of
57
5
4
3
2
1
DCBATOUT_51120
G83
1
2
G61
1
GAP-CLOSE-PWR G88 2
1
GAP-CLOSE-PWR G89 2
1
GAP-CLOSE-PWR G90 2
1
1
4 3 2 1
DY
Switcher ON
EN3,EN5
not use
LDO ON
VREG3 on
1
1
1 1
1 2
B
TC31 SE220U6D3VM-4GP
G99
1
51120_GND
Vout=1V*(R1+R2)/R2 C814
DY
51120_GND
For TPS51120, Vout=5V 1. If you use 2. If you use 3. If you use Vout=3.3V 1. If you use 2. If you use 3. If you use
om
2
DY
a 6.8uH inductor, the minimum ESR is 70m ohm. a 4.7uH inductor, the minimum ESR is 48m ohm. a 3.3uH inductor, the minimum ESR is 34m ohm.
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
a 4.7uH inductor, the minimum ESR is 51m ohm. a 3.3uH inductor, the minimum ESR is 36m ohm. a 2.5uH inductor, the minimum ESR is 27m ohm.
Title Size
3D3V_S5 & 5V_S5
Document Number
Date: Thursday, March 30, 2006 4
2
GAP-CLOSE-PWR
51120_GND
1
2
TC30
2
R607 22KR2F-GP
2
2
NIPPON 220uF ESR=15mohm
l.c
Swithchr ON
DY
ai
not use
GAP-CLOSE-PWR G98 2
tm
EN1,EN2 Switcher OFF
1
ho
ADJ.
GAP-CLOSE-PWR G97 2
f@
not use
1
in
N/A
GAP-CLOSE-PWR G96 2
xa
ADJ.
1
he
not use
51120_GND
GAP-CLOSE-PWR G95 2
DY
1
1
N/A
5V Fixed Output 3.3V Fixed Output
1
180k/CH1 280k/CH2
2
220k/CH1 330k/CH2
1
280k/CH1 430k/CH2
2
380k/CH1 590k/CH2
C813
3D3V Iomax=5A OCP>10A
R605 13KR2F-GP
SC680P50V3JN-GP
D-Cap MODE
DY
1
C
GAP-CLOSE-PWR
DY R604
2
2
S S S G
SC33P50V3JN-GP
D D D D
U75 FDS6690DS-GP
51120_COMP2_PL
CURRENT MODE
C812
SC1000P50V3JN-GP
N/A
3D3V_PWR
51120_COMP2
SC390P50V3JN-GP
N/A
PWM
C811
GAP-CLOSE-PWR G94 2
2
C810
DY
1
3D3V_S5
1
51120_DRVH2 51120_LL2
L43 IND-4D7UH-104-GP
1
R600 0R0402-PAD 51120_TONSEL 1 251120_VREF2
R606 30KR2F-GP 51120_COMP1_PL
PWM
V5FILT
SC390P50V3JN-GP
AUTOSKIP
AUTOSKIP /FAULTS OFF
FLOAT
DY
DY
VREF2
1
ST15U25VM-1-GP
ST220U6D3VDM-13GP 30K9R3F-GP
151120_SKIPSEL 32 31
U74 FDS6612A-1-GP
R603 0R0603-PAD
51120_CS2
1
GAP-CLOSE-PWR G93 2
TC50
S S S G
51120_GND 51120_CS1
1
DCBATOUT_51120
2
51120_DRVH1 51120_DRVH2
2 GAP-CLOSE-PWR G92 2
1
1 27 14
51120_COMP1
GND
2
2 7 2
20 22 23 18
2
CS1 CS2
PGND1 PGND2 GND GND 24 17 5 33
TPS51120RHBR-GPU1
DRVH1 DRVH2
8744_PG3 41
D D D D
SC1000P50V3JN-GP
U60
25 16
2 0R2J-GP 2 0R2J-GP
2
VREF2
DRVL1 DRVL2
51120_PGD1 1 51120_PGD2 R5971 R599 51120_DRVL1 51120_DRVL2
1
4
30 11
2
51120_VREF2
PGOOD1 PGOOD2
1
3D3V_PWR
51120_VFB2
5
GAP-CLOSE-PWR G87 2
D
GAP-CLOSE-PWR
R595 100KR2J-1-GP
5 6 7 8
VO1 VO2
R594 100KR2J-1-GP
15 26
51120_DRVL2
LDO OFF
1
5V_S5
G91
4 3 2 1
1 8
51120_LL2 51120_LL1
LL2 LL1
51120_GND
VFB2
GAP-CLOSE-PWR G86 2
NIPPON 220uF ESR=15mohm
51120_GND
5 6 7 8
5V_PWR 3D3V_PWR
1 2 R602 15KR2F-GP
VFB1
1
2
VFB2 VFB1
1 2 R601 15KR2F-GP B
TC29 SE220U6D3VM-4GP
R590 7K5R2F-1-GP
3D3V_S0
2
6 3
3D3V_S5
COMP2 COMP1
51120_VFB2 51120_VFB1
EN1 EN2 EN3 EN5
51120_V5FILT
TONSEL
2
51120_DRVL1
SKIPSEL TONSEL
R596 0R0603-PAD 1 2 1 2 R598 0R0603-PAD
29 12 10 9
VBST1 VBST2
51120_EN1 51120_EN2
V5FILT VIN
28 13
19 21 VREG3 VREG5
R593 0R0603-PAD 1 2 1 2 R592 0R0603-PAD
51120_GND
A
1
GAP-CLOSE-PWR G85 2
DY
C807
COMP
1
51120_VFB1
TC28
2
1
SC33P50V3JN-GP
DY
1
R589 0R0603-PAD 51120_COMP2 1 2 R591 0R0603-PAD 51120_COMP1 1 2
1
51120_V5FILT
C802 51120_V5FILT
C806 SC10U10V5KX-2GP
R588 30KR2F-GP
2
1
C805 SC10U10V5KX-2GP
2 TP97 TPAD30 TP98 TPAD30
C804 SCD1U50V3ZY-GP
51120_VREG3
3D3V_AUX
DY S S S G
5V_AUX
DY
1
U73 FDS6690DS-GP
2
251120_LL1_1 1 251120_VBST1 0R3J-3-GP SCD1U50V3ZY-GP 51120_VREG5
S5_ENABLE
2 4 3 2 1
251120_LL2_1 1 251120_VBST2 0R3J-3-GP SCD1U50V3ZY-GP C803
SKIPSEL
1
5V Iomax=5A OCP>10A
2
2
51120_LL2 1 R586
1
DCBATOUT_51120
51120_LL1 1 R587
31
2
5 6 7 8
1 C801
51120_DRVH1 51120_LL1
5V_PWR
5 6 7 8
51120_GND
L42 IND-4D7UH-104-GP
4 3 2 1
C800
GAP-CLOSE-PWR
C
5V_PWR
C799 SCD1U50V3ZY-GP
R585 51120_VREG5 1 2 5D1R3F-GP
1
1
GAP-CLOSE-PWR G65 2
ST15U25VM-1-GP
1
1
GAP-CLOSE-PWR G64 2
TC49
ST220U6D3VDM-13GP
GAP-CLOSE-PWR G63 2
U72 FDS6612A-1-GP
D D D D
1
51120_V5FILT DCBATOUT_51120
S S S G
GAP-CLOSE-PWR G62 2
SC1U10V3KX-3GP
D
1
D D D D
DCBATOUT
GAP-CLOSE-PWR G84 2
2
2
1
3
2
Rev
MP
MYALL2
Sheet 1
39
of
57
A
4
3
1
C815 SC1U6D3V2KX-GP
C816 SC1U6D3V2KX-GP
D
C817 SC4D7U10V5ZY-3GP
1
2
3D3V_S0
2
1
D
G78 R608 100KR2J-1-GP
1
1
1
GAP-CLOSE-PWR G80 2 1D05V_S0
1
GAP-CLOSE-PWR G81 2
6
1
1
R611 C819 2KR2F-3-GP
1
SO-8-P R612
2
6K19R3F-1-GP
Vo=0.8*(1+(R1/R2)) C
3D3V_S0
2
GND
1
VIN
1
1
VOUT
2
C41
C46
C47
APL5308-25AC-1GPU
2
C43 SC1U10V3ZY-6GP
1
3
5V_S5
2D5V_S0
U4
1
C
DY
DY
SC10U10V5ZY-1GP
2
Add 10K PL for solve EN pin issue
GAP-CLOSE-PWR
KEMET 100uF, 6V, B2 Size ESR=40mohm
2
1
2
APL5912-KAC-GP
TC32
SC10U10V5ZY-1GP
2
2
GND
1 2
FB
5912_VOUT_1D05V
ST100U6D3VBML1GP
DY
R610 10KR2J-3-GP
3 4
SC330P50V3JN-GP
C818 SCD1U16V
VOUT VOUT
Vo(cal.)=1.058V
2
EN
5 9
1
8
VIN VIN
2
R609 10KR2J-3-GP 1 2
1
PM_SLP_S3#
POK
VCNTL
7
37 CPUCORE_ON
2 GAP-CLOSE-PWR G79 2
2
U62
16,18,31,35,41,45,56
1
1D8V_S3
1
5V_S5
2
2
5
SC2D2U16V5ZY-2GP
1D8V_S3
1
C666 1D5V_LDO SC4D7U10V5ZY-3GP
1
2
C667 1D5V_LDO SC1U6D3V2KX-GP
2
C672 1D5V_LDO SC1U6D3V2KX-GP
2
3D3V_S0
1
B
1
B
G48 R457 DY 1KR2J-1-GP
1D5V_LDO 1
C646 R449 2KR2F-3-GP
1D5V_LDO 2
1
APL5912-KAC-GP
1
SO-8-P R447 2K26R3F-GP
Add 10K PL for solve EN pin issue
5912_VOUT_1D5V
1
GAP-CLOSE-PWR G50 2 1D5V_S0
TC22 1D5V_LDO ST100U6D3VBML1GP
1
GAP-CLOSE-PWR G51 2
1D5V_LDO
1D5V_LDO
GAP-CLOSE-PWR
KEMET 100uF, 6V, B2 Size ESR=40mohm
Vo=0.8*(1+(R1/R2)) A
2
A
1
2
1 FB
2
GND
1
1D5V_LDO
2
DY
R454 10KR2J-3-GP
3 4 SC330P50V3JN-GP
C668 SCD1U16V
VOUT VOUT
2
EN
5 9
1
8
1D5V_LDO
VCNTL
R456 10KR2J-3-GP 1 2
VIN VIN
2
PM_SLP_S3#
POK
1
16,18,31,35,41,45,56
7
2 GAP-CLOSE-PWR G49 2
2
U56
6
1
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size
1D05V / 1D5V/2D5V
Document Number
Date: Thursday, March 30, 2006 5
4
3
2
Rev
MP
MYALL2
Sheet 1
40
of
57
A
B
C
D
E
3D3V_S5
Ioc = 40uA*Roc/Rds
G66
1
Roc close high side MOS Drain pin
2 GAP-CLOSE-PWR
3D3V_S5
G69
1
2 GAP-CLOSE-PWR G68
1
1
1 8 7 6 5
7057_BOOT 1 7057_UGATE 7057_LGATE
1 2
1 2
1 2
1 2
1 2
2
L40
1
2
G76
2
1D8V_PWR
1
IND-3D3UH-57GP
FDS6690DS-GP S S S G
4 3 2 1
TC23
1
U58
Vout = 0.8V(1+Rout/Rgnd)
1D8V_S3
GAP-CLOSE-PWR
TC24
2
1
GAP-CLOSE-PWR G73 2
1
GAP-CLOSE-PWR G71 2
1
GAP-CLOSE-PWR G70 2
1
GAP-CLOSE-PWR G72 2
1
GAP-CLOSE-PWR G74 2
3
DY 2
U59 C696 SC1U10V3ZY-6GP
2
2
SCD1U25V3ZY-3GP
1 2 3 4
C662
1
ST220U4VDM-L6-GP 2 1
4D7R3J-L1-GP
2
3
BOOT UGATE GND LGATE
2 GAP-CLOSE-PWR
G75
1
1
7057_VCC
2
PHASE OCSET FB VCC
C658
DY
U55 FDS6612A-1-GP
D D D D
C697 1
R479 2K4R2F-GP
R469
C657
DY
S S S G
3KR2F-GP
7057_FB 1 5V_S5
SCD1U25V3ZY-3GP
2
C681
APW7057KC-TR-GP
R470
1
5 6 7 8
7057_PHASE
C659
1
4 3 2 1
S
7057_OCSET
S
1D8V_PWR
1
2
2 D
G G
NC7S14M5X-GP
C660
5 6 7 8
4
3
Y
Q32
SCD1U25V3ZY-3GP
5
G67 3D3V_7057_S5 SC10U10V5ZY-1GP
VCC
C676 SC10U10V5ZY-1GP
NC#1 A GND
D31 BAT54PT-GP
D
SC10U10V5ZY-1GP
1 2 3
8744_PG3
4
2 GAP-CLOSE-PWR
SC10U10V5ZY-1GP D D D D
U61 39
1
SC1U10V3ZY-6GP
2N7002TPT-GP
5V_S5
5V_S5 C699 SC470P50V2KX-3GP
2
R480 12KR2J-L-GP
2
4
SE330U4VM-1GP
NIPPON 330uF,4V, H=5.8mm ESR=15mohm
GAP-CLOSE-PWR
0D9V Iomax=1A
1D8V_S3
2
C370 SC10U10V5ZY-1GP
C398
2
1
2
DDR_VREF_S0
0D9V_PWR
1
5V_S5
G14
U10 R246 0R0402-PAD 1 2 R247 0R0402-PAD 1 2
16,31 PM_SLP_S4# PM_SLP_S3#
VIN VDDQSNS S5 VLDOIN GND VTT S3 PGND VTTREF VTTSNS
1 2 3 4 5
1
GAP-CLOSE-PWR G13 2
1
GAP-CLOSE-PWR G12 2 GAP-CLOSE-PWR
GND
TPS51100DGQ-1-GP
1
1 2
C400
C399 SC10U10V5ZY-1GP
om
SC10U10V5ZY-1GP
2
C373 SCD1U16V
11
1
DDR_VREF_S3
2
16,18,31,35,40,45,56
10 9 8 7 6
2
2
1 SC10U10V5ZY-1GP
ai
l.c
1
ho
tm
Wistron Corporation in
f@
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
xa
Title
APW7057 / 1D8V/0D9V he
Size
Document Number
Date: Thursday, March 30, 2006 A
B
C
D
Rev
MP
MYALL2
Sheet E
41
of
57
1
D25 DCBATOUT R319
2
EC23 SCD1U50V3ZY-GP
2
G21 GAP-CLOSE
SC1U50V5ZY-1-GP
G20
C464 SCD015U50V3KX-GP
U22 S S S G
D D D D
8 7 6 5
BT+
AO4407-1-GP
For EMI
ID = 10A @ VGS = 10V
GAP-CLOSE
1
2
C463
2
1
AO4411-1-GP
1 2 3 4
1
D02R3720F-2-GP
2
2
1
1
AD+_TO_SYS
EC32 SCD1U50V3ZY-GP
2
1 2 3 4
1
1 EC6
D D D D
SCD1U50V3ZY-GP
DY
8 7 6 5
1 SSM34PT U17 S S S G
AD+
2
2
1
DY
1
ISL6255_CSIN_1
2
1
18R3-GP R26
ACLIM
8
29
GND
2S
S
1
1
1 2
1 2
1
2
2
1 2
C476 SC10U35V0ZY-GP
1
C477 SC10U35V0ZY-GP
2
1
C478 SCD1U50V3ZY-GP
4 3 2 1 5 6 7 8
2 2
4.41V/cell
Float
4.20V/cell
GND
3.99V/cell
2
7
6
5
4
Cell voltage
VREF
2
1
1 2
R24
1
D
R22 499KR3F-GP
Q39 2N7002PT-U
2 31
CHG_3S_4S#
1 G S
2 1K74R2F-GP
D
3
1
R657 124KR3F-GP 1 2
3
C24
1
2 1 2
1
1 2
R25 24K3R2F-1-GP
Wistron Corporation
Q1
1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
PRE_CHG 31 G
Title
2
G
VADJ
ISOURCE_MAX = (((ACLIM/VREF)*0.05+0.05)/Rsense) Adaptor is 65W/19V : I_LIMIT = 2.9A ( 85% )
2N7002PT-U
Float
CHG_3S_4S#
3
2
3S
2
31
GND
1
2N7002PT-U
Q3
4S
R27 DY 100R2F-L1-GP-U
2
3
Operate Mode
ISL6255_VREF
SCD1U16V2ZY-2GP
D R37 100KR2J-1-GP
2
VDD
1
1 2
1
2N7002PT-U
2
1 2
CELLS
3D3V_AUX_S5 R33 100KR2J-1-GP
C26 SC100P50V2JN-3GP
R44 150KR2J-GPS
DY
SCD01U16V2KX-3GP C28
G
R28 10KR2J-3-GP
2
3 1
1
CHG_ON#
ICHG : 3S2P = 3.2A IPRE_CHG = 200mA
ISL6255_ICM ISL6255_VCOMP
31
ISL6255_VDD Q5
C20 SC2700P50V3KX-1GP
ISL6255_CHLIM C32
R41 D 100KR2J-1-GP
SC6800P25V2KX-1GP
2
ISL6255_EN
DY
2
2
1
SC680P50V2KX-2GP C35 1 2
ISL6255_VDD R39 100KR2J-1-GP 1 2
2
5 6 7 8 1 2
3 2 1
DY
R18 R19 20KR3F-GP 130KR3F-GP
CHLIM
VREF
ICM
EN
Near ISL6255 Pin 26
VCOMP
2
C40
C481 SC10U25V0KX-3GP
DCSET
C479 SC10U25V0KX-3GP
28
1
9
2
VADJ
C480 SC10U25V0KX-3GP
ACSET
4 3 2 1
27
DY
R12 R20 20KR3F-GP 80K6R3F-1-GP
C15 SC1000P100V3KX-GP
1
VDD
U20
1
26
ISL6255_VREF
DY 1
10
DCIN
DY C475
2
GND
25
DY
BT+
2
SCD1U50V3ZY-GP
11
Near ISL6255 Pin 13
1 R329
D03R3720F-1-GP
2
PGND
ISL6255_LGATE SC1U10V3ZY-6GP
G22 GAP-CLOSE
R10
1
12
2
LGATE
DY L25 1 2 CHG_PWR-3 IND-15UH-41-GP
DY
AO4422-1-GP
DCPRN
1
2
UGATE
24
AO4422-1-GP
2 1
15
16 PHASE
17 BGATE
SGATE
13
2
ISL6255_SGATE
18
1
ISL6255_CSIP
CSIN
CSOP
VDDP
ICOMP
1
R38 15K4R2F-GP
2
ACPRN
CELLS
1
2ISL6255_ACSET
200KR2F-L-GP
23
R45
1 2ISL6255_VDD 2R3J-2-GP C19 ISL6255_VDDP 1 2
S S S G
1 R40
14
CHG_PWR-2
1
ISL6255_VDD
ACSET Threshold 1.27V typ. ACSET > 1.29V Max. --> AC DETECT
BOOT
G23 GAP-CLOSE
D D D D
AD+
R17 D4 2D2R3J-2-GP BAT54-4-GP
1
ISL6255_ACPRN#
SC1U10V3ZY-6GP
AC_IN#
U2 ISL6255HRZ
CSON
U21
DY
2D2R3J-L1-GP
31
R42 0R0402-PAD AC_IN# 1 2
19
21
S 1 2
SCD1U50V3ZY-GP C39 22 1 2
ISL6255_UGATE
R11 10KR2F-2-GP C18 SCD1U50V3ZY-GP
S S S G
R43 100KR2J-1-GP
CSIP
Q4
G
ISL6255_CSIN
2
C33 SC1U50V5ZY-1-GP
20
1
6262_CSOP
ISL6255_VDD
DCBATOUT
D D D D
5V_AUX_S5
ISL6255_BGATE SCD1U50V3ZY-GP C27 1 2
2
D BSS84LT1G-GP
R31 2R3J-2-GP
S Size
CHARGER ISL6225
Document Number
(Power Team) Date: Thursday, March 30, 2006
MYALL2
Sheet
Rev
MP 42
of
57
A
B
C
D
E
Adaptor in to generate DCBATOUT
AD+
DC1 4
AD_JK
4
1
1 2 3 4
C466 SCD01U50V3KX-4GP 100KR2J-1-GP 2 1
2
C474 SC1U50V5ZY-1-GP
AD+_2
2
OUT
E
AO4411-1-GP
ID = -10A/70deg Rds(ON) = 24mohm SO-8
C
PDTA124EU-1-GP Q22
3
C471 SCD1U50V3ZY-GP
R324 56KR3F-GP 3
2
R1
3
R1
B
22.10037.C61
8 7 6 5
1
R2
DC-JACK116-GP
2
5 6 MH1
1
R323
3
D D D D
1
1
U19 S S S G
2
4
R2
Q23 CHDTC124EU-1GP
D26 BAV99PT-GP-U
D27 BAV99PT-GP-U
31 31 31
BAT_SDA BAT_SCL BAT_IN#
DY
3
3
2
R321 1KR2J-1-GP
BATTERY CONNECTOR
2
1
2
1
1
AD_OFF
GND
IN
31
2
1
3D3V_AUX_S5
DY
2 3 4 5 6 7 9
BATA_SDA_1 2 27R3F-GP BATA_SCL_1
1 R332 2 27R3F-GP
1 R331
BAT1 8 1
2
2
1 2
2
1
1 2
1 2
2
EC31
EC29 SC10P50V2JN-4GP
EC33
SC1000P50V3JN-GP
DY
EC34 SCD1U50V3ZY-GP
SC1000P50V3JN-GP
EC35 SCD1U50V3ZY-GP
DY
SC10P50V2JN-4GP
1
EC30
1
BT+
2
SYN-CON7-16-GP-U1
20.80697.007
om
Wistron Corporation
1
ho
tm
ai
l.c
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
C
xa he
Document Number
Date: Thursday, March 30, 2006 B
in
AD/BATT CONN
Size
A
f@
Title
D
MYALL2
Sheet
Rev
MP 43
of E
57
1
1
1
1
1
34.4A908.001
H27 HOLE
H31 HOLE
1
1
H41 HOLE
H34
1
H23 HOLE
1
1
H20 HOLE
1
H25 HOLE
1
1
H26 H11 HOLE
1
H19 HOLE
1
H16
1
1
1
1
1
1
H17 HOLE
1
1
1
1
1
H21 HOLE
34.4A904.001
H42 HOLE
2
H15 HOLE
34.4A905.001
H3 HOLE
H39 HOLE
H14 HOLE
34.4A906.001
H33 HOLE
H38 HOLE
H10 H13 HOLE
34.4A905.001
34.4A903.001
1 H29 HOLE
1
1
34.4A908.001
1 H12 HOLE
H36 HOLE
H35 H7 H8 HOLE
1
1 1
H37 HOLE
H30 H32 H40 HOLE
H5 HOLE
34.4A902.001
D H28 HOLE
H6 HOLE
1
1
3 H9 HOLE
1
34.4A902.001
H4 HOLE
1
1
H2 HOLE
1
H1 HOLE
1
4
H22 HOLE
1
1
1
H24 HOLE
1
5 H18 HOLE
D
C
C
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EC24 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
EC43 SCD1U16V2ZY-2GP
5V_S5
EC41 SCD1U16V2ZY-2GP
1
EC89 SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
1
EC88
2
SCD1U16V2ZY-2GP
1
EC87
2
SCD1U16V2ZY-2GP
1
EC86
2
SCD1U16V2ZY-2GP
1
EC85
2
SCD1U16V2ZY-2GP
1
EC84
2
SCD1U16V2ZY-2GP
1
EC83
2
SCD1U16V2ZY-2GP
1
EC82
2
SCD1U16V2ZY-2GP
1
EC81
2
SCD1U16V2ZY-2GP
1
EC80
SCD1U16V2ZY-2GP
DDR_VREF_S0
2
1 2
1 2
SCD1U16V2ZY-2GP
2
2
2
SCD1U16V2ZY-2GP
1D8V_S3
EC79
EC49
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
B
1
EC48
1D05V_S0
1
EC10
1
1
1
EC78
2
SCD1U16V2ZY-2GP
1
EC77
2
SCD1U16V2ZY-2GP
1
EC76
2
SCD1U16V2ZY-2GP
1
EC75
2
SCD1U16V2ZY-2GP
1
EC44
2
SCD1U16V2ZY-2GP
1
EC62
2
1
SCD1U16V2ZY-2GP
2
1 2
EC61
SCD1U16V2ZY-2GP
GND1 GND2 GND3 SPRING-23-GP SPRING-23-GP SPRING-23-GP
VCC_CORE_S0 5V_S0
EC37
1
B
2
EC7
1
G72
SCD1U16V2ZY-2GP
1
EC8
2
SCD1U16V2ZY-2GP
1
EC74
2
SCD1U16V2ZY-2GP
1
EC73
2
SCD1U16V2ZY-2GP
1
1
EC72
2
SCD1U16V2ZY-2GP
1
EC71
2
SCD1U16V2ZY-2GP
1
EC58
2
SCD1U16V2ZY-2GP
1
EC60
2
SCD1U16V2ZY-2GP
1
EC59
2
SCD1U16V2ZY-2GP
1
EC22
2
SCD1U16V2ZY-2GP
EC25
NVVDD_S0
2
1
EC39
2
2
1
3D3V_S0
1
EC18
2
SCD1U16V2ZY-2GP
1
EC5
2
SCD1U16V2ZY-2GP
1
EC36
2
SCD1U16V2ZY-2GP
1
1
EC9
2
SCD1U16V2ZY-2GP
1
EC11
2
SCD1U16V2ZY-2GP
1
EC17
2
SCD1U16V2ZY-2GP
1
EC28
2
SCD1U16V2ZY-2GP
1
EC54
2
SCD1U16V2ZY-2GP
1
EC40
2
SCD1U16V2ZY-2GP
2
1
EC38
2
2
1
DCBATOUT
EC90 SCD1U16V2ZY-2GP
EMI
A
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size
Document Number
Date: Friday, March 24, 2006
EMI
Rev
MYALL2
Sheet
MP 44
of
57
5
3
2
1D2V_PWR
1 2
1 2
5 6 7 8
G72
Voutsetting=1.2V
51124_DRVL1
51124_GND
U79 G72 FDS6612A-1-GP
1
1D05V_PWR
1
C827
G72
C828
G72
1D05V Iomax=7A OCP>14A
1
Voutsetting=1.051V
L45 G72 IND-2D2UH-46-GP 1 2
51124_DRVH2 51124_LL2
5 6 7 8
G72
51124_DRVL2
R631 G72 75KR3F-GP
1
TC42 G72 SE330U2VDM-4-GP
NIPPON 680uF 2.5V ESR=13m
2
R632 G72 C831 G72 0R3J-3-GP SCD1U50V3ZY-GP 51124_LL2 1 51124_VBST2 251124_LL2_1 1 2
TC41
DY
1
4 3 2 1
51124_VFB2
R629
2
2
SC33P50V3JN-GP S S S G
51124_GND 51124_GND R630 G72 C830 G72 0R3J-3-GP SCD1U50V3ZY-GP 51124_LL1 1 51124_LL1_1 51124_VBST1 2 1 2
DY
SE330U2VDM-4-GP
2
C829
1
U80 G72 FDS6690DS-GP
30K1R3F-GP
R628 G72 20KR3F-GP
Vout=0.75V*(R1+R2)/R2 51124_GND G121 G72 GAP-CLOSE-PWR 1 2
NVVDD_S0 G40
1D05V_PWR
4 3 2 1
51124_GND 51124_DRVL2 51124_DRVL1
1
2
2 2
24 7
1 6
2
DCBATOUT_51124
51124_TRIP2
2
B
C
D D D D
R627 G72 20KR3F-GP
G72
R624 0R0402-PAD
2
18 13 25 3
51124_DRVH1 51124_DRVH2
2
1
51124_TRIP1
G72
GAP-CLOSE-PWR G137 1 2 GAP-CLOSE-PWR
1
PGND1 PGND2 GND GND
19 12
22 9
17 14
51124_GND
G72
GAP-CLOSE-PWR G136 1 2
NIPPON 220uF ESR=15mohm
2
21 10
1
DRVH1 DRVH2
S S S G
51124_GND
GAP-CLOSE-PWR G135 1 2
D
R625 DY 10KR2F-2-GP 1 2 51124_V5FILT
51124_TONSEL
2
C826 DY SCD01U50V2KX-1GP
TRIP1 TRIP2
1
LL1 LL2
2
1 2
20 11
4
SC10U35V0ZY-1GP
C825 DY SCD01U50V2KX-1GP
EN1 EN2
TONSEL
D D D D
51124_LL1 51124_LL2
23 8
G72
TPS51124RGER-GPU1
5 6 7 8
51124_EN1_1 51124_EN2_1
V5FILT V5IN
G72
GAP-CLOSE-PWR G134 1 2
Vout=0.75V*(R1+R2)/R2
SC10U35V0ZY-1GP
R623 0R0402-PAD 1 2 1 2 R626 0R0402-PAD
15 16
G72
2
GAP-CLOSE-PWR G133 1 2
51124_GND
1
51124_V5FILT
TC40 G72 SE220U6D3VM-4GP
R619 G72 30K1R3F-GP
R622 DY 0R2J-2-GP 1 2
PGOOD1 PGOOD2
51124_GND G72
VO1 VO2
G72
2 5
U6
VBST1 VBST2
2
C824 SC1U10V3ZY-6GP
VFB1 VFB2
G72
G72
DRVL1 DRVL2
2
1D05V_PWR 1D2V_PWR 51124_VFB2 51124_VFB1
1
2
1
C823
SC4D7U10V5ZY-3GP
R620 3D3R3J-L-GP
51124_PGD1 51124_PGD2
1
R621 DY 0R2J-2-GP 1 2
DY
2
1 51124_VFB1
C822
1
4 3 2 1
R618 DY 1KR3F-GP
2
S S S G
1
R617 G72 18KR3-GP
1
5 6 7 8 U77 G72 FDS6690DS-GP
5V_S5
PM_SLP_S3# PM_SLP_S3#
C820
1D2V Iomax=5A OCP>12A
SC33P50V3JN-GP
D D D D
G72 3D3V_S0
16,18,31,35,40,41,56 16,18,31,35,40,41,56
1
L44 G72 IND-4D7UH-88-GP 1 2
51124_DRVH1 51124_LL1
GAP-CLOSE-PWR
C
C821
G72
G132
1D2V_PWR
4 3 2 1
G72
S S S G
GAP-CLOSE-PWR G56 1 2
D D D D
G72
GAP-CLOSE-PWR G59 1 2
U76 G72 FDS6612A-1-GP
G72
GAP-CLOSE-PWR G57 1 2
SC10U35V0ZY-1GP
G72
2
SC10U35V0ZY-1GP
1
1D2V_S0
DCBATOUT_51124
GAP-CLOSE-PWR G58 1 2 D
1
DCBATOUT_51124 G60
1
DCBATOUT
4
G72
2
GAP-CLOSE-PWR G43 1 2
G72
GAP-CLOSE-PWR G46 1 2
G72
GAP-CLOSE-PWR G34 1 2
G72
GAP-CLOSE-PWR G31 1 2
G72
GAP-CLOSE-PWR G28 1 2
G72
GAP-CLOSE-PWR G37 1 2
G72
GAP-CLOSE-PWR G120 1 2
G72
B
GAP-CLOSE-PWR
Panasonic V Size 330uF 2V ESR=9mohm, Iripple=3.0A
51124_GND
om
l.c
A
tm
ai
Wistron Corporation f@
ho
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
230k/CH1 283k/CH2
283k/CH1 346k/CH2
346k/CH1 423k/CH2
TPS51124 / NVDD/1D2V xa
V5FILT Size
TONSEL
5
he
OPEN
in
Title
GND
Document Number
Rev
MP
MYALL2 Date: Thursday, March 30, 2006 4
3
2
Sheet 1
45
of
57
A
5
4
3
2
1
1 OF 14
PEG_TXP10 PEG_TXN10 PEG_RXP11 1 PEG_RXN11 1 PEG_TXP11 PEG_TXN11 PEG_RXP12 1 PEG_RXN12 1 PEG_TXP12 PEG_TXN12 PEG_RXP13 1 PEG_RXN13 1 PEG_TXP13 PEG_TXN13 PEG_RXP14 1 PEG_RXN14 1
A
PEG_TXP14 PEG_TXN14 PEG_RXP15 1 PEG_RXN15 1 PEG_TXP15 PEG_TXN15
PEX_TX9 PEX_TX9#
G72 AK22 AK23
PEX_RX9 PEX_RX9#
AG23 AH23
PEX_TX10 PEX_TX10#
G72
2 C568 SCD1U10V2KX-5GPPEX_TX10 2 C567 SCD1U10V2KX-5GPPEX_TX10#
G72 AL23 AL24
PEX_RX10 PEX_RX10#
AK24 AJ24
PEX_TX11 PEX_TX11#
AM24 AM25
PEX_RX11 PEX_RX11#
AJ25 AH25
PEX_TX12 PEX_TX12#
G72
2 C198 SCD1U10V2KX-5GPPEX_TX11 2 C197 SCD1U10V2KX-5GPPEX_TX11#
G72 G72
2 C565 SCD1U10V2KX-5GPPEX_TX12 2 C566 SCD1U10V2KX-5GPPEX_TX12#
G72 AK25 AK26
PEX_RX12 PEX_RX12#
AH26 AG26
PEX_TX13 PEX_TX13#
G72
2 C196 SCD1U10V2KX-5GPPEX_TX13 2 C195 SCD1U10V2KX-5GPPEX_TX13#
G72 AL26 AL27
PEX_RX13 PEX_RX13#
AK27 AJ27
PEX_TX14 PEX_TX14#
AM27 AM28
PEX_RX14 PEX_RX14#
AJ28 AH27
PEX_TX15 PEX_TX15#
AL28 AL29
PEX_RX15 PEX_RX15#
G72
2 C564 SCD1U10V2KX-5GPPEX_TX14 2 C563 SCD1U10V2KX-5GPPEX_TX14#
G72 G72
2 C194 SCD1U10V2KX-5GPPEX_TX15 2 C193 SCD1U10V2KX-5GPPEX_TX15#
G72
1
1
2
2
1 2
1
1 2
1 2
1 2
1 2
1 2
1 2
2
2
1 2
1 2
TC36 ST220U6D3VDM-13GP
1 2
1
G72
C120
G72
C
SC1U10V3ZY
1
G72
1
C106 SCD01U25V2KX-3GP
C114 SCD01U25V2KX-3GP
2
2
C124 SCD01U25V2KX-3GP
2
C118 SCD01U25V2KX-3GP
G72
SC1U10V3ZY
G72
1
G72
C107
ST220U6D3VDM-13GP
2
2
2 1
1 2
2
2
2
1
1
1
1
1
1 2
G72
SC100P50V2JN-U
G72
PLACE NEAR BALLS
G72
PEX_PLLAVDD PEX_PLLDVDD PEX_PLLGND
AF15 AE15 AE16
C141
C104
SCD1U10V2MX-3GP SC1U10V3ZY
G72
G72
C129 SC4700P50V3KX-1GP
C138 G72 SCD022U16V2KX-3GP
2
AC11 AC12 AC24 AD24 AE11 AE12 H7 J7 K7 L10 L7 L8 M10
1
3D3V_S0 VDD33_0 VDD33_1 VDD33_2 VDD33_3 VDD33_4 VDD33_5 VDD33_6 VDD33_7 VDD33_8 VDD33_9 VDD33_10 VDD33_11 VDD33_12
PLACE NEAR GPU
G72
PEX_PLLAVDD
1
C581 SC1U10V3ZY
G72
C579 SCD01U25V2KX-3GP
G72
G72
2 BLM18BB221SN1D-GP
G72
C582 C580 SCD1U10V2MX-3GP SC4D7U6D3V3KX-GP
G72 1D2V_S0
L9 PEX_PLLDVDD
1
C151 SC1U10V3ZY
G72
C158 SCD01U25V2KX-3GP
G72
G72
PLACE NEAR BALLS
NC#AM10 NC#AM8 NC#AM9 NC#B32 NC#J6
B
1D2V_S0 L27
1
PEX_RX8 PEX_RX8#
AJ22 AH22
C111 SCD01U25V2KX-3GP
C109
2
AM21 AM22
G72
2 C199 SCD1U10V2KX-5GPPEX_TX9 2 C200 SCD1U10V2KX-5GPPEX_TX9#
G72
1
PEX_TX8 PEX_TX8#
G72
SC1U10V3ZY
G72
SC100P50V2JN-U
2
AK21 AJ21
G72
2 C570 SCD1U10V2KX-5GPPEX_TX8 2 C569 SCD1U10V2KX-5GPPEX_TX8#
C611
C101
1
PEX_RX7 PEX_RX7#
1
PEX_TX7 PEX_TX7#
AL20 AL21
G72
2
AG21 AH21
G72
2 C202 SCD1U10V2KX-5GPPEX_TX7 2 C201 SCD1U10V2KX-5GPPEX_TX7#
G72
1
PEX_RX6 PEX_RX6#
1
AK19 AK20
G72
2
1 2
1 2
1 PEX_TX6 PEX_TX6#
SC100P50V2JN-U
TC35
G72SC220P50V2KX-3GP
2
1
PEG_RXP10 1 PEG_RXN10 1
AG20 AH20
G72
2 C572 SCD1U10V2KX-5GPPEX_TX6 2 C571 SCD1U10V2KX-5GPPEX_TX6#
G72
C131
G72
C132
BLM18BB221SN1D-GP
2
PEG_TXP9 PEG_TXN9
PEX_RX5 PEX_RX5#
P20 T20 T23 U20 U23 W20
SC100P50V2JN-U
1
PEG_RXP9 1 PEG_RXN9 1
AM18 AM19
G72
VDD_LP_0 VDD_LP_1 VDD_LP_2 VDD_LP_3 VDD_LP_4 VDD_LP_5
C123
C112 SC220P50V2KX-3GP
G72SC220P50V2KX-3GP G72
2
PEG_TXP8 PEG_TXN8
PEX_TX5 PEX_TX5#
1D2V_S0
C55
G72
C99
1
PEG_RXP8 1 PEG_RXN8 1
B
PEX_RX4 PEX_RX4#
AJ19 AH19
G72
2 C204 SCD1U10V2KX-5GPPEX_TX5 2 C203 SCD1U10V2KX-5GPPEX_TX5#
C115
G72
2
PEG_TXP7 PEG_TXN7
AL17 AL18
G72
2
BLM18BB221SN1D-GP
DY
C117
2
PEG_RXP7 1 PEG_RXN7 1
PEX_TX4 PEX_TX4#
G72
1
SC220P50V2KX-3GP
1
PEG_TXP6 PEG_TXN6
AK18 AJ18
G72
2 C573 SCD1U10V2KX-5GPPEX_TX4 2 C574 SCD1U10V2KX-5GPPEX_TX4#
C605
G72SC220P50V2KX-3GP G72
G72
2
PEG_RXP6 1 PEG_RXN6 1
PEX_RX3 PEX_RX3#
C95
1
PEG_TXP5 PEG_TXN5
PEX_TX3 PEX_TX3#
AK16 AK17
G72
C133
2
PEG_RXP5 1 PEG_RXN5 1
PEX_RX2 PEX_RX2#
G72
SC220P50V2KX-3GP
2
PEG_TXP4 PEG_TXN4
AL15 AL16 AG18 AH18
G72
2 C206 SCD1U10V2KX-5GPPEX_TX3 2 C205 SCD1U10V2KX-5GPPEX_TX3#
G72
C603
NVVDD_S0
1
PEG_RXP4 1 PEG_RXN4 1
G72
G72
2
PEG_TXP3 PEG_TXN3
PEX_TX2 PEX_TX2#
U13 U14 U15 U18 U19 V16 V17 W13 W14 W16 W17 W19 Y13 Y14 Y16 Y17 Y19 Y20
2
PEG_RXP3 1 PEG_RXN3 1
AG17 AH17
G72
2 C576 SCD1U10V2KX-5GPPEX_TX2 2 C575 SCD1U10V2KX-5GPPEX_TX2#
VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37
1
PEG_TXP2 PEG_TXN2
PEX_RX1 PEX_RX1#
2
PEG_RXP2 1 PEG_RXN2 1
PEX_TX1 PEX_TX1#
AM14 AM15
G72
1
C
PEX_RX0 PEX_RX0#
2
PEG_TXP1 PEG_TXN1
AK13 AK14 AH16 AG16
G72
2 C208 SCD1U10V2KX-5GPPEX_TX1 2 C207 SCD1U10V2KX-5GPPEX_TX1#
1
PEG_RXP[15..0]
PEG_RXP1 1 PEG_RXN1 1
G72
G72
G72
2
PEG_RXN[15..0]
PEG_TXP0 PEG_TXN0
PEX_TX0 PEX_TX0#
C130 SCD47U25V5KX-2GP
C159
SC4D7U6D3V3KX-GP
7 PEG_RXP[15..0]
PEG_TXP[15..0]
AJ15 AK15
G72
2 C578 SCD1U10V2KX-5GPPEX_TX0 2 C577 SCD1U10V2KX-5GPPEX_TX0#
C167
SCD1U10V2MX-3GP
7 PEG_RXN[15..0]
PEG_TXN[15..0]
PEX_REFCLK PEX_REFCLK#
1D2V_S0
SC10U10V6ZY-U
PEG_TXP[15..0]
PEX_TSTCLK_OUT PEX_TSTCLK_OUT#
AH14 AJ14
TC34 G72 ST150U6D3VDML3GP
D
SC4D7U6D3V3KX-GP
PEG_TXN[15..0]
7
PEG_RXP0 1 PEG_RXN0 1
AM12 AM11
VDD_0 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19
C586 G72 SC4D7U6D3V3KX-GP
L4 C163
SCD1U10V2MX-3GP
7
1 1
CLK_PCIE_PEG CLK_PCIE_PEG#
3 CLK_PCIE_PEG 3 CLK_PCIE_PEG#
RFU0 RFU1
K16 K17 N13 N14 N16 N17 N19 N20 P13 P14 P16 P17 P19 R16 R17 T13 T14 T15 T18 T19
G72
PLACE NEAR BALLS
SCD1U10V2MX-3GP
TP18 TPAD30 TP11 TPAD30
AG12 AH13
1 1
G72
SC1U16V3KX-2GP
TP12 TPAD30 TP15 TPAD30
PEX_RST#
G72
1
2
KBC GPIO5
PEX_RST# AH15
G72
C143 SC1U16V3KX-2GP
R312 DY 0R2J-2-GP 1 2
AC16 AC17 AC21 AC22 AE18 AE21 AE22 AF12 AF18 AF21 AF22
C142 SC1U16V3KX-2GP
R137 DY 0R2J-2-GP 1 2
31 GMODULE_RST#
PEX_IOVDDQ_0 PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8 PEX_IOVDDQ_9 PEX_IOVDDQ_10
C156 SCD1U10V2MX-3GP
R307 G72 10KR2J-3-GP
PLACE NEAR GPU 1D2V_S0
C166 SCD1U10V2MX-3GP
U16D TSAHCT125PW-GP
D
AD23 AF23 AF24 AF25 AG24 AG25
2
11
PLACE NEAR BALLS PEX_IOVDD_0 PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4 PEX_IOVDD_5
1
12
R309 G72 5K1R2F-2-GP 1 2
2
13
U30A
1
PLT_RST1#
7
7,16,18,22,26,31,32,34,51
R140 G72 0R2J-2-GP 1 2
14
5V_S0
G72
C140 C144 SCD1U10V2MX-3GP SC4D7U6D3V3KX-GP
G72 PLACE NEAR GPU
AM10 AM8 AM9 B32 J6
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
G72
Size
G72M PCIE Document Number
Rev
MP
MYALL2 Date: Thursday, March 30, 2006 5
4
3
2
Sheet 1
46
of
57
5
4
3
2
1
2
3D3V_S0
L13 BLM18BB221SN1D-GP 6 OF 14
2004/11/10 ADD 220 Ohm at 100MHz
DACA_VDD
DACA_VREF
AH10
DACA_VREF
DACA_RSET
AH9
DACA_RSET
I2CA_SCL I2CA_SDA
K2 J3
1 1
AF10 AK10
HSYNC VSYNC
DACA_RED
AH11
CRT_RED 14
DACA_GREEN
AJ12
CRT_GREEN 14
DACA_BLUE
AH12
14 14
14 14 D
1 R71 124R2F-U-GP
G72
CRT_BLUE 14
1
3D3V_S0
R115 G72 150R2F-1-GP
AG9
R111 G72 150R2F-1-GP
R114 G72 150R2F-1-GP
2
50 ohm trace to filter
2
2
2
G72 37.5 ohm trace to 150R resistor
L8 BLM18BB221SN1D-GP
CLOSE TO G72 8 OF 14
2004/11/10 ADD 220 Ohm at 100MHz
DACB_VDD
DACB_VREF
R5
DACB_VREF
DACB_RSET
R7
DACB_RSET
1
G72
DACB_RED
R6
G72_TV_CRMA 14
DACB_GREEN
T5
G72_TV_LUMA 14
DACB_BLUE
T6
DACB_IDUMP
V7
R80 150R2F-1-GP
G72
G72
G72
C
1
R82 150R2F-1-GP
1
G72
R81 150R2F-1-GP
1
C
2
G72_TV_COMP 14
2
G72
R116 124R2F-U-GP
2
2
V8
C105 SCD01U25V2KX-3GP
SC4700P50V2KX
SC4D7U6D3V3KX-GP
C135 G72 SC470P50V-GP
1
G72
2
C157
1
G72
2
C223
1
1
U30H
DACB_VDD
2
G72
1
G72_CRT_EDID_CLK G72_CRT_EDID_DAT
DACA_HSYNC DACA_VSYNC
DACA_IDUMP
2
G72 G72
2
G72
I2CA_SCL I2CA_SDA
1
1
AD10
C211
2
C222 G72 SC470P50V-GP
SCD01U25V2KX-3GP
2
1
G72
SC4700P50V2KX
SC4D7U6D3V3KX-GP
D
C121
2
G72
1
1 C134
2
1
R67 33R2J-2-GP 2 R64 33R2J-2-GP 2
U30F
DACA_VDD
1
G72
CLOSE TO G72
7 OF 14 R97 G72 10KR2F-2-GP 1 2
U30G
AD7
DACC_VDD
AH4
DACC_VREF
AF5
DACC_RSET
I2CB_SCL I2CB_SDA
H4 J4
DACC_HSYNC DACC_VSYNC
AG7 AG5
DACC_RED
AF6
DACC_GREEN
AG6
DACC_BLUE
AE5
DACC_IDUMP
AG4
G72 B
B
2D5V_S0
13 OF 14 2004/11/10 ADD 220 Ohm at 100MHz
T1
XTALOUTBUFF
T2
BXTALOUT
1 2 3
XTALIN
XTALOUT
U2 XTALOUT
R358 G72 330R2J-3-GP
2
2
2 C110
G72
X3
10MIL_G2G_20MIL C544
G72
SCD1U16V
SSFOUT
R615 G72 22R2J-2-GP 1 2
C97
G72
SCD1U16V
CLOSE TO U28 4
2
3
G72
SC18P50V2JN-1-GP
10MIL_G2G_20MIL XTAL-27MHZ-16-GP
C541
G72 A
SC22P50V2JN-4GP
Size
xa
he
G72M CRT & TV OUT Document Number
Rev
MYALL2 Date: 5
4
3
2
Sheet
Thursday, March 30, 2006 1
MP 47
of
f@
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
in
Wistron Corporation
ho
tm
ai
2
A
C535
G72
1
1
2
1
SC4700P50V2KX
SSFOUT_R
om
SCD1U10V2MX-3GP
6 5 4
l.c
G72
1
C54
2
1
G72
SC4D7U6D3V3KX-GP
REFOUT VSS XOUT MODOUT XIN/CLKIN VDD
G72
G72
C67
3D3V_S0
U28 ASM3P2872AF-060R-GP
R356 G72 22R2J-2-GP 1 2
1
XTALSSIN
XTALIN U1
R360 DY 10KR2J-3-GP
2
1
Spread Specturm CLOSE TO GPU
G72
SSFOUT
G72
2
PLLGND
1
G72
L7 BLM18BB221SN1D-GP 1 2
2D5V_S0
PLLVDD DISP_PLLVDD
2
1
G72
G72 G72
T9 T10 U10
1
G72
C61 SC1U6D3V2KX-GP SC4700P50V2KX SCD1U10V2MX-3GP
1
2
SC1U6D3V2KX-GP
C62
2
1
1
C60
1
DISP_PLLVDD
2 C116 BLM18BB221SN1D-GP
2
SC4D7U6D3V3KX-GP
2
1
1 C56
U30M
2
L5
57
5
4
3
2
1
D
D
9 OF 14 C561 G72 SCD01U16V2KX-3GP 1 2
U30I
AM4 AL5
2D5V_S0
IFPA_TXC#
AJ9
LVDS_TXACLK-
LVDS_TXACLK- 13
IFPA_TXC
AK9
LVDS_TXACLK+
LVDS_TXACLK+ 13
IFPA_TXD0# IFPA_TXD0
AJ6 AH6
LVDS_TXAOUT0LVDS_TXAOUT0+
LVDS_TXAOUT0- 13 LVDS_TXAOUT0+ 13
IFPA_TXD1# IFPA_TXD1
AH7 AH8
LVDS_TXAOUT1LVDS_TXAOUT1+
LVDS_TXAOUT1- 13 LVDS_TXAOUT1+ 13
IFPA_TXD2# IFPA_TXD2
AK8 AJ8
LVDS_TXAOUT2LVDS_TXAOUT2+
LVDS_TXAOUT2- 13 LVDS_TXAOUT2+ 13
IFPA_TXD3# IFPA_TXD3
AH5 AJ5
IFPB_TXC# IFPB_TXC
AL4 AK4
LVDS_TXBCLKLVDS_TXBCLK+
LVDS_TXBCLK- 13 LVDS_TXBCLK+ 13
IFPB_TXD4# IFPB_TXD4
AM5 AM6
LVDS_TXBOUT0LVDS_TXBOUT0+
LVDS_TXBOUT0- 13 LVDS_TXBOUT0+ 13
IFPB_TXD5# IFPB_TXD5
AL7 AM7
LVDS_TXBOUT1LVDS_TXBOUT1+
LVDS_TXBOUT1- 13 LVDS_TXBOUT1+ 13
IFPB_TXD6# IFPB_TXD6
AK5 AK6
LVDS_TXBOUT2LVDS_TXBOUT2+
LVDS_TXBOUT2- 13 LVDS_TXBOUT2+ 13
IFPB_TXD7# IFPB_TXD7
AL8 AK7
IFPC_TXC# IFPC_TXC
AM3 AM2
IFPC_TXD0# IFPC_TXD0
AE1 AE2
IFPC_TXD1# IFPC_TXD1
AF2 AF1
IFPC_TXD2# IFPC_TXD2
AH1 AG1
IFPD_TXC# IFPD_TXC
AH2 AG3
IFPD_TXD4# IFPD_TXD4
AJ1 AK1
IFPD_TXD5# IFPD_TXD5
AL1 AL2
IFPD_TXD6# IFPD_TXD6
AJ3 AJ2
IFPAB_VPROBE IFPAB_RSET
2005/11/10 CHANGE TO 220 Ohms at 100MHz L11 IFPABPLLVDD
2
AC9
1
C178 SC4700P50V2KX
C177
IFPAB_PLLVDD
G72
R394 1KR2F-3-GP
SC470P50V2KX
2
SC4D7U6D3V3KX-GP
2
2
2
1
G72 SC4D7U6D3V3KX-GP
1
1 2
1
1
C173 BLM18BB221SN1D-GPC176
AD9
G72
G72
G72
IFPAB_PLLGND
G72
1D8V_S0 L10
1
C170
SC4700P50V2KX SC4D7U6D3V3KX-GP
G72
2 1
1 2
C164
C169
AF9
IFPA_IOVDD
AF8
IFPB_IOVDD
SC470P50V2KX
G72
G72
2
1 2
SC4700P50V2KX
G72
G72
SB
C171
SC4D7U6D3V3KX-GP
1
G72
C165
2
2
C
2
BLM18BB221SN1D-GP 2005/11/10 CHANGE TO 220 Ohms at 100MHz
1
1
IFPAIOVDD
C168 SC470P50V2KX
C
G72
G72
10 OF 14 U30J
AK3
IFPCD_VPROBE
AH3
IFPCD_RSET
B
B
AA10
IFPCD_PLLVDD
8 7 6 5
G72_PLLVDD
RN7 SRN10KJ-4-GP
2005/11/10 ADD
1 2 3 4
G72
AB10
IFPCD_PLLGND
G72_IFPC_IOVDD
AD6
IFPC_IOVDD
G72_IFPD_IOVDD
AE7
IFPD_IOVDD
G72
A
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size
G72M LVDS & TMDS Document Number
Rev
MP
MYALL2 Date: 5
4
3
2
Thursday, March 30, 2006
Sheet 1
48
of
57
5
4
3
2
1
D
D
FBAD[63..0]
U25 FBAD[63..0]
U27
R48 FBACLK0
1
2
FBACLK0#
BA0 BA1
R2 P7 M2 P3 P8 P2 N7 N3 N8 N2 M7 M3 M8
A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8
FBAD15 FBAD14 FBAD13 FBAD12 FBAD11 FBAD10 FBAD9 FBAD8 FBAD7 FBAD6 FBAD5 FBAD4 FBAD3 FBAD2 FBAD1 FBAD0
120R2F-GP
C
* "Place the differential termination resistor at the end of the transmission line"
54 54
G72_64MB
K8 J8
CK CK
K2
CKE
FBA_CS0#
L8
CS
FBA_WE#
K3
WE
FBACLK0# FBACLK0 FBA_CKE
50,54 FBA_CKE
2
R54 G72 10KR2J-3-GP
1
50,54 FBA_CS0# 50,54 FBA_WE# 50,54 FBA_RAS# 50,54 FBA_CAS# 54 54
K7
RAS
FBA_CAS#
L7
CAS
F3 B3
FBADQM0 FBADQM1 ODT
50,54 ODT
VDD1 VDD2 VDD3 VDD4 VDD5
LDM UDM
K9
ODT
54 54
FBADQSP0 FBADQSN0
F7 E8
LDQS LDQS
54 54
FBADQSP1 FBADQSN1
B7 A8
UDQS UDQS
J2
VREF
A2 E2 L1 R3 R7 R8
NC#A2 NC#E2 NC#L1 NC#R3 NC#R7 NC#R8
1
1D8V_S0
FBA_RAS#
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10
R70 1KR2F-3-GP
2
G72_64MB
R72 1KR2F-3-GP
1
G72_64MB
2
1
FBAREF0
G72_64MB C59
2
SCD047U16V3KX-GP
FBAD[63..0]
50,54 FBA_A[12..0]
50,54 FBA_A[12..0]
54 54
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
VSS1 VSS2 VSS3 VSS4 VSS5
A3 E3 J3 N1 P9
FBACLK0# FBACLK0
50,54 FBA_CKE
50,54 FBA_CS0# 50,54 FBA_WE# 50,54 FBA_RAS#
A1 E1 J9 M9 R1 J1 J7
FBA_BA0 FBA_BA1
L2 L3
BA0 BA1
R2 P7 M2 P3 P8 P2 N7 N3 N8 N2 M7 M3 M8
A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
FBACLK0# FBACLK0
K8 J8
CK CK
FBA_CKE
K2
CKE
FBA_CS0#
L8
CS
FBA_WE#
K3
WE
FBA_RAS#
K7
RAS
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
VDD1 VDD2 VDD3 VDD4 VDD5
A1 E1 J9 M9 R1
FBAD31 FBAD30 FBAD29 FBAD28 FBAD27 FBAD26 FBAD25 FBAD24 FBAD23 FBAD22 FBAD21 FBAD20 FBAD19 FBAD18 FBAD17 FBAD16
FBAD[63..0]
50,54
1D8V_S0
1D8V_S0
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
VDDL VSSDL
50,54 FBA_BA0 50,54 FBA_BA1
FBA_A12 FBA_A11 FBA_A10 FBA_A9 FBA_A8 FBA_A7 FBA_A6 FBA_A5 FBA_A4 FBA_A3 FBA_A2 FBA_A1 FBA_A0
50,54 FBA_CAS# 54 54
G72
FBA_CAS#
FBADQM2 FBADQM3
50,54 ODT
ODT
L7
CAS
F3 B3
LDM UDM
K9
ODT
54 54
FBADQSP2 FBADQSN2
F7 E8
LDQS LDQS
54 54
FBADQSP3 FBADQSN3
B7 A8
UDQS UDQS
J2
VREF
A2 E2 L1 R3 R7 R8
NC#A2 NC#E2 NC#L1 NC#R3 NC#R7 NC#R8
FBAREF0
G72
1
FBA_A12 FBA_A11 FBA_A10 FBA_A9 FBA_A8 FBA_A7 FBA_A6 FBA_A5 FBA_A4 FBA_A3 FBA_A2 FBA_A1 FBA_A0
L2 L3
C100 G72_64MB SCD047U16V3KX-GP
2
FBA_A[12..0]
50,54 FBA_A[12..0]
FBA_BA0 FBA_BA1
50,54 FBA_BA0 50,54 FBA_BA1
VDDL VSSDL
J1 J7
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
VSS1 VSS2 VSS3 VSS4 VSS5
A3 E3 J3 N1 P9
C
HY5PS561621A-33GP HY5PS561621A-33GP
72.55616.A0U
72.55616.A0U
G72_64MB
G72_64MB
Decoupling for left MEMORY Place around the MEM
Decoupling for right MEMORY Place around the MEM
1D8V_S0
C127 SCD01U25V2KX-3GP
1
1
C93 SCD01U25V2KX-3GP 2
1
C92 SCD1U16V2KX-3GP 2
1
C90 SCD1U16V2KX-3GP 2
1
C80 SCD1U16V2KX-3GP 2
1
C79 SCD1U16V2KX-3GP 2
1
1 2
C82 SCD1U16V2KX-3GP 2
G72_64MB G72_64MB G72_64MB G72_64MB G72_64MB G72_64MB G72_64MB G72_64MB
C154 SC4D7U6D3V3KX-GP 2
C52 SCD01U25V2KX-3GP
1 C58 SCD01U25V2KX-3GP 2
1 C65 SCD01U25V2KX-3GP 2
1 C66 SCD01U25V2KX-3GP 2
1 C49 SCD1U16V2KX-3GP 2
1 C48 SCD1U16V2KX-3GP 2
1 C50 SCD1U16V2KX-3GP 2
1 C91 SC4D7U6D3V3KX-GP 2
1
1D8V_S0
2
B
G72_64MB G72_64MB G72_64MB G72_64MB G72_64MB G72_64MB G72_64MB G72_64MB
G72M VRAM (1ST 1/2) Document Number
xa
Rev
MP
MYALL2 4
3
2
Thursday, March 30, 2006
Sheet 1
49
of
f@
ho
tm Size
he
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
in
Wistron Corporation
G72_64MB
Date: 5
l.c ai
1 2
2
G72_64MB
C181 SC4700P50V2KX-1GP
1
G72_64MB G72_64MB
C182 SC1KP16V2KX-GP
2
C185 SC470P50V2KX-3GP
2
G72_64MB
C153 SC100P50V2JN-3GP 2
1
G72_64MB
C152 SC4700P50V2KX-1GP
1
G72_64MB
C149
2
SC470P50V2KX-3GP
2
SC100P50V2JN-3GP
G72_64MB
C126
SC1KP16V2KX-GP
1
1 2
C125
1
A
1
A
om
B
57
5
4
3
FBA_A[12..0]
49,54 FBA_A[12..0]
2
FBA_A[12..0]
49,54 FBA_A[12..0]
FBA_A12 FBA_A11 FBA_A10 FBA_A9 FBA_A8 FBA_A7 FBA_A6 FBA_A1 FBA_A0
1
FBA_A12 FBA_A11 FBA_A10 FBA_A9 FBA_A8 FBA_A7 FBA_A6 FBA_A1 FBA_A0
D
D
FBAD[63..0]
U33 FBAD[63..0]
U31
FBB_A[5..2]
FBB_A[5..2]
R102 G72_128_256MB 475R2F-L1-GP 1 2 FBACLK1#
FBACLK1
54 54
* "Place the differential termination resistor at the end of the transmission line"
FBACLK1# FBACLK1
49,54 FBA_CKE
49,54 FBA_CS0# 49,54 FBA_WE# 49,54 FBA_RAS#
C
49,54 FBA_CAS# 54 54
L2 L3
BA0 BA1
FBA_A12 FBA_A11 FBA_A10 FBA_A9 FBA_A8 FBA_A7 FBA_A6 FBB_A5 FBB_A4 FBB_A3 FBB_A2 FBA_A1 FBA_A0
R2 P7 M2 P3 P8 P2 N7 N3 N8 N2 M7 M3 M8
A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
FBACLK1# FBACLK1
K8 J8
CK CK
FBA_CKE
K2
CKE
FBA_CS0#
L8
CS
FBA_WE#
K3
WE
FBA_RAS#
K7
RAS
FBA_CAS#
L7
CAS
F3 B3
LDM UDM
FBADQM4 FBADQM6 ODT
49,54 ODT
ODT
54 54
FBADQSP4 FBADQSN4
F7 E8
LDQS LDQS
54 54
FBADQSP6 FBADQSN6
B7 A8
UDQS UDQS
B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
VDD1 VDD2 VDD3 VDD4 VDD5
A1 E1 J9 M9 R1
1
1D8V_S0
K9
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
R135 1KR2F-3-GP
2
G72_128_256MB
1
G72_128_256MB
C150 SCD047U16V3KX-GP
2
R136 1KR2F-3-GP
2
1
FBAREF1
G72_128_256MB
J2
VREF
A2 E2 L1 R3 R7 R8
NC#A2 NC#E2 NC#L1 NC#R3 NC#R7 NC#R8
VDDL VSSDL
J1 J7
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
VSS1 VSS2 VSS3 VSS4 VSS5
A3 E3 J3 N1 P9
FBAD55 FBAD54 FBAD53 FBAD52 FBAD51 FBAD50 FBAD49 FBAD48 FBAD39 FBAD38 FBAD37 FBAD36 FBAD35 FBAD34 FBAD33 FBAD32
FBAD[63..0]
49,54
49,54 FBA_BA0 49,54 FBA_BA1
54
FBB_A[5..2]
FBB_A[5..2]
FBA_BA0 FBA_BA1
L2 L3
BA0 BA1
FBA_A12 FBA_A11 FBA_A10 FBA_A9 FBA_A8 FBA_A7 FBA_A6 FBB_A5 FBB_A4 FBB_A3 FBB_A2 FBA_A1 FBA_A0
R2 P7 M2 P3 P8 P2 N7 N3 N8 N2 M7 M3 M8
A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
FBACLK1# FBACLK1
K8 J8
CK CK
FBA_CKE
K2
CKE
FBA_CS0#
L8
CS
FBA_WE#
K3
WE
FBA_RAS#
K7
RAS
FBA_CAS#
L7
CAS
F3 B3
LDM UDM
K9
ODT
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
VDD1 VDD2 VDD3 VDD4 VDD5
A1 E1 J9 M9 R1
FBAD63 FBAD62 FBAD61 FBAD60 FBAD59 FBAD58 FBAD57 FBAD56 FBAD47 FBAD46 FBAD45 FBAD44 FBAD43 FBAD42 FBAD41 FBAD40
FBAD[63..0]
49,54
1D8V_S0
1D8V_S0 54 54
FBACLK1# FBACLK1
49,54 FBA_CKE
49,54 FBA_CS0# 49,54 FBA_WE# 49,54 FBA_RAS# 49,54 FBA_CAS# 54 54
FBADQM5 FBADQM7 ODT
49,54 ODT 54 54
FBADQSP5 FBADQSN5
F7 E8
LDQS LDQS
54 54
FBADQSP7 FBADQSN7
B7 A8
UDQS UDQS
J2
VREF
A2 E2 L1 R3 R7 R8
NC#A2 NC#E2 NC#L1 NC#R3 NC#R7 NC#R8
FBAREF1
1
54
FBA_BA0 FBA_BA1
G72_128_256MB
C224 SCD047U16V3KX-GP
2
49,54 FBA_BA0 49,54 FBA_BA1
VDDL VSSDL
J1 J7
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
VSS1 VSS2 VSS3 VSS4 VSS5
A3 E3 J3 N1 P9
C
HY5PS561621A-33GP HY5PS561621A-33GP
72.55616.A0U
72.55616.A0U
G72_128_256MB
G72_128_256MB B
B
C128 G72_128_256MB SC4700P50V2KX-1GP
1
1 2
1
C81 G72_128_256MB SCD1U16V2KX-3GP
C538 G72_128_256MB SC4700P50V2KX-1GP
2
C108 G72_128_256MB SC1KP16V2KX-GP
1
2
1
C86 G72_128_256MB SCD01U25V2KX-3GP
2
1
2
1
C87 G72_128_256MB SCD01U25V2KX-3GP
2
1
C526 G72_128_256MB SC1KP16V2KX-GP
2
1
C78 G72_128_256MB SC470P50V2KX-3GP
2
2
C583 G72_128_256MB SC470P50V2KX-3GP
C532 G72_128_256MB SCD01U25V2KX-3GP
2
1
C496 G72_128_256MB SCD01U25V2KX-3GP
2
1 2
1
C71 G72_128_256MB SC4D7U6D3V3KX-GP
1
C122 G72_128_256MB SCD01U25V2KX-3GP
C139 G72_128_256MB SCD01U25V2KX-3GP
2
1
C75 G72_128_256MB SCD1U16V2KX-3GP
2
1
C94 G72_128_256MB SCD1U16V2KX-3GP
2
1
C98 G72_128_256MB SCD1U16V2KX-3GP
2
1
C221 G72_128_256MB SCD1U16V2KX-3GP
2
1
C213 G72_128_256MB SCD1U16V2KX-3GP
2
1
C180 G72_128_256MB SC4D7U6D3V3KX-GP
2
C218 G72_128_256MB SC4D7U6D3V3KX-GP
2
1
Decoupling for right MEMORY Place around the MEM
2
1
1D8V_S0
1
1
C84 G72_128_256MB SC100P50V2JN-3GP
2
C179 G72_128_256MB SC100P50V2JN-3GP
2
1
C210 G72_128_256MB SCD1U16V2KX-3GP
2
C212 G72_128_256MB SCD1U16V2KX-3GP
2
1
1D8V_S0
Decoupling for left MEMORY Place around the MEM
1
C497 G72_128_256MB SC4700P50V2KX-1GP
C555 G72_128_256MB SC4700P50V2KX-1GP
Wistron Corporation
2
1
C502 G72_128_256MB SC1KP16V2KX-GP
2
1
C495 G72_128_256MB SC470P50V2KX-3GP
2
1
C584 G72_128_256MB SC100P50V2JN-3GP
2
1
C494 G72_128_256MB SC1KP16V2KX-GP
2
1
C552 G72_128_256MB SC470P50V2KX-3GP
2
1
C545 G72_128_256MB SC100P50V2JN-3GP
2
1 2
C175 G72_128_256MB SCD01U25V2KX-3GP
2
2
C88 G72_128_256MB SCD01U25V2KX-3GP
1
A
1
A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size
G72M VRAM (1ST 2/2) Document Number
Rev
MP
MYALL2 Date: 5
4
3
2
Thursday, March 30, 2006
Sheet 1
50
of
57
5
4
3
3D3V_S0
2
1
3D3V_S0 11 OF 14 14 OF 14
U30K
D
G72
G72
L1
MIOACAL_PD_VDDQ
L3
L2
AA8 AB7 AB8 AC6 AC7
53 53
1
MIOA_D0 MIOA_D1
C96 SC1U6D3V2KX-GP
1
P2 N2 N1 N3 M1 M3 P5 N6 N5 M4 L4 L5
MIOAD0 MIOAD1 MIOAD2 MIOAD3 MIOAD4 MIOAD5 MIOAD6 MIOAD7 MIOAD8 MIOAD9 MIOAD10 MIOAD11
MIOA_D6
53
MIOA_D8 MIOA_D9
53 53
2
2
C102 SC1U6D3V2KX-GP
MIOA_VDDQ_0 MIOA_VDDQ_1 MIOA_VDDQ_2 MIOA_VDDQ_3 MIOA_VDDQ_4
2
1
C137 SC1U6D3V2KX-GP
2
1
U30N
M7 M8 R8 T8 U9
G72
C113 SC1U6D3V2KX-GP
G72
MIOB_VDDQ_0 MIOB_VDDQ_1 MIOB_VDDQ_2 MIOB_VDDQ_3 MIOB_VDDQ_4
Y1
MIOBCAL_PD_VDDQ
MIOACAL_PU_GND
Y3
MIOBCAL_PU_GND
MIOA_VREF
Y2
MIOB_VREF
MIOBD0 MIOBD1 MIOBD2 MIOBD3 MIOBD4 MIOBD5 MIOBD6 MIOBD7 MIOBD8 MIOBD9 MIOBD10 MIOBD11 RFU13 RFU14 RFU15 RFU16 RFU17 RFU18 RFU19 RFU20
MIOA_CLKOUT MIOA_CLKOUT# MIOA_CLKIN
R4 P4 M5
TP9
1
TPAD30
G72
R74 DY 10KR2J-3-GP
MIOB_D0 MIOB_D1 MIOB_D3 MIOB_D4 MIOB_D5 MIOB_D7 MIOB_D8 MIOB_D9 MIOB_D11
MIOB_D0 MIOB_D1
53 53
MIOB_D3 MIOB_D4 MIOB_D5
53 53 53
MIOB_D7 MIOB_D8 MIOB_D9
53 53 53
MIOB_D11
53
D
W4 W5 V5 Y6
MIOB_VSYNC MIOB_HSYNC MIOB_DE MIOB_CTL3
AE3 AF3 AD1 AD3
MIOB_CLKOUT MIOB_CLKOUT# MIOB_CLKIN
AD4 AD5 AE4 1
R3 R1 P1 P3
1
MIOA_HSYNC MIOA_VSYNC MIOA_DE MIOA_CTL3
AC3 AC1 AC2 AB2 AB1 AA1 AB3 AA3 AC5 AB5 AB4 AA5 W3 V1 Y5 W1
G72
R99 DY 10KR2J-3-GP
2
2
G72
C
C
3D3V_S0 3D3V_S0
3D3V_S0 3D3V_S0
RN48 SRN2K2J-1-GP
2
12 OF 14 U30L
J1
THERMDN
F6 G2 G1
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12
K3 H1 K5 G5 E2 J5 G6 K6 E1 D2 H5 F4 E3
2
CLAMP I2CC_SCL I2CC_SDA
THERMDP
K1
THERMDP
G72 TP23 TPAD30 1
1
JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST#
1
2
G72
AJ11 AK11 AK12 AL12 AL13
R396 DY 10KR2J-3-GP
R391 G72 10KR2J-3-GP
2
2
B
CHECK I2C FOR LCD G72 G72
G72_LCD_EDID_CLK G72_LCD_EDID_DAT
NV_LCDVDD_ON# NV_BL_ON 31 R344 G72 2K2R2J-2-GP 2 1 1
13 13
13
R346 G72 100KR2J-1-GP
3D3V_S0 TP68
TPAD30
B
2
1
R348 33R2J-2-GP 2 R349 33R2J-2-GP 2
1
R352 DY 10KR2J-L2-GP U26
1 2 3 4
1
2
R351 DY 200R2J-L1-GP
G72
1 1
G72
3D3V_S0
C534
I2CC_SCL I2CC_SDA
1
1
THERMDN
C536 SC2200P50V2KX-2GP
R343 G72 10KR2J-3-GP
DY 1 2
Please close to the GPU
2
2
2
10KR2J-3-GP
1
R342 DY 10KR2J-3-GP
R112 DY 10KR2J-3-GP
DY
4 3
1 1
1
SBR113
VGA_THERM_SHDN#
8 7 6 5
I2CC_SCL I2CC_SDA G72_ALERT-
2
SCD1U10V2MX-3GP
VCC SMBCLK DXP SMBDATA DXN ALERT# THERM# GND
DY
tm 7,16,18,22,26,31,32,34,46 Size
he
G
1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title PLT_RST1#
G72M THERMAL Document Number
Rev
MYALL2 Date: 5
4
3
ho
Wistron Corporation
2
Sheet
Thursday, March 30, 2006 1
MP 51
of
f@
VGA_THERM_SHDN#
in
2
G72
xa
3
S
OVERT#
D
19
R354 G72 0R2J-2-GP 1 2
l.c
A
Q28 2N7002PT-U
ai
A
om
G781F-GP
57
5
4
3
2
1
4 OF 14 U30D
B
K10 K23 K29 K4 L27 L6 M12 M2 M21 M31 N15 N18 N29 N4 P15 P18 P27 P6 R13 R14
AF4 AF7 AG10 AG11 AG14 AG15 AG19 AG2 AG22 AG31 AG8 AH24 AJ10 AJ13 AJ16 AJ17 AJ20 AJ23 AJ26 AJ29
GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39
GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139
R15 R18 R19 R2 R20 R31 T16 T17 T24 T29 T4 U16 U17 U24 U29 U8 V13 V14 V15 V18
AJ4 AJ7 AK2 AK28 AK31 AL11 AL14 AL19 AL22 AL25 AL3 AL6 AL9 AM13 AM16 AM17 AM20 AM23 AM26 AM29
GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59
GND_140 GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 GND_149 GND_150 GND_151
V19 V2 V20 V31 W15 W18 W27 W6 Y15 Y18 Y29 Y4
B12 B15 B18 B21 B24 B27 B3 B30 B6 B9 C2 C31 D10 D13 D16 D17 D20 D23 D26 D29
GND_60 GND_61 GND_62 GND_63 GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 GND_78 GND_79
D4 D7 F11 F14 F19 F2 F22 F25 F31 F8 G26 G29 G4 G7 H27 H6 J16 J17 J2 J31
GND_80 GND_81 GND_82 GND_83 GND_84 GND_85 GND_86 GND_87 GND_88 GND_89 GND_90 GND_91 GND_92 GND_93 GND_94 GND_95 GND_96 GND_97 GND_98 GND_99
D
U30E
F1 AE26 AD26 AH31 AH32
5 OF 14
ROMCS#
AA4
ROM_SO ROM_SI ROM_SCLK
AA6 W2 AA7
STRAP MEMSTRAPSEL0 MEMSTRAPSEL1 MEMSTRAPSEL2 MEMSTRAPSEL3
I2CH_SCL I2CH_SDA U3 V3 U6 U5 U4 V4 V6
RFU6 RFU7 RFU8 RFU9 RFU10 RFU11 RFU12
G3 H3
BUFRST#
F3
STEREO
T3
SWAPRDY_A TESTMEMCLK TESTMODE MCG0 MCG1
M6
C
R73 10KR2J-3-GP 1 2
G72 3D3V_S0
G72_TESTMBMCLK
A26 H2 AL10 AG13
TESTMODE
1
GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119
R353 G72 10KR2J-3-GP
G72
R341 G72 10KR2J-3-GP
2
GND_0 GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19
1
C
AA12 AA2 AA21 AA31 AB27 AB6 AC10 AC23 AC29 AC4 AD16 AD17 AD2 AD31 AE17 AE27 AE6 AF11 AF26 AF29
2
D
B
G72 A
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
G72M ROM & Spread Specturm
Size
Document Number
Date:
Friday, March 24, 2006
Rev
MYALL2 5
4
3
2
Sheet 1
MP 52
of
57
5
4
3
2
1
D
D
STRAPS, Mechanical Parts 3D3V_S0
Bit Signal
Hynix64MB
R85_1
R370_0
R86_1
R91_1
:
C
Infineon256MB : R364_0
R93_1
R86_1
R369_0
Infineon128MB : R364_0
R370_0
R86_1
R369_0
Infineon64MB
R370_0
R86_1
R369_0
: R85_1
R369 1
10KR2J-3-GP 2
G72_INFINEON
R367 1
10KR2J-3-GP 2
DY
R370 1 R364 1
MIOB_D0
R91 10KR2J-3-GP 1 2
G72_HYNIX
MIOB_D1
R86 10KR2J-3-GP 1 2
G72
10KR2J-3-GP 2
G72_64_128MB_S MIOB_D8
R93 10KR2J-3-GP 1 2
G72_256MB_S
10KR2J-3-GP 2
G72_128_256MB_S MIOB_D9
R85 10KR2J-3-GP 1 2
G72_64MB_S
MIOB_D11
R84 G72 2KR2-GP 1 2 R79 G72 2KR2-GP 1 2 R83 G72 2KR2-GP 1 2 R76 DY 2KR2-GP 1 2
MIOA_D0
R614 DY 2KR2-GP 1 2
MIOB_D4
B
51 51 51 51 51
MIOA_D0 MIOA_D1 MIOA_D6 MIOA_D8 MIOA_D9
MIOA_D0 MIOA_D1 MIOA_D6 MIOA_D8 MIOA_D9
51 51 51 51 51 51 51 51 51
MIOB_D0 MIOB_D1 MIOB_D3 MIOB_D4 MIOB_D5 MIOB_D7 MIOB_D8 MIOB_D9 MIOB_D11
MIOB_D0 MIOB_D1 MIOB_D3 MIOB_D4 MIOB_D5 MIOB_D7 MIOB_D8 MIOB_D9 MIOB_D11
MIOB_D5 MIOB_D3
MIOA_D6 MIOA_D8 MIOA_D9
MIOB_D7
MIOB_D0:
RAM_CFG_0
MIOB_D1:
RAM_CFG_1
MIOB_D8:
RAM_CFG_2
MIOB_D9:
RAM_CFG_3
MIOB_D2:
CRYSTAL_0
MIOB_D6:
CRYSTAL_1
0 NO_BIOS 1 READ FROM BIOS 0000 RFU 0001 8Mx32 BGA 1.8V 0010 RFU 0011 RFU 0100 4Mx32 BGA 1.8V 0101 RFU 0110 RFU 0111 RFU 0011 16MX16
1000 RFU 1001 RFU 1010 RFU 1011 RFU 1100 RFU 1101 RFU 1110 RFU 1111 RFU
C
00 13.500 MHz 01 14.31818 MHz 10 27.000 MHz 11 UNKNOWN
MIOA_D7:
TV_MODE_0
MIOA_D10:
TV_MODE_1
MIOB_D4:
PCI_DEVID_0
00 SECAM 01 NTSC 10 PAL 11 CRT
MIOB_D5:
PCI_DEVID_1
MIOB_D3:
PCI_DEVID_2
MIOB_D11:
PCI_DEVID_3
1000 (default 0x00FC)
0111 G72MV
B
0 ENABLED 1 DISABLED
MIOA_D0:
PEX_PLL_EN_TERM100
MIOA_D6:
3GIO_PADCFG_LUT_ADDR[0]
MIOA_D8:
3GIO_PADCFG_LUT_ADDR[1]
MIOA_D9:
3GIO_PADCFG_LUT_ADDR[2]
MIOB_D7:
MOBILE_GPIO
0 DESKTOP 1 MOBILE
010 DEFAULT
0 GPIO_PULLDN 1 GPIO_FLOAT
Definitions Elpida Samsung Infineon Hynix Elpida Samsung Infineon Hynix
A
ai
A
R77 DY 2KR2-GP 1 2
SUB_VENDOR
tm
For MEM strapping, Please use below table: RAM_CFG[3:0] Config FB Bus Width 0000 16Mx16 DDR2 64-bit 0001 16Mx16 DDR2 64-bit 0010 16Mx16 DDR2 64-bit 0011 16Mx16 DDR2 64-bit 0100 32Mx16 DDR2 64-bit 0101 32Mx16 DDR2 64-bit 0110 32Mx16 DDR2 64-bit 0111 32Mx16 DDR2 64-bit
R75 G72 2KR2-GP 1 2 R69 DY 2KR2-GP 1 2 R65 DY 2KR2-GP 1 2
MIOA_D1:
Wistron Corporation
Size
he
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
G72M STRAPPING Document Number
Rev
MYALL2 Date: 5
4
om
R91_1
l.c
R91_1
R86_1
3
2
Thursday, March 30, 2006
Sheet 1
MP 53
of
ho
R86_1
R370_0
f@
R93_1
R364_0
Values
MIOA_D1
in
R364_0
Hynix128MB :
2KR2-GP G72 2
xa
Hynix256MB :
R357 1
57
5
4
3
2
1
2 OF 14 FBAD[63..0]
U30B
B
49 49 49 49 50 50 50 50
FBADQM0 FBADQM1 FBADQM2 FBADQM3 FBADQM4 FBADQM5 FBADQM6 FBADQM7
49 49 49 49 50 50 50 50
FBADQSP0 FBADQSP1 FBADQSP2 FBADQSP3 FBADQSP4 FBADQSP5 FBADQSP6 FBADQSP7
49 49 49 49 50 50 50 50
FBADQSN0 FBADQSN1 FBADQSN2 FBADQSN3 FBADQSN4 FBADQSN5 FBADQSN6 FBADQSN7
FBA_CLK0 FBA_CLK0# FBA_CLK1 FBA_CLK1#
P28 R28 Y27 AA27
RFU2 RFU3
Y30 AC26
FBA_DEBUG
AC27
FBA_REFCLK FBA_REFCLKN
D32 D31
FBA_PLLVDD
G23
TC38
G72
ST100U6D3VBM-7GP
1
C514 SC4D7U6D3V3KX-GP
2
C89 C517 SCD1U10V2MX-3GP SC1U10V3ZY
G72
G72
1
G72
2
1 2
C518 SCD1U10V2MX-3GP
1
TC37
2
SC4D7U6D3V3KX-GP
ST100U6D3VBM-7GP
1
C103
2
1
SC1U10V3ZY
2
1
2
C136
G72
1
C519 G72 SCD022U16V2KX-3GP
2
C520 G72 SCD022U16V2KX-3GP
G72
G72
FBA_A3 FBA_A0 FBA_A2 FBA_A1 FBB_A3 FBB_A4 FBB_A5 FBA_CS0# FBA_WE# FBA_BA0 FBA_CKE ODT FBB_A2 FBA_A12 FBA_RAS# FBA_A11 FBA_A10 FBA_BA1 FBA_A8 FBA_A9 FBA_A6 FBA_A5 FBA_A7 FBA_A4 FBA_CAS#
G72
G72
G72
G72
C85
2
C512
2
2
2
G72
C513
1
1
1
1 C68
2
C70
G72
SCD1U10V2MX-3GP SC4700P50V3KX-1GP SC4700P50V3KX-1GP SC4700P50V3KX-1GP SC4700P50V3KX-1GP
1
TPAD30 TP100
G72
FBA_A[12..0] FBA_CS0#
FBA_WE# FBA_BA0 FBA_CKE
49,50 49,50 49,50
FBA_RAS#
49,50
FBA_BA1
49,50
FBA_CAS#
49,50
FBA_A0 FBA_A1 FBA_A2 FBA_A3 FBA_A4 FBA_A5 FBA_A6 FBA_A7 FBA_A8 FBA_A9 FBA_A10 FBA_A11 FBA_A12
49,50
ODT
49,50
R78 10KR2J-3-GP
G72
FBACLK0 FBACLK0# FBACLK1 FBACLK1#
1
C72 SCD1U10V2MX-3GP
2
C515 G72 SCD022U16V2KX-3GP
1
1
C
C516 SCD1U10V2MX-3GP
2 P32 U27 P31 U30 Y31 W32 W31 T32 V27 T28 T31 U32 W29 W30 T27 V28 V30 U31 R27 V29 T30 W28 R29 R30 P29 U28 Y32
2
1
1
FBADQS_RN0 FBADQS_RN1 FBADQS_RN2 FBADQS_RN3 FBADQS_RN4 FBADQS_RN5 FBADQS_RN6 FBADQS_RN7
2
M28 K32 G31 G27 AA28 AL31 AF31 AH29
G72
G72
G72 FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26
C521 SCD1U10V2MX-3GP
G72
G72
1
FBADQSN0 FBADQSN1 FBADQSN2 FBADQSN3 FBADQSN4 FBADQSN5 FBADQSN6 FBADQSN7
C522 SCD1U10V2MX-3GP
2
FBADQS_WP0 FBADQS_WP1 FBADQS_WP2 FBADQS_WP3 FBADQS_WP4 FBADQS_WP5 FBADQS_WP6 FBADQS_WP7
C119 SCD1U10V2MX-3GP
1
L28 K31 G32 G28 AB28 AL32 AF32 AH30
1
FBADQSP0 FBADQSP1 FBADQSP2 FBADQSP3 FBADQSP4 FBADQSP5 FBADQSP6 FBADQSP7
1D8V_S0
PLACE BELOW GPU
2
FBADQM0 FBADQM1 FBADQM2 FBADQM3 FBADQM4 FBADQM5 FBADQM6 FBADQM7
FBVDDQ_0 FBVDDQ_1 FBVDDQ_2 FBVDDQ_3 FBVDDQ_4 FBVDDQ_5 FBVDDQ_6 FBVDDQ_7 FBVDDQ_8 FBVDDQ_9 FBVDDQ_10 FBVDDQ_11 FBVDDQ_12 FBVDDQ_13 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_20 FBVDDQ_21 FBVDDQ_22 FBVDDQ_23
AA25 AA26 AB25 AB26 G11 G12 G15 G18 G21 G22 H11 H12 H15 H18 H21 H22 L25 L26 M25 M26 R25 R26 V25 V26
D
1
M29 M30 G30 F29 AA29 AK30 AC30 AG30
C
A12 A15 A18 A21 A24 A27 A3 A30 A6 A9 AA32 AD32 AG32 AK32 C32 F32 J32 M32 R32 V32
2
FBADQM0 FBADQM1 FBADQM2 FBADQM3 FBADQM4 FBADQM5 FBADQM6 FBADQM7
D
FBVDD_0 FBVDD_1 FBVDD_2 FBVDD_3 FBVDD_4 FBVDD_5 FBVDD_6 FBVDD_7 FBVDD_8 FBVDD_9 FBVDD_10 FBVDD_11 FBVDD_12 FBVDD_13 FBVDD_14 FBVDD_15 FBVDD_16 FBVDD_17 FBVDD_18 FBVDD_19
1
FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7 FBAD8 FBAD9 FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15 FBAD16 FBAD17 FBAD18 FBAD19 FBAD20 FBAD21 FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47 FBAD48 FBAD49 FBAD50 FBAD51 FBAD52 FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63
2
N27 M27 N28 L29 K27 K28 J29 J28 P30 N31 N30 N32 L31 L30 J30 L32 H30 K30 H31 F30 H32 E31 D30 E30 H28 H29 E29 J27 F27 E27 E28 F28 AD29 AE29 AD28 AC28 AB29 AA30 Y28 AB30 AM30 AF30 AJ31 AJ30 AJ32 AK29 AM31 AL30 AE32 AE30 AE31 AD30 AC31 AC32 AB32 AB31 AG27 AF28 AH28 AG28 AG29 AD27 AF27 AE28
1
FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7 FBAD8 FBAD9 FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15 FBAD16 FBAD17 FBAD18 FBAD19 FBAD20 FBAD21 FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47 FBAD48 FBAD49 FBAD50 FBAD51 FBAD52 FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63
2
49,50 FBAD[63..0]
TPAD30 TP8
FBACLK0 FBACLK0# FBACLK1 FBACLK1#
FBB_A2 FBB_A3 FBB_A4 FBB_A5
FBA_A[12..0]
FBB_A[5..2]
49,50
50 B
49 49 50 50
G72
SB 1D8V_S0
2
SC1U10V3ZY
1
1
2
C63
BLM18BB221SN1D-GP SC4D7U6D3V3KX-GP G72
2 1
1
FBVREF1 E32
A
R350 G72 1KR2F-3-GP
FB_VREF1
G72
G72
G72
G72
PLACE NEAR GPU
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
2
2
C533 G72 SCD1U10V2MX-3GP
SCD01U25V2KX-3GP
C64
2
1 C531 DY SCD1U10V2MX-3GP
1 C83
2
G24
1
G25
FBA_PLLGND
1
FBA_PLLAVDD
2
A
R347 G72 1KR2F-3-GP
1D2V_S0
L6
Title Size Date:
5
4
3
2
G72M MEMORY IF 1 Document Number
Rev
MYALL2 Sheet
Thursday, March 30, 2006 1
MP 54
of
57
5
4
3
2
1
3 OF 14 U30C
C13 A16 A13 B17 B20 A19 B19 B14 E16 A14 C15 B16 F17 C19 D15 C17 A17 C16 D14 F16 C14 C18 E14 B13 E15 F15 A20
FBC_CLK0 FBC_CLK0# FBC_CLK1 FBC_CLK1#
E13 F13 F18 E17
RFU4 RFU5
C20 D1
FBC_DEBUG
F12
FBC_PLLGND
G9 A
R68 G72 40D2R3F-GP 1 2
FBCAL_PD_VDDQ
K26
FBCAL_PU_GND
H26
Wistron Corporation
FBCAL_TERM_GND
J26
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
FB_VREF2
G72
R63 DY 60D4R3D-1-GP
2 5
1D8V_S0
1
A28
G10
4
om
A
G8
FBC_PLLAVDD
l.c
FBC_PLLVDD
B1 C1
ai
FBC_REFCLK FBC_REFCLKN
B
tm
FBCDQS_RN0 FBCDQS_RN1 FBCDQS_RN2 FBCDQS_RN3 FBCDQS_RN4 FBCDQS_RN5 FBCDQS_RN6 FBCDQS_RN7
B
FBC_CMD0 FBC_CMD1 FBC_CMD2 FBC_CMD3 FBC_CMD4 FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8 FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26
R61 G72 30R3F-GP
Title
G72M MEMORY IF 2
Size
Document Number
Date:
Friday, March 24, 2006
3
2
Rev
MYALL2 Sheet
MP 55 1
ho
C6 E9 E6 A8 B29 E25 A25 F21
C
f@
FBCDQS_WP0 FBCDQS_WP1 FBCDQS_WP2 FBCDQS_WP3 FBCDQS_WP4 FBCDQS_WP5 FBCDQS_WP6 FBCDQS_WP7
D
in
C5 E10 E5 B8 A29 D25 B25 F20
R616 0R0603-PAD 1 2 1D8V_S0
xa
FBCDQM0 FBCDQM1 FBCDQM2 FBCDQM3 FBCDQM4 FBCDQM5 FBCDQM6 FBCDQM7
AA23 AB23 H16 H17 J10 J23 J24 J9 K11 K12 K21 K22 K24 K9 L23 M23 T25 U25
he
A4 E11 F5 C9 C28 F24 C24 E20
FBVTT_0 FBVTT_1 FBVTT_2 FBVTT_3 FBVTT_4 FBVTT_5 FBVTT_6 FBVTT_7 FBVTT_8 FBVTT_9 FBVTT_10 FBVTT_11 FBVTT_12 FBVTT_13 FBVTT_14 FBVTT_15 FBVTT_16 FBVTT_17
1
C
FBCD0 FBCD1 FBCD2 FBCD3 FBCD4 FBCD5 FBCD6 FBCD7 FBCD8 FBCD9 FBCD10 FBCD11 FBCD12 FBCD13 FBCD14 FBCD15 FBCD16 FBCD17 FBCD18 FBCD19 FBCD20 FBCD21 FBCD22 FBCD23 FBCD24 FBCD25 FBCD26 FBCD27 FBCD28 FBCD29 FBCD30 FBCD31 FBCD32 FBCD33 FBCD34 FBCD35 FBCD36 FBCD37 FBCD38 FBCD39 FBCD40 FBCD41 FBCD42 FBCD43 FBCD44 FBCD45 FBCD46 FBCD47 FBCD48 FBCD49 FBCD50 FBCD51 FBCD52 FBCD53 FBCD54 FBCD55 FBCD56 FBCD57 FBCD58 FBCD59 FBCD60 FBCD61 FBCD62 FBCD63
2
D
B7 A7 C7 A2 B2 C4 A5 B5 F9 F10 D12 D9 E12 D11 E8 D8 E7 F7 D6 D5 D3 E4 C3 B4 C10 B10 C8 A10 C11 C12 A11 B11 B28 C27 C26 B26 C30 B31 C29 A31 D28 D27 F26 D24 E23 E26 E24 F23 B23 A23 C25 C23 A22 C22 C21 B22 E22 D22 D21 E21 E18 D19 D18 E19
of
57
A
B
DCBATOUT
C
D
DCBATOUT_6269
1D5V_PWR
5 6 7 8 6269_FSET
6269_EN
R637 73K2R2F-GP
1
1
2
2
GAP-CLOSE-PWR G131 2 1D5V_SW
2
2
7 4
12
1D5V_SW 1
FSET EN
2
16 5
1
LG UG PHASE FCCM
L46 1D5V_SW IND-4D7UH-88-GP
6269_LG
11 14 15 3
1D5V_PWR
6269_UG 6269_PHASE
1
2 3
2
1
GAP-CLOSE-PWR G129 2 1D5V_SW
R642 0R2J-2-GP
ISL6269CRZ-GP
DY
U83 FDS6690DS-GP
TC44 1D5V_SW SE220U6D3VM-4GP
1D5V_SW 2
1D5V_SW
S S S G
SC15P50V3JN-GP C840 1 2 6269_COMP
NIPPON 220uF ESR=15mohm
4 3 2 1
R640 DY 1D5V_SW 1KR3F-GP R643 DY 0R2J-2-GP 1 2
2
1
R641 1K5R3F-GP
1
GAP-CLOSE-PWR
D D D D
2
BOOT ISEN VO FB
GAP-CLOSE-PWR G127 2 1D5V_SW
1D5V_SW
1
6269_FB 3D3V_S0
3
13 9 8 6
R635 0R2J-2-GP
GND
6269_BOOT
PGND
R639 1D5V_SW 8K2R3F-GP 1 2 1D5V_PWR
17
2
10
1
VIN
2
PGOOD COMP
1
PVCC
U82 6269_PHASE
VCC
C839 1D5V_SW R638 1D5V_SW SCD1U25V3KX-GP 2D2R2J-GP
1
GAP-CLOSE-PWR
C838 1D5V_SW SCD01U50V2KX-1GP
1
1D5V_SW
1
2
1D5V_SW
C836 SC10U35V0ZY-1GP C837 SC10U35V0ZY-1GP 1D5V_SW
1
4
4 3 2 1
1
PM_SLP_S3#
2
16,18,31,35,40,41,45
1
6269_VCC
C834 1D5V_SW SCD1U25V3ZY-3GP
1D5V_SW
2
GAP-CLOSE-PWR G125 2 1D5V_SW
5 6 7 8
R636 1KR3F-GP
U81 FDS6612A-1-GP
1
1D5V_SW
1
1
1D5V_SW
2
C835 1D5V_SW SC2D2U16V3KX-GP
2
C833 SC2D2U16V3KX-GP
2
6269_PVCC 1
2
1
GAP-CLOSE-PWR G130 2 1D5V_SW
C832 SCD1U25V3KX-GP
Close to pin1
1
1
GAP-CLOSE-PWR G128 2 1D5V_SW
R634 1D5V_SW 2D2R2J-GP
1D5V_SW
S S S G
1
GAP-CLOSE-PWR G126 2 1D5V_SW
1
D D D D
1
GAP-CLOSE-PWR G124 2 1D5V_SW
G123
DCBATOUT_6269
1D5V_SW
1
2
2
1
1D5V_S0
DCBATOUT_6269
G122 4
E
1
1D5V_SW
R644 1KR3F-GP
C841 1
R645 1D5V_SW 71K5R2F-1-GP 2 1 2
SC2200P50V2KX-2GP
1D5V_SW 2
1D5V_SW
Vref = 0.6V Vo = (1+R8/R9)*0.6V =1.5V
2
2
1
1
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
ISL6269/1D5V Size A3
Document Number
Date: Thursday, March 30, 2006 A
B
C
D
Rev
MP
MYALL2 Sheet E
56
of
57
5
D
4
3
2. Bluetooth USB change to port 7 ====> 1229
56. EMC change U1 and U7 materials from G528 / G546 to TPS2061 / TPS2062 ====> 0208-PD
3. Add CPU frequency selection resistor ====> 1229
57. Add R651 0 ohm for vendor test ====> 0208-PD
4. Change LVDS connector ====> 1229
58. Add R652 0 ohm for camera voltage ====> 0209-PD
5. Change C435 from 1uF to 0.47uF and for pop noise ====> 1230
59. Add R653 / Q37 / Q38 for quick discharge of 5V_S0 / 3D3V_S0 / 1D8V_S0 ====> 0209-PD
6. Change T7 and T8 from 68uF to 22uF for pop noise ====> 1230
60. Change DIMM connector from 62.10017.741(DM1)/62.10017.751(DM2) to 62.10017.691(DM1)/62.10017.A71(DM2) ====> 0209-PD
7. Add 579 ~ R584 / Q35 and Q36 for pop noise ====> 1230
61. Change G72 DACB net of DACA_VDD / DACA_VREF / DACA_RSET to DACB_VDD / DACB_VREF / DACB_RSET ====> 0209-PD
8. Power change 1D05V_S0 and 1D5V_S0 power source ====> 0102
62. Delete R230 and C317 for non-delay RSMRST# ====> 0210-PD
9. Power change 5D_PWR and 3D3V_PWR power source ====> 0107
63. Stuff R285 for internal mic record issue ====> 0210-PD
10. R427 DY for PCIE bus clock ====> 0107
64. Change C541 and C544 from 27pF to 22pF with 18pF ====> 0210-PD
11. Delete Q14 / R543 / R254 for boot up ====> 0107
65. Change HDD1/ODD1/TVOUT1/TVIN1/LOUT1 symbol ====> 0210-PD
12. Power change R505 from 3.01K to 3.24K ====> 0107
66. Delete R330 for BAT_IN# double pull hi issue ====> 0213-PD
13. Power change R142 from 2.21K to 8.2K ====> 0107
67. EMI add EC79 ~ EC87 for 1D8V_S3 and EC88 ~ EC90 for DDR_VREF_S0 ====> 0213-PD
14. Power change R122 from 56.2K to 73.2K ====> 0107
68. Add U84/C846/R654/R655/R656/L47 for camera function ====> 0213-PD
15. Change R68 from 37ohm to 40.2ohm and R61 from 37ohm to 30ohm ====> 0107
69. EMI add spring GND1 ~ GND3 ====> 0213-PD
16. Delete R401 for UMA boot up short ====> 0107
70. Change TVOUT1 symbol for don't display TV issue ====> 0214-PD
17. ME change TVOUT1 material from 22.10021.F41 to 22.10021.H61 ====> 0107
71. Power change C805 and C806 from 51120_GND to GND ====> 0220-PD
18. R568 DY for CIR working ====> 0109
72. Change DC1material from 22.10037.C51( yellow power jack ) to 22.10037.C61( blue power jack ) ====> 0223-PD
19. Swap CARD1 pin18 and pin19 ====> 0110
73. Power change C466 from 0.1uF to 0.01uF for U19 burned issue ====> 0303-PD
20. Power change C699 from 510P/50V to 470P/50V ====> 0111
74. Power change material U47 / U48 / U53 / U54 from 84.07807.F37 to 84.06690.F37
D
U49 / U50 / U51 / U52 from 84.07805.A37 to 84.06676.A37 for burned issue ====> 0306-PD
22. Remove R392 / R393 / C560 / R62 / R92 / R123 ====> 0111
75. Power change R523 / C738 from 3.57K / 5600pF to 4.42K / 47pF ====> 0306-MP
23. Add R615 for G72 SS ====> 0111
76. Charger change R19 from 15.8K to 130K ====> 0307-MP
24. Dummy G72 external thermal sensor U26 / R351 / R352 / C534 ====> 0111
77. Charger change R22 from 100K to 499K and add R657 124K / Q39 2N7002 for 6 cell 3.2A with 8 cell 3.8A issue ====> 0309-MP
25. Add G72 strapping MIOA_D0 R614 with dummy ====> 0111
78. Acer suggestion change JK1 AV-IN connector from 62.10059.011 to 20.90045.001 and delete R292 / R293 ====> 0315-MP
26. EMI add capacitor EC66 ~ EC69 for 1000P/16V and EC70 ~ EC78 for 0.1U/16V ====> 0111
79. Change CRT1 / Q35 / Q36 footprint for SMT issue ====> 0317-MP
27. Power change R480 from 6.2K to 8.2K ====> 0112
80. Change LED5 driver voltage from 5V_S0 to 3D3V_S0 for light leak issue ====> 0317-MP
28. Delete R533 and R534 for cardreader detect ====> 0112
81. Delete dual layout of dummy of of L47 / L28 / L33 / L39 / L15 / L18 ====> 0317-MP
29. Delete R210 for 1D5V_S0 power rail ====> 0112
82. Short 0 ohm with pad ====> 0320-MP
C
30. Power delete R407 0 ohm ====> 0112
S : R89 / R418 / R225 / R537 / R316 / R5 / R52 / R51 / R333 / R345 / R335 / R651 / R558 / R559 / R532 / R285 / R649 / R650
31. Add TC34 ~ TC38 for U39_G72 ====> 0112
/ R49 / R448 / R204 / R437 / R96 / R562 / R410 / R211 / R208 / R177 / R406 / R194 / R237 / R226 / R245 / R243 / R322 / R326
32. Remove R362 ====> 0112
/ R327 / R425 / R444 / R495 / R496 / R560 / R616
33. Change R282 and R283 from 22 ohm to 2.2K for internal mic record function failure ====> 0112
P : R515 / R516 / R491 / R492 / R494 / R482 / R485 / R486 / R487 / R517 / R506 / R508 / R510 / R511 / R591 / R589 / R592
34. Change R306 / R308 / R313 / R311 from 47 ohm to 0 ohm for Hsync and Vsync input ====> 0112 35. Change R379 / R380 / R377 / R378 / R382 / R383 from 47 ohm to 0 ohm for TV input ====> 0112
B
1
55. Change TC7 / TC8 to C844 / C845 from 22U/6.3V to 10U/6.3V for headphone system resume have "BO" sound ====> 0208-PD
21. Power change R397 and R399 from resister to gap-close ====> 0111 C
2
1. 5V_S5_G913 chnge to 5V_AUX_S5 ====> 1229
/ R593 / R596 / R598 / R603 / R600 / R246 / R247 / R623 / R626 / R624 / R42 83. Power change materials for high frequency noise issue ====> 0324-MP
36. Change CIR pull hi voltage from 5V to 3D3V ====> 0113
A. add TC45 ~ TC50
37. Delete G2 pad ====> 0113
B. dummy C691 / C692 / C689 /C685 / C686 / C688
38. Add GIGA LAN reset trace ====> 0113
C. delete C797 / C798 / C808 / C809
B
39. Power change 1D5V power source ====> 0117
84. Power change material TC23 from 79.3371T.30L to 80.22716.L08 and L42 / L43 from 68.4R750.10Z to 68.4R71A.10P ====> 0324-MP
40. Power change NVVDD power source ====> 0117
85. Change C29 material from 78.10491.4FL to 78.10520.5FL for hot plug don't boot up issue ====> 0328-MP
41. Power add 1D5V power switching ====> 0117
86. Change BOM level that add 1394 / TVIN / TVOUT / IR function ====> 0331-MP
42. Change C774 and C776 from 12pF to 15pF ====> 0119
87. ME change 1394 connector material from 62.10027.121 to 62.10027.561 for RoSH issue ====> 0331-MP
43. Change C640 and C648 from 20pF to 27pF ====> 0119 44. Change C722 and C737 from 4.7pF to 2.7pF ====> 0119 45. Change C42 and C44 from 22pF to 18pF ====> 0119 46. Power delete R633 and pull hi voltage ====> 0119 47. Power delete TC39, TC43 and change TC41, TC42 to 79.33719.20C ====> 0120 48. Add CRT detect circuit ====> 0119 49. Change R594 pull hi voltage from 3D3V_S0 to 3D3V_S5 for S3 wake up issue ====> 0123 50. Power change material L44 and L46 from 68.3R310.20A to 68.4R710.20D 51. Power change R480 from 8.2K to 12K ====> 0124
ho in
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21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
54. Change R59 from 100K to 8.2K and add R649 / R650 for don't boot up with battery only ====> 0205
Document Number
Date: Friday, March 31, 2006 2
HISTORY MYALL2 Sheet 1
Rev
MP 57
of
57
he
Size
xa
Title
3
tm
Wistron Corporation
53. Delete U57 / C671 /C675 / C656 / C663 / U8 / D12 / D13 / C306 / R218 / R219 for don't boot up with battery only ====> 0205
4
ai
l.c
A
52. Power change capacitor material from 78.10699.42L to 78.10622.53L as C685 ~ C692 ====> 0125
5
om
L45 from 68.3R310.20A to 68.2R210.20B ====> 0123 A
