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International Journal of Computational Intelligence and Applications Vol. 5, No. 1 (2005) 1–22 c Imperial College Press


GENETIC-ALGORITHM MEMORY MINIMISATION FOR DESIGNING RECONFIGURABLE IP ADDRESS LOOKUP ENGINE

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SAEED SHAMSHIRI

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Electrical and Computer Engineering Department University of Tehran,Tehran, 14395/515, Iran [email protected]

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S. MEHDI FAKHRAIE

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Electrical and Computer Engineering Department University of Tehran,Tehran, 14395/515, Iran [email protected]

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IP address lookup engine is the beating heart of a router. For meeting the requirements of a desirable high-speed router, speed, memory consumption, scalability, and reconfigurability of its IP lookup engine are critical. This paper uses a genetic-algorithm approach to optimise the structure of fixed-stride multibit-trie IP lookup methods. In this work, the genetic algorithm is used first in the design phase as an offline optimisation mechanism. This nature-inspired simulation finds the most memory-efficient configuration of IP address segmentation for a fixed number of address segments. Then, for adapting to network variations, the proposed method dynamically changes the number of address segments to compromise between speed and memory consumption. Each time the number of segments changes, an online genetic program is run to optimise the segmentation. Therefore, the lookup engine reconfigures itself to cover more prefixes during the time. The reconfigurability in response to the network variations, and scalability to the number of prefixes improves the life time of a router that uses this method.

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Keywords: Genetic algorithm; IP address lookup; reconfigurable router; high speed router; IP address segmentation.

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1. Introduction 31 33 35 37 39

Increasing the volume of network applications in one side and the added speed of the network links in the other side increase the demand for high-speed routers. Daily variations in the network topology raise requirements for reconfigurable and scalable routers. A reconfigurable router has a greater life time and better performance in present unsteady Internet topology. Designing a reconfigurable and high speed router requires a fast and cost-effective solution for IP address lookup that restructures itself with network variations. For designing the required IP lookup engine, memory and speed optimisation problems should be considered. Geneticalgorithm as a global optimisation methodology can encounter this problem in the design phase. The result of this offline optimisation is a fast IP address lookup with 1

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minimised amount of memory requirement in the starting point of a router’s lifetime. Adding the dynamic reconfigurability feature to the IP lookup engine makes it possible to resolve the optimisation problem dynamically during the lifetime of the router. Resolving these optimisation issues is possible by an online genetic-algorithm simulation. This online genetic-algorithm-solving strategy keeps the router always in an optimal state, and therefore increases its performance and lifetime. The proposed IP address lookup solution employs the genetic algorithm methodology not only in the initial configuration but also in all intermediate reconfigurations. The IP address lookup is a unit that is responsible for finding the correct nexthop information for each incoming packet to a router. The lookup engine takes the destination IP address of each packet and matches it in the forwarding table. 1.1. Internet addressing scheme and forwarding tables

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Internet addressing mechanism follows a hierarchical address scheme composed of network and host address fields. Originally, Internet address space was covered by three main classes, A, B, and C. In each class, sizes of the network and host fields of the IP address were fixed values that made the task of IP lookup as easy as an exact matching of the network address in the forwarding table. By increasing the number of Internet consumers and entries in the forwarding tables of routers, CIDR (Classless Inter Domain Routing) was introduced in 1994.1 In this classless addressing model, which is the one commonly used today, network field of the IP address can be any arbitrary prefix of the IP address. Main advantages of CIDR are better utilisation of the IP address space, and decreasing the size of the forwarding tables by address aggregation. Introducing CIDR hardens the problem of IP lookup into searching the forwarding table for finding the best match. Since the destination IP address may match with different network prefixes of different lengths, the best match is the one that has the greatest length. So the problem of IP lookup is now known as a Longest Prefix Match (LPM) problem. Figure 1 shows a supposed forwarding table of a router. Each entry of this table holds a network prefix with its length and a result field. The result field is a shortlength pointer that points to a table that contains next hop information. This table can be called Next-Hop Table (NHT) (see Fig. 1). Generally, NHT covers many fields including out port, next-hop IP address, next-hop layer-2 address, next-hop layer-2 MTU (Maximum Transfer Unit), and so on. Although NHT is rather wide, its memory consumption is negligible; because number of its entries is bounded to the number of next hops that typically does not exceed 100. Therefore, authors of IP lookup papers mostly ignore NHT size in memory consumption measurements and just consider the size of the forwarding table. 1.2. Related work

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Many IP address lookup solutions have been proposed previously. Several solutions use a trie structure for storing the prefixes of the forwarding table. Since in IPv4,

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Prefix/Length Result (8-bit) (32/5-bit) 66.228.8.0/21

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Forwarding Table

Fig. 1.

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Next-hop IP Adr. Out Port Next-hop Layer 2 adr. Next-hop Layer 2 (48-bit) MTU (16-bit) (8-bit) (32-bit)

Next-Hop Table

A simple forwarding table pointing to a Next-Hop Table (NHT).

the IP address takes 32 bits, the depth of a trie that holds IP address prefixes is 32. Therefore, at worst case, 32 memory accesses are required for searching the trie. Some solutions compress the trie for decreasing the memory consumption and improving the speed,2,3 while some others use multi-bit tries;4−18 however, using a multi-bit trie instead of a single-bit trie normally increases the memory consumption. Some papers have proposed compression methods for solving this problem.10–18 These compression techniques include path compression,2,3,17,18 level compression,17,18 and bitmap compression.10–14 Reference 15 introduces CStrie (Compact Stride trie) that has a special conditional node structure to compact strides of the multibit trie. References 7, 16, 17, and 18 use variable-stride multibit tries. Variable-stride multibit tries such as (Level Compressed) LC-trie in Refs. 17 and 18 are more complicated than fixed-stride multibit tries and their incremental update is more difficult.1 However, any compression method increases update overhead. Therefore, to reduce the memory consumption with easy updates, finding proper address segmentation is recommended as well. In Ref. 5, fixed-stride multibit tries with strides of equal size have been considered and experimental results have demonstrated how changing the segmentation affects the memory consumption. Reference 19 proposes two algorithms, using dynamic programming and Lagrange multipliers, for finding the optimum address segmentation for general processors with hierarchical memory architectures. The Lagrange multipliers method is an approximation and cannot find the globally optimum solution; the dynamic programming method is able to find the optimum solution, but it is exponential. References 20 and 21 have considered different sizes of address segments for variable-stride multibit tries using a dynamic programming approach. Besides the methods that work based on the trie data structure, other methods are also proposed. Some of them use hash tables,22–24 while some others use CAM (Content Addressable Memory) or TCAM (Ternary CAM) for solving the LPM problem.25–29 Some of these methods are not fast enough and some others consume lots of memory and those which have good speed and memory consumption suffer

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from heavy update overhead. A good comparison between some of these methods comes in Refs. 1 and 30. It seems that finding a method that meets all of the requirements of high-speed search, low memory consumption and high-speed update is an endless challenge. In fixed-stride multibit trie methods, the IP address is partitioned into different segments. Number of these segments specifies the number of memory accesses that has a direct relation with search speed. The length of each segment and the partitioning points affect the amount of memory consumption. Different papers have used various specific partitioning schemes for IP address without any proof that their partitioning was the best one.4,9,10,12–15 This is what we have elaborately studied in this paper. It is also our conjecture that designing a lookup algorithm that reconfigures itself and its available memory for working at maximum speed and capacity delivers a real flexibility to present routers. Genetic algorithm is a proven method for solving optimisation problems and finding globally-optimum solutions.31,32 We have developed offline and online GA optimisation techniques to accommodate design and operation time optimisations in the table structures. In offline mode, when speed is not a major concern, GA is given elaborate time to approach a globally-optimum solution. In online mode, when speed is a major concern, we start from a expert-guided selected population with estimated good properties to accelerate the GA engine. As our experiments confirm (implied from Table 9), in IP segmentation problem, there are many local optimum segmentation points and this tends to utilise GA property as it works better where the objective function has several local minima. 1.3. Paper organization

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This paper is proposing techniques for optimum IP address segmentation and is composed of two major contributions. In the first contribution, an offline geneticalgorithm simulation is used to find out the most memory-efficient partitioning scheme. The results of this simulation are used for memory-optimised full-custom implementation of a lookup engine at a given speed. In this approach, first, number of address segments is decided regarding the required speed; then the genetic program finds the best breaking points for dividing the IP address such that the hardware implementation consumes minimum possible memory size. In the second contribution of this paper, an online genetic algorithm is used that is dynamically run to keep the address segmentation always at the optimal point. For scaling with the growing number of routing prefixes, the proposed method trades off the lookup speed with memory consumption and vise versa. By increasing the number of segments, this method can always reconfigure itself so that an increased amount of routing information fits in its fixed-size memory. Or when lower routing information is available, by reducing the number of segments, the present information is accessed at a higher pace. After incrementing or decrementing the number of segments, a genetic algorithm program finds optimal size for each

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segment to utilise the memory more efficiently. Also, when the number of routing prefixes does not change dramatically, distribution of prefixes in the address space may reshape; so the periodic GA simulation keeps the forwarding table configuration always at the optimal point. Section 2 describes tries and multibit tries and briefly evaluates them. Section 3 explains the proposed offline genetic-algorithm simulation for custom implementation of a multibit trie lookup and presents its experimental results. Section 4 discovers the tradeoff between the speed and memory consumption and explains the application of an online genetic algorithm for optimum reconfiguration of a lookup engine. The experimental results of this reconfigurable implementation are also illustrated in this section. Finally, the paper is concluded in Sec. 5.

2. Tries and Multibit Tries 13 15 17 19 21 23 25

A common data structure for solving the LPM problem in general and IP address lookup in special is a binary trie. Trie is a tree in which the value of each node corresponds to the unique path that exists from the root to that node. Figure 2(b) shows a binary trie that corresponds to the forwarding table of Fig. 2(a). In this trie, nodes that represent an existing prefix are labeled with their corresponding results. For searching the longest prefix match in a trie, search starts from the root of the trie. Each bit of IP address from MSB to LSB shows the traversing direction at each node of the trie. Passing a labeled node means finding a match and when the search terminates at a leaf, the last labeled node that is met is the longest matching prefix. Searching binary trie is a linear search in the prefix length domain. This means that the search order is O(W ) while W is the maximum prefix length which is 32 or 128 in IPv4 or IPv6 respectively. Because of the large number of memory accesses,

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111110

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(a) Forwarding Table Fig. 2.

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A forwarding table and its corresponding binary trie in a 6-bit virtual address space.

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binary trie is not a fast solution although it is the basic foundation of many existing fast solutions. Some methods try to compress the binary trie. One of the most famous compressing techniques is the pass compression used in BSD trie. For improving the search speed, a step over the binary trie is a multibit trie. A Multibit trie is a non-binary trie that needs more than one bit of address at each node for making decision. A multibit trie is usually equivalent to a specific partitioning of IP address into segments. Number of these segments is equal to the depth of the trie and shows the number of required memory accesses. This kind of multibit trie is called fixed-stride multibit trie. Figure 3 shows a fixed-stride multi-bit trie composed of 2 strides of lengths 4 and 2. This multibit trie corresponds to the binary trie of the previous figure. For transforming a binary trie into a multibit trie, each prefix of the forwarding table should be expanded to the end of the nearest stride. This technique is called Controlled Prefix Expansion (CPE).8 The search order of multibit tries is O(Wdist ), while Wdist is the number of distinct prefix lengths that exist after controlled prefix expansion. In other words, Wdist is equal to the number of strides. Since Wdist is less than W , multibit tries are faster than single-bit tries. The main disadvantage of multibit tries is their memory consumption. Henriksson et al. have considered fixed-stride multibit tries with strides of equal size.5 They have shown that when the number of strides decreases, the memory consumption increases. This result is obvious because less number of strides forces each prefix to be expanded to more prefixes and hence consumes more memory space. Another kind of multibit trie is variable-stride multibit trie. In variable-stride multibit tries, nodes of the same level may be from different degrees. This kind of multibit trie does not correspond to any IP address segmentation. The most

First Stride

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Second Stride

4 Fig. 3.

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A fixed-stride multibit trie.

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famous proposed method based on the variable-stride multibit trie is the LC-trie (Level Compressed trie).17,18 In LC-tries, the out degree of each node is determined according to the compactness of next levels. More sparseness of the next levels’ prefixes yields lower degree of the node. LC-trie is an efficient way of compressing the trie but it suffers from massive overhead of the update operation. Our work is based on fixed-stride multibit tries that corresponds to IP address segmentation. While many kinds of address segmentation have been proposed, none of them is a globally optimum segmentation that minimises the amount of memory consumption. In the first phase of this work (Sec. 3), a way for finding the best address segmentation for a fixed number of segments is presented. Genetic algorithm is employed to obtain the segmentation that consumes minimum memory for a specific set of prefixes. The result is a hardware architecture based on the multibit trie that is fast and its memory consumption is minimised. In the second phase of this work (Sec. 4), the genetic-algorithm program is embedded in the router for online optimisations. This yields a software-oriented implementation of a multibit trie that reconfigures itself with the growth of the network size. In this proposed reconfigurable lookup engine, number of segments dynamically changes and speed is being balanced with memory consumption. The reconfigurability of the lookup engine makes it scalable to the number of prefixes and makes lifetime of the router to be longer.

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3. Hardware-Based Implementation with Offline Genetic-Algorithm Simulation

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In this section, we want to find out which IP address segmentation is the best one. The best segmentation is the one that consumes less memory. Clearly, increasing number of segments decreases the memory consumption; but it affects the lookup speed. So, number of segments is first decided regarding the speed requirement; then, the best segmentation scheme is calculated for the determined number of segments. For finding the best segmentation, genetic algorithm (GA) is used as a global search method. GA runs one time in the design phase; the result of this offline simulation is a segmentation scheme that clears the architecture of memory for full custom design. Subsection 3.1 explains GA parameters and functions used in this work. Experimental results of these GA simulations are illustrated in Subsec. 3.2, and Subsec. 3.3 compares the results of GA optimisation with previouslyused segmentations.

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3.1. Genetic algorithm parameters In the terminology of GA (Genetic Algorithm), in this work, the problem is finding a segmentation configuration with a pre-determined number of segments (for example four segments) so that its memory consumption is minimal. A solution is a segmentation configuration. A segmentation configuration is a set of numbers that

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Initial Population: contains n random individuals

n New Individuals

Fig. 4.

n Individuals

2n Individuals

Genetic algorithm flow chart.

Cross Over

Mutation

7-10-3-12 13-6-4-9

16-3-4-9

13-8-4-7

12-8-4-8

18-2-5-7 17-5-3-7 8-11-5-8 Fig. 5.

The crossover and mutation operators.

Roulette Wheel Mechanism

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Fitness Function

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represent size of different segments (e.g. 16-4-4-8). Clearly, each segment size is a number between 1 and 32 and their sum must be 32 for IPv4. Each possible solution to the problem is an individual member of the solution space and the solution population is composed of 40 individuals. Initial population is composed of 40 randomly generated segmentation configurations. In each generation, by applying crossover and mutation operators on the population, 40 new individuals are generated; then, a fitness function is calculated for 40 individuals of the population and the 40 newly produced individuals; finally, 40 individuals are selected out of the 80 existing ones using a roulette wheel mechanism. After 50 generations, the best individual is selected as the optimum solution of the problem. Figure 4 shows the flow chart of the genetic-algorithm methodology. Here, the crossover mechanism is defined as selecting two random individuals of the population and producing a new individual which is segmental average of them. For example, crossing over 16-4-4-8 and 12-4-6-10 results 14-4-5-9. The mutation operation is defined as selecting one individual at random, selecting two segments of it randomly, and subtracting 1, 2, or 3 units from one segment and adding it to the other segment. For example, the mutation of 12-8-8-4 can be 12-8-6-6, 14-8-6-4, 13-7-8-4 and 12-8-5-7. Figure 5 illustrates the crossover and mutation operators with other examples. The result of the GA simulation is used for designing the memory architecture. Figure 6 shows a memory architecture that corresponds to a 4-slice segmentation. It also elaborates the way memory consumption is counted in a custom design.

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First Level Result Valid Pointer Valid Flag Flag

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K2: number of tables of level 2

K3: number of tables of level 3

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Memory architecture for a 4-slice configuration.

3.2. Experimental results Ten different forwarding tables are selected from actual forwarding tables published on the web.33 Tables 1–6 show optimised segmentation schemes obtained via GA for each forwarding table. These tables correspond to segmenting IP address into 3 to 8 segments. The final result is a segmentation scheme obtained for each case and its corresponding memory consumption. The memory consumption is calculated in terms of Kilo-Byte and total number of entries. Total number of entries is summation of number of entries of all tables at all levels of memory architecture (see Fig. 6). In Tables 1–6, the size of the required memory is reported for custom memory design. In custom design, each memory entry consists of a 7-bit pointer field that points to a row in the next-hop table and a flag that validates it. Each entry of the memory also contains a field that points to a table of the next memory level. The length of this field depends on the number of tables in the next level. For validating this field, a 1-bit flag is also required. So, in the ith level of the memory architecture, memory width is 9 + log2 (ki+1 ) while ki+1 is number of the tables in the next level of the memory (see Fig. 6).

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S. Shamshiri & S. M. Fakhraie Table 1.

Memory-efficient segmentation schemes for 3-slice segmentations.

Forwarding Table Name

AS267 AS286 AS3333 AS3549 AS15290 AS16150 AS293 AS3356 AS12956 AS4637

Table 2.

Size (Number of Entries) 134024 134236 139033 133869 262762 137465 135796 133355 135179 31896

Final Result Segmentation Scheme 19-5-8 18-6-8 19-5-8 19-5-8 18-6-8 19-5-8 19-5-8 18-6-8 18-6-8 16-8-8

AS267 AS286 AS3333 AS3549 AS15290 AS16150 AS293 AS3356 AS12956 AS4637

Table 3.

Entries

KByte

1364096 1538496 1535744 1386656 1512896 1489408 1363776 1533888 1543808 624128

3234 2700 3742 3357 2971 3582 3137 2376 2388 870

Memory-efficient segmentation schemes for 4-slice segmentations.

Forwarding Table Name

Memory Consumption

Final Result

Size (Number of Entries)

Segmentation Scheme

134024 134236 139033 133869 262762 137465 135796 133355 135179 31896

16-4-4-8 16-4-4-8 16-5-3-8 16-4-4-8 16-4-4-8 16-4-4-8 16-4-4-8 16-4-4-8 16-4-4-8 14-6-4-8

Memory Consumption Entries

KByte

708192 690768 824256 731184 684016 831344 706912 687136 694304 189312

1578 1313 1957 1661 1416 1849 1530 1186 1205 337

Memory-efficient segmentation schemes for 5-slice segmentations.

Forwarding Table

Final Result

Name

Size (Number of Entries)

Segmentation Scheme

AS267 AS286 AS3333 AS3549 AS15290 AS16150 AS293 AS3356 AS12956 AS4637

134024 134236 139033 133869 262762 137465 135796 133355 135179 31896

16-3-2-3-8 16-3-2-3-8 16-4-2-2-8 16-3-2-3-8 13-5-3-3-8 13-5-3-3-8 13-5-3-3-8 12-5-3-4-8 12-5-3-4-8 11-6-3-4-8

Memory Consumption Entries

KByte

565712 548572 687232 589116 555792 700304 577248 642312 649312 159208

1343 1169 1610 1404 1285 1619 1370 1060 1070 258

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Memory-efficient segmentation schemes for 6-slice segmentations.

Forwarding Table Name

AS267 AS286 AS3333 AS3549 AS 15290 AS16150 AS293 AS3356 AS12956 AS4637

Table 5.

Size (Number of Entries) 134024 134236 139033 133869 262762 137465 135796 133355 135179 31896

Final Result Segmentation Scheme 12-5-3-2-2-8 11-5-3-2-3-8 12-5-3-2-2-8 12-5-3-2-2-8 12-4-3-2-3-8 12-5-3-2-2-8 11-5-3-2-3-8 8-8-3-2-3-8 10-6-1-3-4-8 11-5-3-2-3-8

AS267 AS286 AS3333 AS3549 AS15290 AS16150 AS293 AS3356 AS12956 AS4637

Table 6.

AS267 AS286 AS3333 AS3549 AS15290 AS16150 AS293 AS3356 AS12956 AS4637

KByte

479428 508412 642096 502956 504368 598988 523152 508936 644540 124348

1223 1058 1476 1268 1120 1403 1199 987 1057 236

Final Result

Size (Number of Entries)

Segmentation Scheme

134024 134236 139033 133869 262762 137465 135796 133355 135179 31896

11-5-2-2-2-2-8 8-4-4-3-2-3-8 11-6-3-2-2-3-5 8-8-2-2-2-2-8 11-5-2-2-2-2-8 10-4-3-3-2-2-8 10-6-2-2-2-2-8 7-5-4-3-2-3-8 6-5-5-3-2-3-8 8-5-3-3-2-3-8

Memory Consumption Entries

KByte

465688 506876 490720 494448 445056 595388 463564 502536 509304 122180

1182 1053 1334 1242 1103 1393 1169 969 985 231

Memory-efficient segmentation schemes for 8-slice segmentations.

Forwarding Table Name

Entries

Memory-efficient segmentation schemes for 7-slice segmentations.

Forwarding Table Name

Memory Consumption

Final Result

Size (Number of Entries)

Segmentation Scheme

134024 134236 139033 133869 262762 137465 135796 133355 135179 31896

8-5-4-3-2-2-4-4 8-4-4-3-2-3-4-4 10-4-3-3-2-2-3-5 7-6-4-3-2-2-4-4 9-4-3-3-2-3-4-4 8-5-4-3-2-2-3-5 8-6-3-3-2-2-4-4 7-5-4-3-2-3-4-4 8-5-3-3-2-3-4-4 8-5-3-3-2-3-3-5

Memory Consumption Entries

KByte

459204 505212 486032 459596 497872 478700 464040 502296 508424 122180

1197 1052 1320 1220 1111 1282 1186 969 982 231

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Memory Consumption (Byte)

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Figure 7 shows the average and minimum memory consumption for members of each generation for AS267 forwarding table with 4-slice segmentation. This figure illustrates the evolutionary path from the first random generation to the final one. Figure 8 shows the minimum memory consumption in each generation for AS267 for different number of segments. As this figure demonstrates, finding the optimal segmentation has a great impact on the amount of memory consumption, especially when there are fewer segments. 6.00E+06

AS267

5.00E+06

Minimum Cost Average Cost

4.00E+06 3.00E+06 2.00E+06 1.00E+06 0.00E+00 1

4

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10 13 16 19 22 25 28 31 34 37 40 Generation

Fig. 7. The minimum and average memory consumption of the population in each generation for the forwarding table AS267 in 4-slice segmentation.

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Fig. 8. The minimum memory consumption in each generation for AS267 forwarding table for different numbers of segments.

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3.3. Comparing GA-optimised segmentations with other segmentations

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Memory consumption of fixed-stride multibit tries is highly dependent on the IP address segmentation they use. Several papers use the simplest address segmentation for 4-slice segmentation, that is 8-8-8-8;10,12,15 while, Ref. 9 uses 16-4-4-8 for its architecture. References 13 and 14 use 18-6-8 and 16-8-8 segmentations for their three-level architectures respectively. Reference 4 uses several divisions including 24-8, 21-3-8, 20-2-2-8, 20-1-1-2-8, and 19-1-1-1-6-8 for different number of slices of its address segmentation. Some other papers use segmentations with equal segments for different number of slices.5,6 In this part, we want to compare these previously-used address segmentations with those obtained via GA optimisations. Tables 7 and 8 demonstrate evidence in support of our conjecture that choosing the best segmentation can reduce the memory consumption. It is concluded that for gaining the maximum compression in multibit tries, in addition to different compression methods that previous researchers have employed, choosing the best segmentation is strongly valuable as manifested in this work.

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Table 7. Comparing memory consumption of a commonly-used segmentation with GA-optimised segmentations on different forwarding tables. Forwarding Table

Priviously-Used Segm.

GA-Optimised Segmentation

Name

Size (Number of Entries)

Segmentation

Memory Cons. (KB)

Segmentation

Memory Cons. (KB)

Memory Cons. Reduction

AS267 AS286 AS3333 AS3549 AS15290 AS16150 AS293 AS3356 AS12956 AS4637

134024 134236 139033 133869 262762 137465 135796 133355 135179 31896

8-8-8-8 8-8-8-8 8-8-8-8 8-8-8-8 8-8-8-8 8-8-8-8 8-8-8-8 8-8-8-8 8-8-8-8 8-8-8-8

4294 3226 5325 4574 3608 5004 4055 2695 2719 724

16-4-4-8 16-4-4-8 16-5-3-8 16-4-4-8 16-4-4-8 16-4-4-8 16-4-4-8 16-4-4-8 16-4-4-8 14-6-4-8

1578 1313 1957 1661 1416 1849 1530 1186 1205 337

63% 59% 63% 64% 61% 63% 62% 56% 56% 53%

Table 8. Comparing memory consumption of previously-used segmentations with GA-optimised segmentations on AS267 forwarding table. Priviously-Used Segm. Segmentation 16-8-8 18-6-8 21-3-8 20-2-2-8 20-1-1-2-8 19-1-1-1-6-8

Memory Cons. (KB) 4390 3356 7199 3921 3973 3038

GA-Optimised Segmentation Segmentation 19-5-8 19-5-8 19-5-8 16-4-4-8 16-3-2-3-8 12-5-3-2-2-8

Memory Cons. (KB)

Memory Cons. Reduction

3234 3234 3234 1578 1343 1223

26% 4% 55% 60% 66% 60%

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4. Reconfigurable Software-Based Implementation with Online Genetic-Algorithm Simulation

3

In the previous section, GA was used as an offline process. Now, by embedding GA in the system as an online process, a reconfigurable lookup engine can be achieved. This engine gains memory-speed tradeoff for scaling itself with the growth of the network size. Subsection 4.1 explains this tradeoff. Experimental results of this section are collected in Subsec. 4.2.

5 7

4.1. Memory-speed tradeoff 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39

Henriksson et al. have considered equal-size fixed-stride multibit tries and shown that when the number of strides decreases, the memory consumption increases.5 Each fixed-stride multibit trie corresponds to a configuration of IP address segmentation. More segments yields less memory segmentation and fewer segments yield more memory consumption. This fact is the basic concept behind our reconfigurable solution. The memory consumption is measured with respect to two margins called low and high margins. The region between the low and high margins is called valid region. The segmentation scheme that its memory consumption is in valid region is considered as a valid segmentation. The segmentation scheme that its memory consumption is outside of the valid region is considered as an invalid segmentation and must be changed to fit in the valid region. In the proposed method, IP address is first divided into four segments and the best 4-slice segmentation is chosen so that minimum memory is consumed. After calculating the memory consumption, if it exceeds the high margin, number of segments is incremented and the best 5-slice segmentation is chosen to fit the forwarding information in the valid region of the available memory. If the memory consumption again exceeds the high margin, the same procedure is followed. When number of forwarding prefixes decreases as a result of some changes in the network topology, some parts of memory is set free. Our method aims to utilise all available memory for increasing its speed. So, when the memory consumption comes lower than the low margin of the available memory, number of address segments is decremented and one memory access is saved. By increasing and decreasing the number of memory segments, this method uses its maximum available memory for achieving maximum speed and reconfigures itself with network variations. Figure 9 shows the average memory consumptions of AS267 forwarding table with 134024 prefixes for different number of segments. As this figure demonstrates, by increasing the number of segments into eight, the curve saturates and no memory will be saved afterwards. As a result of this fact, maximum number of segments considered in this work is bounded to 8. Minimum number of segments is set to 3; because having less than 3 segments for typical forwarding tables requires significant amount of memory.

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Memory Consumption (KB)

6000

15

5456

5000 4000 2638

3000

2097

1918

1863

1797

5

6

7

8

2000 1000 0 3

4

Number of Segments Fig. 9. Memory consumptions of AS267 forwarding table for different number of segments. The depression in memory consumption saturates when increasing number of segments into 8 segments.

1 3 5 7 9 11 13 15 17 19 21 23

The low and high margins of the available memory are tuned to 70% and 90% of the memory capacity. Notice that the high margin must not be as high as 100% of the available memory. Because the process of reconfiguring address segmentation repeated periodically after passing a specific time; In the time between two reconfigurations, there must be enough free memory space to add probable newly added prefixes. The 10% confidence margin seems to be enough for avoiding the memory overflow. So far, it has been described how our method increments and decrements number of address segments for reaching the best memory-speed compensation. After deciding on the number of segments, the problem is how to find the size of segments in a way that the memory consumption is minimised. For doing this, one solution is trying a reasonable set of sizes of segments and selecting the best one. Table 9 shows some reasonable 5-slice segmentations and their memory consumptions for the AS267 forwarding table.33 Another solution can be trying random sizes for each segment and selecting the best composition of segments’ sizes. Although these solutions are fast, they cannot guarantee that the final result is the best size for each segment that minimises the memory consumption. For finding the globally optimum size for each segment, using a global search algorithm is inevitable. In this work genetic algorithm is used as a global search algorithm to find out the best configuration for the fixed number of segments. The parameters and functions of this GA implementation is almost the same as the one described in the Sec. 3, Subsec. 3.1. Only two changes are applied to accelerate the online GA simulation. First, number of generations is limited to 10 and second, for initial population, a

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S. Shamshiri & S. M. Fakhraie Table 9. List of some 5-slice segmentations and their memory consumptions for the AS267 forwarding table33 containing 134024 prefixes. Segmentation Scheme

Memory Consump. (KByte)

Segmentation Scheme

Memory Consump. (KByte)

13-3-3-5-8 13-3-5-3-8 13-5-3-3-8 13-4-4-3-8 13-4-3-4-8 13-3-4-4-8 13-2-4-5-8 13-2-5-4-8 13-4-2-5-8 13-4-5-2-8 13-5-2-4-8 13-5-4-2-8 13-2-3-6-8 13-2-6-3-8 13-3-2-6-8 13-3-6-2-8 13-6-2-3-8 13-6-3-2-8 14-2-3-5-8 14-2-5-3-8 14-3-2-5-8 14-3-5-2-8

3734 2489 2319 2354 2656 2683 3954 3164 3760 2677 2719 2447 5511 3490 5421 3027 2413 2313 3760 2515 3780 2696

14-5-2-3-8 14-5-3-2-8 14-3-3-4-8 14-3-4-3-8 14-4-3-3-8 15-2-3-4-8 15-2-4-3-8 15-3-2-4-8 15-3-4-2-8 15-4-2-3-8 15-4-3-2-8 15-3-3-3-8 16-2-2-4-8 16-2-4-2-8 16-4-2-2-8 16-2-3-3-8 16-3-2-3-8 16-3-3-2-8 17-2-2-3-8 17-2-3-2-8 17-3-2-2-8 18-2-2-2-8

2392 2292 2675 2373 2325 2725 2423 2758 2486 2392 2292 2358 2759 2487 2097 2359 2263 2163 2471 2372 2252 2678

Average

2802

1

completely random population is replaced with a random selection among some reasonable individuals.

3

4.2. Experimental results

5 7 9 11 13 15 17

Networks topology changes daily and cause forwarding tables of routers always to be in variation. By growth of networks, size of forwarding tables increases during months and years. Figure 1034 illustrates the growth of AS1221 forwarding table from 1989 to 2005. The size of this table and its growth at each year are extracted from Fig. 10 and listed in Table 10. As this table demonstrates, size of this forwarding table grows with average rate of 30% per year. Our reconfigurable lookup engine can adapt itself with this growth; when number of prefixes increases, our method limits its speed to fit all of the additional prefixes in its available memory. Table 11 shows the memory consumption of forwarding tables of different sizes for different number of segments. These tables are obtained by truncating AS267.33 Suppose that there is 2MByte memory available for the lookup engine. Applying 70% and 90% margins bounds the valid region between 1.4 MB and 1.8 MB. In Table 11, the cases that consume valid amount of memory space are highlighted. The proposed method aims to keep data always in the valid region.

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Fig. 10.

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Growth of forwarding table AS1221 from 1989 to 2005.34 Table 10. Size and growth of table AS1221 from 1993 to 2005. These information are extracted from Fig. 10. Year

1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005

Table Size (Number of Entries) 9000 15000 23000 33000 41000 50000 56000 72000 102000 126000 139000 158000 186000 Average

1 3 5

Table Growth from Previous Year No. of entries

Percent

6000 8000 10000 8000 9000 6000 16000 30000 24000 13000 19000 28000

67% 53% 43% 24% 22% 12% 29% 42% 24% 10% 14% 18%

14750

30%

Figure 11 shows a scenario of forwarding tables’ growth during the time. This scenario shows how the proposed method adjusts number of segments to bring the memory consumption in the valid region. The scenario starts with a table of 80000 prefixes and 4-slice segmentation. When number of prefixes increases to 90000, the memory consumption exceeds the memory high margin; so, the reconfigurable

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S. Shamshiri & S. M. Fakhraie Table 11. Memory consumption of AS267 forwarding table33 for different sizes and for different number of segments. Table Size

Memory Consumption (KByte) for Different Number of Segments 3

4

5

6

7

8

40000 45000 50000 55000 60000 65000 70000 75000

2806 3035 3161 3319 3523 3700 3863 3968

1003 1122 1202 1290 1384 1470 1564 1622

751 869 944 1017 1092 1161 1239 1291

588 683 757 831 918 977 1055 1107

574 656 724 778 880 957 1002 1070

540 624 698 771 847 916 993 1046

80000 85000 90000 95000

4080 4173 4248 4380

1685 1746 1805 1897

1342 1481 1445 1522

1159 1215 1270 1337

1103 1168 1245 1322

1096 1149 1202 1279

100000 105000 110000 115000

4530 4708 4900 5022

1999 2122 2244 2329

1606 1708 1810 1877

1426 1525 1628 1696

1407 1474 1582 1647

1365 1468 1572 1632

120000 125000 130000

5132 5237 5358

2419 2502 2566

1939 2000 2051

1757 1819 1876

1720 1797 1824

1701 1761 1807

4-slice segmentation 5-slice segmentation 6-slice segmentation

Memory Consumption (KByte)

2600 2400 2200 2000 1800

Available Memory 90% margin Valid Region

1600 1400 70% margin 1200 1000 80

85

90

95

100

105 110

115 120

125

Number of Prefixes (x1000)

Fig. 11. Lookup engine scales to the number of prefixes. The proposed method increments number of segments when the memory consumption violates the high margin. Forwarding information of this experiment are extracted from AS267.

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method increase number of segments to five and uses the GA to find out the best 5-slice segmentation. When the table grows more and reach to 110000 prefixes, the memory consumption exits the valid region for the second time; then number of segments is increased to 6 and lets the router continue its work with more prefixes. The above experiment demonstrates that by removing the reconfigurability characteristic of this method, memory cannot convey more than 100000 prefixes with 4-slice segmentation and more than 125000 prefixes with 5-slice segmentation. Focusing on the 4-slice and 5-slice segmentations reveals that while the life time of the 4-slice segmentation terminates by 100000 prefixes, the 5-slice segmentation can bear up to 125000 prefixes. Since forwarding tables grow with rate of 30% per year, the life time of the 5-slice segmentation is about one year longer than the 4-slice one. Therefore, using the proposed reconfigurable method can extend the life time of routers by possibly several years. Our lookup engine can also be reconfigured when size of the forwarding table decreases. Figure 12 shows another scenario that deals with increasing and decreasing of the size of the forwarding table. In this experiment, the available memory is 2.5 MB and the forwarding table is again AS267. During several time periods, this forwarding table is supposed to be enlarged from 100000 to 130000 and then reduced to include only 95000 prefixes. First, the table contains 100000 prefixes

4-slice segmentation (16-5-3-8) 5-slice segmentation (16-4-2-2-8) 4-slice segmentation (16-5-3-8) 2750

Memory Consumption (KByte)

1

19

2566

2500

Available Memory

2419

2250

90% margin

2244 1999

2000

2122

2051 1939

Valid Region 1897

1877

70% margin

1750

1708 1522

1500 1250 1000 100

110

120

130

115

105

95

Number of prefixes (x1000) Fig. 12. Equilibrium of speed and memory consumption for utilising the available memory towards achieving maximum speed. The proposed reconfigurable algorithm changes number of segments when the memory consumption exits the valid region.

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and the segmentation is composed of 4 slices (see Fig. 12). These prefixes fit in the valid region of the available memory. When number of prefixes increases to 110000, the memory consumption is still valid; but after passing by the 120000 limit, memory consumptions exceeds the high margin. Therefore, the number of segments is incremented to five, and so, memory consumption drops down again into the valid region. Increasing the number of prefixes up to 130000 prefixes still keeps the memory consumption in the valid region. Notice that if the number of segments had not been changed, the memory consumption of the 130000 prefixes would have been beyond the available 2.5 MB memory. This means no space for adding new prefixes and implies some more overhead over the network. In the other case, when the number of prefixes decreases to 105000, the memory utilisation comes below 70% and so the lookup engine automatically decrements the number of segments and finds the best 4-slice segmentation with GA. The memory consumption of this 4-slice segmentation is in the valid region. 5. Conclusion and Future Work A genetic algorithm solution for finding an optimal IP address segmentation scheme was proposed. The experimental results showed that this solution achieves a memory architecture that is globally minimal. This method leads to a multibit trie design that is fast and memory efficient. This soft programming also helps a router to reconfigure its IP lookup engine along the time so that it always consumes the minimum amount of memory and therefore can accommodate more new entries. This yields a router that adapts itself with the contents of the forwarding information that vary in time and space. It was also shown that the life time of a router that uses this reconfigurable method is at-least a year longer than a static router. Our future work includes improving our method to cover IP version 6 and designing a completely reconfigurable forwarding engine that covers classification as well. References 1. M. A. Ruiz-Sanchez, E. W. Biersack and W. Dabbous, Survey and taxonomy of IP address lookup algorithms, IEEE Network 15(2) (2001) 8–23. 2. D. R. Morrison, PATRICIA — Practical algorithm to retrieve information coded in alphanumeric, J. ACM 15(4) (1968) 514–34. 3. K. Sklower, A tree–based packet routing table for Berkeley UNIX, Proc. 1991 Winter Usenix Conference (1991), pp. 93–99. 4. P. Gupta, S. Lin and N. McKeown, Routing lookups in hardware at memory access speeds, Proc. IEEE INFOCOM ’98 (Apr. 1998), pp. 1240–47. 5. T. Henriksson and I. Verbauwhede, Fast IP address lookup engine for SOC integration, Proc. Design and Diganostics of Electronic Cricuits and Systems, Brno, Czeck Republic (Apr. 2002), pp. 200–210. 6. P. A. Yilmaz, A. Belenkiy and N. Uzun, A trie-based algorithm for IP lookup problem, IEEE Global Telecommunications Conference, GLOBECOM 2000, No. 1 (November 2000), pp. 593–598.

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7. A. L. Buchsbaum, G. S. Fowler, B. Krishnamurthy, K.-P. Vo and J. Wang, Fast prefix matching of bounded strings, ACM J. Experimental Algorithmics 8 (2003). 8. V. Srinivasan and G. Varghese, Fast address lookups using controlled prefix expansion, Proc. ACM SIGMETRICS (June 1998), pp. 1–11. 9. C.-C. You, Y.-S. Chu, C.-F. Li, and H.-K. Su, Fast IP routing lookups and updates in hardware (2002). 10. D. Pao, C. Liu, A. Wu, L. Yeung and K. S. Chan, Efficient hardware architecture for fast IP address lookup, IEE Proceedings-Computers and Digital Techniques, 150(1) (2003) 43–52. 11. D. E. Taylor, J. S. Turner, J. W. Lockwood, T. S. Sproull and D. B. Parlour, Scalable IP lookup for Internet routers, IEEE J. Selected Areas in Communications 21(4) (2003). 12. S.-H. Oh and J.-S. Ahn, Bit-map trie: A data structure for fast forwarding lookups, IEEE Global Telecommunications Conf., GLOBECOM 2001, No. 1 (Nov. 2001), pp. 1872–1876. 13. H. Michael Ji and R. Srinivasan, Fast IP routing lookup with configurable processor and compressed routing table, IEEE Global Telecommunications Conference, GLOBECOM 2001, No. 1 (Nov. 2001), pp. 2373–2377. 14. M. Degermark, A. Brodnik, S. Carlsson and S. Pink, Small forwarding tables for fast routing lookups, Proc. SIGCOMM. 1997 symposium, Cannes (Sept. 1997), pp. 3–14. 15. K. Seppanen, Novel IP address lookup algorithm for inexpensive hardware implementation, WSEAS Trans. Comm. 1(1) (2002) 76–84. 16. N.-F. Huang, S.-M. Zhao, J.-Y. Pan and C.-A. Su, A fast IP routing lookup scheme for gigabit switching routers, Proc. IEEE INFOCOM, (Mar. 1999), pp. 1429–1436. 17. S. Nilsson and G. Karlsson, Fast address lookup for internet routers, Proc. IFIP 4th Int. Conf. Broadband Communications (1998), pp. 11–22. 18. S. Nilsson and G. Karlsson, IP-address lookup using LC tries, IEEE JSAC 17(6) (1999) 1083–92. 19. G. Cheung and S. McCanne, Optimal routing table design for IP address lookups under memory constraints, Proc. Conf. Comp. Commun. IEEE Infocom, New York (March 1999), pp. 1437–1444. 20. S. Sahni, and K. S. Kim, Efficient construction of variable-stride multibit tries for IP lookup, Proc. IEEE Symp. Appl. Internet, SAINT (2002), pp. 220–229. 21. V. Srinivasan and G. Varghese, Faster IP lookups using controlled prefix expansion, ACM Trans. Comp. Syst. (1999) 1–40. 22. M. Waldvogel, G. Varghese, J. Turner and B. Plattner, Scalable high speed IP routing lookups, Proc. ACM SIGCOMM ’97 (Sept. 1997), pp. 25–36. 23. A. Broder and M. Mitzenmacher, Using multiple hash functions to improve IP lookups, Proc. IEEE INFOCOM 2001 (2001), pp. 1454–1463. 24. S. Dharmapurikar, P. Krishnamurthy and D. E. Taylor, Longest prefix matching using bloom filters, Proc. SIGCOMM 2003, Karlsruhe, Germany (Aug. 2003), pp. 25–29. 25. H. Liu, Routing table compaction in ternary CAM, IEEE Micro 22(1) (2002) 58–64. 26. F. Zane, G. Narlikar and A. Basu, CoolCAMs: power-efficient TCAMs for forwarding engines, IEEE INFOCOM 1 (2003) 42–52. 27. A. J. McAuley and P. Francis, Fast routing table lookup using CAMs, Proc. IEEE INFOCOM (March/April 1993), pp. 1382–1391. 28. K. Zheng, C. Hu, H. Lu and B. Liu, An ultra high throughput and power efficient TCAM-based IP lookup engine, Proc. IEEE INFOCOM, Hong Kong (March 7–11, 2004).

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29. V. C. Ravikumar and R. N. Mahapatra, TCAM Architecture for IP lookup using prefix properties, IEEE Micro. 24(2) (2004) 60–69. 30. D. Antos, Overview of data structures in IP lookups, CESNET Technical Report, September 2002. 31. R. L. Haupt and S. E. Haupt, Practical Genetic Algorithms (Wiley-Interscience, 2nd edn., 2004). 32. M. Mitchell, An Introduction to Genetic Algorithms (Complex Adaptive Systems) (The MIT Press, 1998). 33. BGP routing table analysis reports: http://bgp.potaroo.net/index-bgp.html, retrieved on 16 July 2004. 34. BGP routing table analysis reports: http://bgp.potaroo.net/as1221/bgp-active.html, retrieved on 5 April 2005.