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AP-658 APPLICATION NOTE

Designing for Upgrade to the 3 Volt Advanced+ Boot Block Flash Memory

December 1998 NOTE: This document formerly known as Designing for Upgrade to the Advanced+ Boot Block Flash Memory. Order Number: 292216-002

Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P.O. Box 5937 Denver, CO 80217-9808 or call 1-800-879-4683 or visit Intel’s Website at http://www.intel.com

COPYRIGHT © INTEL CORPORATION, 1998

*Third-party brands and names are the property of their respective owners.

CG-041493

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CONTENTS PAGE

1.0 INTRODUCTION .............................................5 2.0 3 VOLT ADVANCED+ BOOT BLOCK OVERVIEW ....................................................5 2.1 High-Performance, Low-Power Operation ....5 2.2 Improved 12 V Production Programming......5 2.2.1 Advanced Boot Block Functionality .......5 2.2.2 Advanced+ Boot Block Functionality .....5 2.3 Zero-Latency, Flexible Individual Block Locking .......................................................7 2.3.1 Advanced Boot Block Functionality .......7 2.3.2 Advanced+ Boot Block Functionality .....7 2.4 128-Bit Protection Register ..........................7 2.5 Common Flash Interface ..............................7 3.0 3 VOLT ADVANCED BOOT BLOCK AND 3 VOLT ADVANCED+ BOOT BLOCK COMPATIBILITY ............................................7 3.1 Device IDs ...................................................8 3.2 I/O Voltages .................................................8 3.3 Command Sets ............................................8 3.4 AC/DC Characteristics .................................8 3.4.1 DC Specifications (VCCQ = 2.7 V–3.6 V)............................8 3.4.2 AC Write Specifications .......................10 3.4.3 AC Read Specifications.......................10 3.4.4 Reset Operations ................................10

PAGE FIGURES Figure 1. Example Power Supply Configurations for the Advanced Boot Block (B3) Architecture .......................6 Figure 2. Example Power Supply Configurations for the Advanced+ Boot Block (C3) Architecture...............6 TABLES Table 1. Advanced Boot Block and Advanced+ Boot Block Device IDs .........................8 Table 2. Advanced Boot Block and Advanced+ Boot Block Current Spec Differences...9 Table 3. Advanced Boot Block and Advanced+ Boot Block Voltage Spec Differences ..9 Table 4. Advanced Boot Block and Advanced+ Boot Block AC Write Specification Differences ........................................10 Table 5. Advanced Boot Block and Advanced+ Boot Block AC Write Specification Differences ........................................10 Table 6. Advanced Boot Block and Advanced+ Boot Block AC Read Specification Differences ........................................11 Table 7. Advanced Boot Block and Advanced+ Boot Block Reset Specification Differences ........................................11

4.0 CONCLUSION...............................................11

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REVISION HISTORY Date of Revision

Version

Description

05/12/98

-001

Original version

12/01/98

-002

Revised to reflect the specification changes in the 3 Volt Advanced+ Boot Block datasheet (290645-003) and the 3 Volt Advanced Boot Block datasheet (290580-006). Name of document changed from Designing for Upgrade to the Advanced+ Boot Block Flash Memory.

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INTRODUCTION

The new 3 Volt Advanced+ Boot Block (C3) product offering, on Intel’s advanced 0.25 µ process, is an enhancement to the current 3 Volt Advanced Boot Block (B3) product line. It introduces new features that enable additional functionality and ease of design. This application note focuses on the technical differences between B3 and the C3 products. This document is applicable for 8-, 16-, and 32-Mbit densities. Section 2 covers the feature set of the new C3 architecture. Section 3 covers the compatibility considerations when designing in both the B3 and the C3 into the same design. These considerations include device IDs, I/O voltages, command sets, and AC/DC characteristics.

2.0

3 VOLT ADVANCED+ BOOT BLOCK OVERVIEW

The new 8-, 16-, and 32-Mb C3 products are designed for low voltage (2.7 V–3.6 V) applications. It supports functionality found on existing products plus new capabilities driven by market requirements and technology breakthroughs. The new features associated with C3 products are: • High-Performance, Low-Power Operation • Improved 12 V Production Programming • Zero-Latency, Flexible Individual Block Locking • 128-Bit Protection Register (for fraud protection) • Common Flash Interface (for easy software driver upgrades) These architectural and technological enhancements greatly increase the application space for the Boot Block product line.

2.1

High-Performance, Low-Power Operation

The C3 offers the same high read performance at low voltages; 80 ns at 3.0 V and 90 ns at 2.7 V. However, the typical [t = +25 °C, nominal VCC/VCCQ] read and standby currents for the C3 family have been improved over the B3 family; 9 mA (at 5 MHz) and 10 µA respectively (see Table 2). This high-speed, low-voltage operation reduces power consumption for batterypowered devices such as cellular phones and other personal communication products.

AP-658

2.2

Improved 12 V Production Programming

Intel’s C3 and B3 devices provide in-system programming and erase in the 2.7 V– 3.6 V range. For fast production programming, both products include a low-cost, backward-compatible 12 V programming feature. Below is a description of the differences between the C3 and the B3 methodologies. 2.2.1

ADVANCED BOOT BLOCK FUNCTIONALITY

With the B3 architecture under low programming voltages, VPP must be between 2.7 V and 3.6 V. Commonly, system designs connect VPP to VCC via a transistor or a diode to allow 12 V production programming and single supply in-system programming. However, the voltage drop of the transistor or the diode must be small and VCC must be tightly regulated to keep VPP within specification. Figure 1 shows possible power supply configurations for the B3. 2.2.2

ADVANCED+ BOOT BLOCK FUNCTIONALITY

The C3 products ease integration of 12 V manufacturing programming combined with 2.7 V in-system programming by enabling VPP to be connected to VCC through a diode or resistor. This is accomplished by drawing all program and erase current through the VCC pin when VPP is between 1.65 V and 3.6 V. When VPP is connected to a 12 V power supply, the device draws program and erase current directly from the VPP pin. Figure 2, Example Power Supply Configurations for the Advanced+ Boot Block Architecture, shows examples of C3 power supply configurations for various usage models. This architecture eliminates the voltage drop concern from VCC to VPP and increases functionality by allowing an additional power supply configuration. By connecting VPP to a control signal, write protection can be switched on or off depending on the signal level. Refer to AP-657 Designing with the Advanced+ Boot Block Flash Memory Architecture and the 3 Volt Advanced+ Boot Block Flash Memory datasheet for a complete description of the Improved 12 V Production Programming functionality.

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System Supply 12 V Supply

VCC VPP

10 KΩ 12 V Fast Programming Complete Write Protection When V PP ≠ 12 V System Supply Logic

System Supply

VCC

VCC

VPP

VPP

12 V Supply 12 V Fast Programming

Low-Voltage Programming Only

Full Array Protection Unavailable

Full Array Protection Unavailable 2216_01

Figure 1. Example Power Supply Configurations for the Advanced Boot Block (B3) Architecture

System Supply

System Supply 12 V Supply

VCC

VCC VPP

10 KΩ

Prot# (Logic Signal)

VPP

12 V Fast Programming

Low-Voltage Programming Only

Complete Write Protection When V PP ≠ 12 V

Logic Control of Complete Device Protection

System Supply

System Supply

VCC

VCC

VPP

VPP

12 V Supply 12 V Fast Programming

Low-Voltage Programming Only

Full Array Protection Unavailable

Full Array Protection Unavailable 2216_02

Figure 2. Example Power Supply Configurations for the Advanced+ Boot Block (C3) Architecture

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AP-658

Zero-Latency, Flexible Individual Block Locking

component with other system components such as the CPU or ASIC, preventing device substitution. This feature is unavailable on B3 products.

The C3 products offer a fast and flexible locking scheme that allows any block to be locked or unlocked with no latency, enabling instant code and data protection. Each block can be independently locked or unlocked using command codes that change protection status immediately after the two cycle command has been issued. Sections 2.3.1 and 2.3.2 show how the B3 locking scheme differs from the C3 locking scheme.

The protection register contains two segments of 64 bits each. The first segment contains a number programmed at the Intel factory that will be unique for every device. This number is unchangeable. The second segment is programmable by the user to any value desired. After the 64 user bits have been programmed, they may be locked by writing an additional “lock” bit.

2.3.1

ADVANCED BOOT BLOCK FUNCTIONALITY

The B3 devices allow two boot blocks to be locked; the upper two boot blocks for a top boot device or the lower two boot blocks for a bottom boot device. When WP# = VIL, lockable blocks are locked. When WP# = VIH, locked blocks are unlocked. WP# must be driven and cannot be left floating. 2.3.2

ADVANCED+ BOOT BLOCK FUNCTIONALITY

The C3 architecture offers an instant, individual block locking scheme that allow any block to be locked or unlocked with no latency, enabling instant code and data protection. This locking scheme offers two levels of protection. The first level allows software-only control of block locking (useful for data blocks that change frequently), while the second level requires hardware interaction before locking can be changed (useful for code blocks that change infrequently). The software designer should be aware of the new commands (see Section 3.3) and must adapt the software accordingly. That is, the software must issue an unlock command before writing to any block after power-up. Refer to AP-657 Designing with the Advanced+ Boot Block Flash Memory Architecture and the 3 Volt Advanced+ Boot Block Flash Memory datasheet for a complete description of the Instant, Individual Block Locking functionality.

2.4

128-Bit Protection Register

The C3 architecture includes a 128-bit protection register than may be used to increase the security of the system design. For example, the number contained in the protection register may be used to “mate” the flash

Refer to AP-657 Designing with the Advanced+ Boot Block Flash Memory Architecture and the 3 Volt Advanced+ Boot Block Flash Memory datasheet for a complete description of the 128-bit Protection Register functionality.

2.5

Common Flash Interface

Common Flash Interface (CFI) defines the data structure that contains critical information for controlling the flash component. This feature is unavailable on the B3 products. Information returned from the CFI Query command include the manufacturer ID, device ID, command set ID, device timing and voltage information, flash device layout, and vendor-defined additional information. With flash-specific information, the software may be engineered to work with different devices based on the query data. Refer to AP-657 Designing with the Advanced+ Boot Block Flash Memory Architecture and the 3 Volt Advanced+ Boot Block Flash Memory datasheet for a complete description of the CFI specification for the C3 devices.

3.0

3 VOLT ADVANCED BOOT BLOCK AND 3 VOLT ADVANCED+ BOOT BLOCK COMPATIBILITY

The C3 device adds several features to the Boot Block functionality (Section 2), while maintaining compatibility on several levels. For example, the pinouts of both devices are identical and the voltage ranges of the C3 devices are a superset of the B3 devices. However, changes or improvements give rise to differences between the two devices. This section details these differences and may need to be accounted for via hardware or software changes. 7

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3.1

Device IDs

The device IDs for the C3 products are different from those of the B3 devices and must be accounted for by the software (used to identify which flash device is in the system). Table 1 lists the device IDs for the 8-, 16-, and 32-Mbit devices. The manufacturer IDs remains the same, 0089H.

Lock Block, Unlock Block, and Lock-Down Block are commands used in conjunction with the zero-latency, flexible, individual block locking architecture. Read Query is used to access CFI. Finally, Program Protection is used with the 128-bit Protection Register. See Sections 2.3 to 2.5 on implementing these features with your application.

3.4 3.2

Contact your Intel representative for information regarding designing with low voltage [1.65 V–2.5 V] I/Os.

The C3 device specifications are either identical to or improved over B3 device specifications. The result is minimal impact to the design environment. 3.4.1

3.3

AC/DC Characteristics

I/O Voltages

Command Sets

The C3 devices incorporate new commands for added functionality that were unavailable (reserved) on the B3 devices. These include:

DC SPECIFICATIONS (VCCQ = 2.7 V–3.6 V)

The DC specs for C3 products are similar to that of B3 products. DC specification differences are highlighted in Table 2 and Table 3.

1. Lock Block 2. Unlock Block 3. Lock-Down Block 4. Protection Program 5. Read Query Table 1. Advanced Boot Block and Advanced+ Boot Block Device IDs(1) 32-Mbit

x16

8-Mbit

C3

B3

C3

B3

C3

Top

8894

88C4

8890

88C2

8892

88C0

Bottom

8895

88C5

8891

88C3

8893

88C1

NOTE: 1. All values are in hex.

8

16-Mbit

B3

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Table 2. Advanced Boot Block and Advanced+ Boot Block Current Spec Differences B3 Symbol

Parameter

C3

Typ

Max

Typ

Max

Unit

Conditions

ICCR

VCC Read Current

10

18

9

18

mA

5 MHz

ICCS

VCC Standby Current

18

35

10

25

µA

5 MHz

ICCE + IPPE

VCC + VPP Erase Current

20

45

16

45

mA

VPP = 1.65 V – 3.6 V

16

45

16

37

mA

VPP = 12 V

ICCW + IPPW

VCC + VPP Write Current

10

30

16

37

mA

VPP = 12 V

IPPES

VPP Erase Suspend Current

50

200

0.2

5

µA

Low Voltage VPP Range (Table 3)

IPPWS

VPP Program Suspend Current

50

200

0.2

5

µA

Low Voltage VPP Range (Table 3)

Table 3. Advanced Boot Block and Advanced+ Boot Block Voltage Spec Differences B3 Symbol

Parameter

VPPLK

VPP Lock-Out Voltage

VPP

Low Voltage VPP Range

Min

C3 Max

Min

1.5 2.7

3.6

1.65

Max

Unit

1.0

V

3.6

V

Conditions

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3.4.2

3.4.3

AC WRITE SPECIFICATIONS

AC READ SPECIFICATIONS

C3 products have reduced tPHQV to allow read operations to occur sooner after the device is powered up (see Table 6). Also tEHQZ and tEHQZ have been improved to allow for integration with faster processors or controllers (see Table 6).

C3 products have reduced the length of the write cycle (WE/CE# high plus WE#/CE# low) specifications to allow for reduced wait-states when operating at access speeds greater than or equal to 90 ns. System designs should re-analyze the wait-states required when operating at access speeds of greater than or equal to 90 ns. Table 4 reflects these specification changes. Also, tPHWL has been reduced from 600 ns to 150 ns to allow write operations to occur sooner after the device is powered up. (see Table 5).

3.4.4

RESET OPERATIONS

The RP# Low to Reset during Program specification has been improved to allow faster reset when RP# is brought low during a program. Table 7 indicates the improvements for reset operations.

Table 4. Advanced Boot Block and Advanced+ Boot Block AC Write Specification Differences Product VCC Operating Range Symbol

B3 3.0 V – 3.6 V

80

2.7 V – 3.6 V

tAVWH / tAVEH

80 90

Parameter tWLWH / tELEH

C3

90

Unit

Min

Min

Min

Min

WE# (CE#) Pulse Width

70

70

50

60

ns

Address Setup to WE# (CE#) Going High

70

70

50

60

ns

Table 5. Advanced Boot Block and Advanced+ Boot Block AC Write Specification Differences Product VCC Operating Range Symbol

B3 3.0 V–3.6 V

2.7 V–3.6 V Parameter

tPHWL / tPHEL

10

RP# High Recovery to WE# (CE#) Going Low

C3

80 ns/ 100 ns

80 ns/ 100 ns 90 ns/ 110 ns

90 ns/ 110 ns

Min

Min

Min

Min

600

600

150

150

Unit

ns

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Table 6. Advanced Boot Block and Advanced+ Boot Block AC Read Specification Differences Product VCC Operating Range Sym

B3 3.0 V–3.6 V

80 ns / 100 ns

80 ns / 100 ns 90 ns / 110 ns

2.7 V–3.6 V Parameter

C3

Min

Max

Min

Max

90 ns / 110 ns Min

Max

Min

Unit

Max

tPHQV

RP# to Output Delay

600

600

150

150

ns

tEHQZ

CE# to Output in High Z

25

25

20

20

ns

tGHQZ

OE# to Output in High Z

25

25

20

20

ns

Table 7. Advanced Boot Block and Advanced+ Boot Block Reset Specification Differences B3 Symbol tPLRH2

4.0

Parameter RP# Low to Reset during Program

Min

C3 Max 22

Min

Max

Unit

12

µs

CONCLUSION

This document has outlined the new features of the Advanced+ Boot Block (C3) family as well as the differences between the Advanced+ Boot Block (C3) product line and the Advanced Boot Block (B3) product line. Applications should be designed for compatibility with C3 products to ensure the most cost-effective solution.

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AP-658

APPENDIX A ADDITIONAL INFORMATION(1,2) Order Number

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Document/Tool

210830

Flash Memory Databook

290645

3 Volt Advanced+ Boot Block Flash Memory; 28F800C3, 28F160C3, 28F320C3 datasheet

290580

3 Volt Advanced Boot Block Flash Memory; 28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3 datasheet

292215

AP-657 Designing with the Advanced+ Boot Block Flash Memory Architecture

NOTE: 1. Please call the Intel Literature Center at (800) 548-4725 to request Intel documentation. International customers should contact their local Intel or distribution sales office. 2. Visit Intel’s World Wide Web home page at http://www.Intel.com for technical documentation and tools.

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AP-658.pdf

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