JOURNAL OF TELECOMMUNICATIONS, VOLUME 4, ISSUE 1, AUGUST 2010

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CDBA-Based Electronically Tunable Filters and Sinusoid Quadrature Oscillator R. Nandi, P. Venkateswaran, Soumik Das and M. Kar Abstract—— New Current Differencing Buffered Amplifier (CDBA) - based multifilter function topologies are presented. Electronic tuning is derived by appropriate insertion of a multiplier element whose control voltage (Vc) tunes the select frequency in a range of 200KHz ≤ fo ≤ 1MHz. The circuits also realize a voltage controlled quadrature oscillator (VCQO) with suitable design. Analysis on the effects of the CDBA-parasitic components indicates low active-sensitivity and good frequency-stability of the oscillator. The multifunction performance has been verified both with PSPICE macromodel simulation and by hardware circuit tests. A novel method of measuring the oscillator frequency-tuning error (Δf) based on the Nyquist plot is presented that shows Δ f ≈ 2%. Index Terms— CDBA · Electronic tuning · Quadrature oscillator · Selective filters

—————————— ‹ ——————————

1 INTODUCTION

T

he Current Differencing Buffered Amplifier (CDBA) element, introduced in the recent past as a versatile active building block [1], is now being widely used for various analog signal processing/conditioning and wave generation applications [2], [3], [4], [5], [6]. The element has various advantageous features [1], viz., improved bandwidth, fast settling time and high slew rate. The CDBA offers accurate unity port-transfer ratios when it is being configured by a pair of readily available current feedback amplifier (CFA-AD844 or OPA-2607 dual pack) device; recently some improved models of CFA (OPA-695) are being made available with bandwidth (BW) of 1.4 GHz and slew-rate of 2.5KV/ μ s [7], [8]. Function circuits based on the CDBA are easily cascadable owing to the availability of output nodes both in voltage source and current source modes. Its accurate port tracking characteristics leads to extremely low circuit sensitivity [3], [4], [5]. A number of CDBA-based active filter and oscillator implementation schemes are now available in the literature [1], [2], [3], [4], [5], [6] but none had as yet presented any design on the electronic tunability of high quality filters and quadrature sinusoid oscillator. Albeit electronically tunable function circuit design schemes based on other active elements, viz., CDTA [9], CMOSLC component [10] and CCCII-OTA [11] had been ————————————————

• R. Nandi , corresponding author is with the Department of ETCE, Jadavpur University, Kolkata, 700032, W.B., India. E-mail: [email protected], [email protected]. • P.Venkateswaran is with the Department of ETCE, Jadavpur University, Kolkata, 700032, W.B., India. • Soumik Das is with the Department of AEIE, Heritage Institute of Technology, Kolkata, 700107, W.B., India. • M. Kar is with the Department of ECE, Heritage Institute of Technology, Kolkata, 700107, W.B., India.

recently reported, the CDBA based designs are gaining significant research interest owing to very low active sensitivity feature while being adaptable to monolithic implementation with bipolar and CMOS technologies [1], [2], [3]. We present here a new CDBA-based realization of electronically tunable bandpass(BP)/lowpass(LP) filters and voltage controlled quadrature oscillator (VCQO). The proposed circuit uses the CDBA building block along with a multiplier (ICL-8013) element inserted suitably in the circuit-loop. The d.c. control voltage (Vc) of the multiplier tunes the select frequency (ω0 ) while the selectivity (Q) can be independently adjusted by a resistor-ratio. These functions have been experimentally verified in a frequency range of 200 KHz ≤ f 0 ≤ 1MHz with good selectivity ( Q ≈ 12 ) ; both hardware circuit results and PSPICE [12] simulated responses are included. By appropriate interchange of some RC components in the circuit topology, a highpass (HP) filter response can also be obtained. The proposed circuits use only one external capacitor for a secondorder function realization, since the parasitic z-node capacitance had been utilized as the other; thus economizing on the capacitor count.

2 ANALYSIS The CDBA is a four-terminal active building block with the following terminal relations

⎡ iz ⎤ ⎡ 0 ⎢v ⎥ ⎢ ⎢ w ⎥ = ⎢δ ⎢v p ⎥ ⎢ 0 ⎢ ⎥ ⎢ ⎢⎣ v n ⎥⎦ ⎢⎣ 0 The

circuit

0

α

p

0

0

0 0

0 0

symbols

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−α n ⎤ ⎡ v z ⎤ ⎥⎢ ⎥ 0 ⎥ ⎢ iw ⎥ 0 ⎥ ⎢ip ⎥ ⎥⎢ ⎥ 0 ⎥⎦ ⎢⎣ in ⎦⎥ and

the

(1)

CFA-

based

JOURNAL OF TELECOMMUNICATIONS, VOLUME 4, ISSUE 1, AUGUST 2010

implementation of the CDBA are shown in Figs. 1(a) and (b); the small signal equivalent circuit with the internal transadmittance Yz = g z + sC z is shown in Fig.1(c) where gz = 1/ rz.

36

topologies in Figs.2(a) and (b).

(a)

(a)

(b)

(b) Fig.2 Proposed CDBA –based filter/oscillator structures: dotted loop for oscillator realization

(C)

Fig.1 Symbol of CDBA (a) Four-terminal CDBA building block (b) CFA based implementation of CDBA (c) AD-844 equivalent circuit model

Initially we assume a single input V1 (with V2 = 0). Analysis assuming ideal CDBAs ( μ = 0; α = 1 = δ ) , and writing V = kV01Vc for the ICL-8013 type multiplier [12], where the multiplier constant k = 0.1 per volt, yields the bandpass (F1) and lowpass (F2) transfer functions with respect to V1 signal,  

F1 ( s ) = V01 V1 = λ1s D ( s )                                           (2)  F2 ( s ) = V02 V1 = −λ0 D ( s )                                         (3)                     

The CDBA port tracking ratios are denoted by the quantities α and δ ; these may be postulated by some error ( μ ) terms for an imperfect device as

where  D ( s ) = s 2 + d1s + d 0  

α p ,n = 1 − μ p,n and δ = 1 − μ0 . The literature indicates

and  λ0 = 1 C0 C z 2 R1 R2 ; λ1 = 1 C0 R1                          (5)                     

that the error magnitudes are quite small [13], [14], [15] which had been estimated in the range of

C0 = (1 + m − kVc )C ; m = C z1 C

0.01 ≤ μ ≤ 0.04 . For an ideal CDBA, the errors vanish ( μ = 0 ).

d1 = 2 C0 R3 ; d 0 = 1 C0C z 2 R2 R4                                (7) 

                               (4)                        

                    

We present the electronically tunable function circuit © 2010 JOT http://sites.google.com/site/journaloftelecommunications/

 

1                         (6)                        

JOURNAL OF TELECOMMUNICATIONS, VOLUME 4, ISSUE 1, AUGUST 2010

From the datasheet [12], one gets rz ≈ 5M.ohm, rx ≈ 30 ohm and 6 pF ≤ C z ≤ 10 pF ; in this analysis, we neglect the effect of rx since it is considered quite low compared to other resistance values used in the design. The filter parameters assuming ideal devices, for both topologies of Figs. 2(a) and (b), are obtained as

ω0 = 1

(C0C z 2 R2 R4 )            

Q = 0.5 R3 C0 C z 2 R2 R4       

 

      

where    D% ( s ) = s 2 + d%1s + d%0                                   (16) These modified quantities are summarized in Table 1. TABLE 1 EFFECT OF DEVICE IMPERFECTIONS ON FILTER PARAMETERS Fig.2

                       (10)               Co-effi                   λ%   

We can also get a highpass (HP) response at Vo1 if R1 is replaced by a capacitor C1. These realizations do not need any component matching criterion. It may be noted that in these designs, the internal device capacitance (Cz2) at node z2 of the second CDBA is being utilized so as to reduce one external passive capacitor count. A set of simplified design equations may be obtained if we write R4 = R = R2 and assume Cz1< C in practice; these are given by

}

ω0 ≈ 1 R (1 − kVc ) CC z 2                                              (11)  Q ≈ ( 0.5R3 R ) C (1 − kVc ) C z 2                          (12)  Thus while ω0 can be electronically tuned by Vc , the

selectivity Q may be set by R3 and the passband gains are adjusted by R1 - all these variations could be done independently. An appropriate ω0 -band may be selected by suitable value of product R2 R4 in (8). Next we analyzed the circuits in Fig.2 by considering the two inputs at V1 and V2; the transfer equation for both the topologies is

V01 = {V1 ( s C0 R1 ) + V2 (1 C0C z 2 R2 R4 )} D ( s )              (13)  Thus at V01 we get a lowpass response with input at V2 (whileV1=0) and a BP response with input at V1 (while V2=0). The co-efficients of the denominator function D(s) and hence values of ω0 and Q are the same as in (7), (8), and (9).

3 EFFECT OF CDBA PORT ERRORS

Re-analysis of the circuits assuming finite ( μ ≠ 0 ) port errors of the CDBA devices indicates some deviations in the design of the filter parameters. The modified transfer functions for both the circuits in Fig.2 with respect to V1 may be written as

F%1 ( s ) = s λ%1 β

 

                              (9) 

F1 (ω0 ) = R3 2 R1 ; F2 (0) = R2 R1  

 

and     F%2 ( s ) = λ%0 β D% ( s )                                         (15)                    

          (8) 

and the passband gains are

{

37

D% ( s )                                    (14)                   

cients

0

λ0

λ%1 λ1 d% 1

d1

(a) 

(b) 

α p1α n 2δ1δ 2  

α p1α p 2δ1δ 2  

α p1δ1  

α p1δ1  

(1 + α n1 ) β 2

d% 0 Filter  Para‐  meters 

• •

d0

(1 + δ1α n 2 ) β

 

2

α p1α n 2δ1δ 2 β  

α p 2α n 2δ1δ 2 β  

1− μt1 ( 2 − μn1 )

Q% Q

ω% 0 ω0

1 − μt1  

 

1−μt2 {2−( μo1 +μn2)}

1 − μt 2  

β = C0 C% 0 = (1 − kVc ) {1 − kVc (1 − μo1 )} ≈ 1 ;

k μo1<< 1 is neglected as k=0.1/V and as μo << 1 μt1 = μ p1 + μn 2 + μo1 + μo 2 ;

μt 2 = μ p 2 + μn 2 + μo1 + μo 2

4 VCQO DESIGN We next implement the voltage controlled quadrature oscillator in the same topologies of both Figs.2 (a) and (b), by connecting a feedback loop from V1 to V01. The closed-loop characteristic equations are given in Table 2, after writing G1,2,3,4 = 1 R1,2,3,4 . TABLE 2 CHARACERISTICS EQUATIONS OF VCQO Fig. 2 Characteristic Equation Realizability (R1/R3) (Non ideal)  Realizability (R1/R3) (Ideal) 

(a)

(b) 

s2C0Cz2 + sCz2{G3 (1+αn1) – αp1δ1G1} + αp1 αn2 δ1 δ2G2 G4 =0

s2C0Cz2 + sCz2{G3 (1+ δ1αn2) – αp1δ1G1} + αp2 αn2 δ1 δ2G2 G4 = 0 

{1 – (μp1 + μ01)}/ (2 – μn1) 

{1 – (μp1 + μ01)}/ {2 – (μ01 + μn2)} 

1/2 

1/2 

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JOURNAL OF TELECOMMUNICATIONS, VOLUME 4, ISSUE 1, AUGUST 2010

ψ = ( R3 R )

(17)

(1 + m − kVc ) C

Cz 2

the circuit operation. The selective BP and LP responses are shown in Fig. 3(a); the oscillator realization had been done by closing the loop between the nominal input node and V01-node in both the circuits of Fig. 2 shown by the dotted connection. A typical quadrature- wave output signal obtained experimentally is shown in Fig. 3(b) and its voltage tunability characteristics is shown in Fig. 3(c). 2020 A Gain(dB)

The oscillation frequency (ω0) is the same as the select frequency of the filters as indicated in (11). Hence while the realizability condition is set by the ratio R1/R3, the frequency ω0 may be tuned electronically and independently by Vc ; for a given control voltage a particular band of ω0 can be selected by appropriate values of R2 and R4 without affecting the realizability condition. The frequency stability factor ψ of the proposed oscillators may be evaluated by the expression ψ ≡ Δθ Δu at u ≡ ω ω0 = 1 where θ is the loop phase shift. For both the oscillator configurations, writing R2 = R = R4 , for simplicity, we get

38

Usually C>>Cz2 i.e. m<< 1 and if R3>R we get after writing, n =R3/R>1 :

Ψ ≈ n [{1-kVc }/ m]½ >> 1

(18)

00 B

-20 -20

-40 -40 0.1

TABLE 3 SOME COMPARATIVE RESULTS ON FREQUENCY STABILITY FACTOR (Ψ) Proposed 

f0 Reported

15.86 KHz

15.9  KHz 

1 MHz 

Tunability 

Ψ 

Resistor 

Resistor  Electronic  ratio (n) 

1/R(G1 – G2)  2 n  

n [{1-kVc }/ m]½ >> 1  

In Table 3 we present a comparative summary of the ψ values for some recently proposed CDBA based quadrature oscillators. It may be seen that the component matching requirement for the cancellation term in [3] may induce some sensitivity issue. The active

⎛

ψ

sensitivity ⎜ S μ ≡

⎝

Δ lnψ ⎞ ⎟ of ψ Δ ln μ ⎠

had been derived

assuming the error quantities to be all equal for simplicity, as Sψ = 1.5 μ / (1 – 4.5 μ) << 1 . Similarly the active

( ) is calculated to be

ω0 sensitivity S

μ / (0.5 – 2 μ) << 1

ω0

Sωo

=

for both the oscillators in Fig. 2.

8.35

8.0

Output

[6] 

Output (V)

[3]

10 10

  T

Reference

11 f0 (MHz)                          Fig 3.(a)

-14.93m 0.0

-8.0-8.38

0.00

0.0

                      2.50u Time (s) 2.5μ   Time(s)  

5.00u

5.0μ

 

Fig 3. (b) 

Fg. 3(a) Selective filter response at f0 =1MHz; input signal applied at V1;(V2=0) A: Lowpass response at V02 of Fig.2(a) designed for Q=3.3: R1 = R2 = R4 =5.2 K.ohm,R3 = 1K.ohm, C = 500 pF, Cz2 = 9.5 pF (measured), Vc = 8Vd.c. B: Bandpass response at V01 of Fig.2(b) designed for Q=12: R2 = R4 = 3.3K.ohm R1= 2.5K.ohm, R3 =16K.ohm, C=500 pF,Cz2=9.5pF(measured), Vc=5V d.c. ------------------------ Hardware Test

5 EXPERIMENTAL RESULTS The filter and VCQO functions in Fig. 2 (a) and (b) had been experimentally verified by both hardware circuit tests and by PSPICE macromodel simulation. The CDBAs were implemented by matched-pair AD-844 type CFA devices biased at 0± 12 V d.c. regulated supply for

Simulation response Fig. 3(b) Simulated response on quadrature signal generation at 1MHz of oscillation frequency Measured phase ( φ ) between generated signals :

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φ ≈ 88.3o

JOURNAL OF TELECOMMUNICATIONS, VOLUME 4, ISSUE 1, AUGUST 2010

1000 1000

BB

500 500 250 250

00 0

0

2

4

2

4

6

8

6 Vc (Volts)

A B

0.02 0.02

C 0.000

-0.02 -0.02

10

8

Vc (Volts)

Imaginary Im aginary

fo (KHz)

f0(KHz)

0.04 0.04

A A

750 750

39

10

0.7 0.7

0.8 0.8

0.9 0.9

1 1.0

1.1 1.1

1.2 1.2

Real Real Fig 3.(c)

  Fig3. (e)  

T

17.81u

5.0

Nominal tuned frequency (f0) : A

A m p litu de [V /H z]

Amplitude(V)

B

→

0.72 MHz

and C

→

→

1 MHz,

0.5 MHz

Fig.3(e) Nyquist plot of loop function measured in the vicinity of u = 1 ± 10% with following symbols

2.5 8.92u

0.90

u= f/f0

0.95

1.00

1.05

1.10

symbol

0.0

0.00 0

0

2M

2

4M

6M

4 Frequency (Hz)6 Frequency (MHz)

8M

8

indicates 00 phase crossover po int

10M

10

Fig 3.(d)

TABLE 4

Fig. 3(c) Electronic tuning characteristics obtained with C =900 pF and Cz2 =9.5 pF while ratio (R3/R1) had been set to R3/R1=2 for the realizability condition. Hardware Test Simulation Response A: R2 = R4 = 8.7 K.ohm.

B: R2 = R4 = 12.6 K.ohm

Fig. 3(d) Frequency spectrum of the simulated signal.

The Fourier spectrum of the waveform simulated at fo=1MHz is shown in Fig. 3(d). The Total Harmonic Distortion (THD) of the generated wave has been measured to be only 2.1%. In order to examine the tuning error in fo, we propose a novel method of measurement using the Nyquist plot of the loop transfer function of Fig.2 in the vicinity of fo, as shown in Fig.3(e). The deviation (Δf) is then computed from the intersection of the function with the real axis of the plot following the Barkhaussen

TUNING ERROR AND THD MEASURED AT THREE DIFFERENT TUNING FREQUENCIES Curve Tuned Frequency f0 (MHz)

A

B 

C 

1.00

0.72 

0.50 

1.020 

0.727

0.498 

Δf ( MHz)

0.020 

0.007 

0.002 

Tuning Error (%)

2.00 

0.97 

0.40

2.1 

1.8 

1.5

f

θ = 0°

(MHz)

THD (%)

the real axis of the plot following the Barkhaussen criterion. We obtained three such graphs corresponding to sinusoid generation at the nominal frequencies of

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JOURNAL OF TELECOMMUNICATIONS, VOLUME 4, ISSUE 1, AUGUST 2010

500KHz, 720KHz, and 1.02 MHz. The tuning error is then derived as shown in Fig.3(e) and Table 4. We obtained a HP response at Vo1 by replacing R1 by a capacitor C1 in both the topologies of Fig.2; while Q and ω0 remain the same as in (8) and (9), the passband gain would be equal to C1 C0 .It may be mentioned that the second order filter functions in (2) or (3) and the VCQO design in Table 2 had been obtained by only one external capacitor; for the other one the internal device capacitance (Cz2) had been utilized.

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[6]

[7] [8] [9] [10]

6 CONCLUSION Some new electronically tunable multifilter-function realization schemes using the relatively new CDBA active building block are presented. With appropriate design, one obtains a VCQO implementation in the same topology. The feature of electronic tuning of the select frequency in a range of 200 KHz ≤ f 0 ≤ 1MHz had been experimentally verified by adjustment of the d.c. control voltage of a ICL-8013 multiplier element incorporated suitably in the circuit loop. Detailed analysis assuming imperfect CDBA devices with finite port errors show practically active-insensitive property of the realization. The proposed design utilizes only one external capacitor along with one internal parasitic capacitance of the CDBA device for the second order functions - hence economizing on discrete capacitor count. The frequency stability (ψ) of the VCQO is seen to be better over those cited previously; the tuning error is only 2% at 1 MHz being derived through a new measurement method using the Nyquist plot and following the Barkhaussen criterion. The design of CDBA based electronically tunable multifilter /quadrature oscillator with such satisfactory features had not yet been reported earlier.

REFERENCES [1]

[2]

[3]

[4]

[5]

C. Acar, & S. Ozoguz, ‘‘A versatile active building block: current differencing buffered amplifier suitable for analog signal processing filters,’’ Microelectronics Journal., vol. 30, 157-160,1999. K. Salama, S. Ozoguz & A. Soliman, ‘‘ A new universal biquad using CDBAs,’’ Proc. Midwest Symp. Cct.Sys.(MWSCAS), U.S.A., vol. 2, 850-853,2001. J.W. Horng, ‘‘Current differencing buffered amplifiers based single resistance controlled quadrature oscillator employing grounded capacitors,” IEICE Trans. Fund., vol. E85-A, 14161419,2002. W. Tangsrirat, W. Surakampontorn, & N. Fujji, ‘‘Realization of leapfrog filters using current differencing buffered amplifiers,” IEICE Trans. Fund., vol. E86-A, 318-326, 2003. A. U. Keskin, ‘‘ Voltage mode high-Q bandpass filters and oscillators employing single CDBA and minimum number of

[11]

[12] [13] [14]

[15]

components,” Int. J. Electronics, vol. 92, 479-487,2005. W. Tangsrirat, T. Pukkalanun, & W. Surakampontorn, ‘‘CDBA-based universal biquad filter and quadrature oscillator,” J. Active and passive Electronic Components, vol. 2008, Article-247171, 2008. Analog Devices : Linear Products Databook, Norwood, MA., 1990. News Update : Global Signal Processing Times (Internet Version),. 20 Jan. 2004. A. Lahiri, ‘’New current mode quadrature oscillator using CDTA,” IEICE Electron. Express, vol. 6, 136-140,2009. S.J. Yun, D.Y. Yoon, & S.G. Lee, ‘‘A complementary coupled CMOS-LC quadrature oscillator,” IEICE Trans. Electronics, vol. E91-C, 1806-1810,2008. M. Siripruchyanun & W. Jaikala, ‘‘Cascadable current mode biquad filter and quadrature oscillator using DO-CCCIIs and OTA,’’ J. Circuits, Systems and Signal Processing, vol. 28, 99-110, 2009. Macromodel of AD844AN in PSPICE Library. Microsim Corpn., Calif., USA., 1992. H.W. Cha, S. Ogawa & K. Watanabe, ‘‘Class A CMOS current conveyor,’’ IEICE Trans. Fund., vol. E81 A, 1164-67,1998. B.J. Maundy, A.R. Sarkar & S.J. Gift, ‘‘A new design topology for low voltage CMOS current feedback amplifier,’’ IEEE Trans., CAS(II), vol. 53, 34-38,2006. A. Zeki, & H. Kuntman, ‘‘Accurate and high input impedance current mirror suitable for CMOS current output stages,’’ Electronics Lett., vol. 33, 1042-1043,1997.

Dr. Rabindranath Nandi is a Professor in the Dept. of Electronics & Tele-Communication Engg. (ETCE), Jadavpur University (JU), Kolkata, India.. His areas of interest are Analog Signal Processing (ASP), Digital Signal Processing (DSP), Computer Communication. He has authored more than 110 research papers in National / International Journals and some in Conferences / Seminars. He served as the Head of ETCE Dept., JU during 1999-2001 and served as the Chair of IEEE Calcutta Section during 2003-2005. He is the Present Chairman of IEEE Circuits And Systems (CAS) Society Calcutta Chapter. He has taught in various Institutes abroad. P. Venkateswaran is working as a Reader in the Dept. of ETCE, JU, Kolkata, India. He has published over 30 papers in various National / International Journal / Conference Proceedings. His fields of interest are Computer Communication, Microcomputer Systems and DSP. He is a Member of IEEE (USA), and Present Secretary of Calcutta Chapters of IEEE Communications Society (ComSoc) & IEEE CAS Society . Soumik Das is working as a Lecturer in the Dept. of Applied Electronics & Instrumentation Engineering, Heritage Institute of Technology (HITK), Kolkata, India. His areas of interest are ASP, Power Electronics. He is a Member of IEEE (USA), and IEEE CAS Society. Mousiki Kar is working as a Lecturer in the Dept. of Electronics & Communication Engineering, Heritage Institute of Technology (HITK), Kolkata, India. Her areas of interest are ASP, Control

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JOURNAL OF TELECOMMUNICATIONS, VOLUME 4, ISSUE 1, AUGUST 2010

System Design. She is a Member of IEEE (USA), IEEE CAS

41

Society.

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