Design Project Spring 2006 Part II

Pietro Franchi Hadeed Khalid Frankie Ng Guangfan Tan Jamin Teo Parisa Yazdanparast

Tutor: Mr. Brookes

2

Contents 1 Introduction

5

2 Pulse width modulator

7

2.1

Principles of operation . . . . . . . . . . . . . . . . . . . . . . . . . . .

7

2.2

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8

3 Design

11

3.1

High level design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

11

3.2

Low level design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12

3.2.1

Integrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12

3.2.2

Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13

3.2.3

Differential comparator . . . . . . . . . . . . . . . . . . . . . .

16

4 Optimization 4.1

19

Optimized PWM circuit . . . . . . . . . . . . . . . . . . . . . . . . . .

5 Further discussion

24 25

5.1

Digital PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

25

5.2

Optimal pulse width modulation . . . . . . . . . . . . . . . . . . . . .

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6 Conclusion

31

A Management report

33

A.1 Minutes of Meetings . . . . . . . . . . . . . . . . . . . . . . . . . . . .

35

List of figures

39

References

41

3

4

CONTENTS

1. Introduction Pulse Width Modulation, also known as Pulse Duration Modulation, is widely used in many different electrical and electronic applications. From minimizing power dissipation in lights, fans and motors, encoding of information in telecommunications to audio amplification, pulse width modulation has been deployed. In this design project report, we will first look at what a pulse width modulator (PWM) is, its applications and how it works. Then we discuss a top level design of two main blocks making up the PWM, following a detailed breakdown and analysis of how these blocks can be done. The simulation together with the results of each part of the circuit will be explained. After that we will discuss how the circuit can be further improved and optimized for specific targets. Breaking away from the original analogue PWM design, a digital approach to PWM design is also explored. We will also the possibility of generating an optimal pulse width modudulated wave by harmonic elimination. And finally, the conclusion at the end sums up the report in brief.

5

6

CHAPTER 1. INTRODUCTION

2. Pulse width modulator 2.1

Principles of operation

A Pulse Width Modulator (PWM) is any circuit which produces a pulse whose width is proportional to the input modulating signal’s amplitude. A simple method of producing such a signal uses a differential comparator and a triangle wave generator. A differential comparator generates either a high or low output, based on the voltage difference between its two input signals1 . Referring to Figure 2.1c below, the modulating signal is fed to the “+” input terminal and a triangle wave is fed to the other terminal (“-” input). The comparator works as follows: When the voltage applied to the “+” input is higher than that applied to the “-” input, the comparator generates high output. Conversely, a low output is generated when the “-” input is higher than the “+” input.

Figure 2.1: Various outputs from a PWM.

If the signal fed to the “+” input is 0V, the output of the comparator will be an exact 50% duty cycle square wave. This is illustrated in Figure 2.1a. However, when a +1V DC source is connected to the “+” input of the comparator, the output from the comparator will very closely resemble the signal shown in Figure 2.1b. The high pulse is now longer than the low pulse since the portion of the triangle wave which is less than +1V is wider than the portion which is greater than +1V. The modulating signal does not have to be a fixed voltage. For example, when we connect a sine wave to the “+” input, we will produce an output with varying pulse width. The pulse train shown in 2.1c shows the variable-width pulses produced by a sine wave input.

1 Cf.

[1]

7

8

CHAPTER 2. PULSE WIDTH MODULATOR

2.2

Applications

As seen in the previous section, a PWM circuit works by making a square wave with a variable high-low ratio. This high-low voltage ratio is equivalent to the on-off ratio of power supplied to an external circuit since power is a product of current and voltage. This method of controlling the power to a load is particularly useful. It can be used to regulate the brightness of light bulbs, speed of fans and DC motors and temperature of heaters since all the above-mentioned parameters are in turn determined by the power supplied. To understand the usefulness of this control method, we can consider a battery-driven 10W light bulb2 . In this case the battery supplies 10W of power, and the light bulb converts this 10W into light and heat. If we want to dim the light bulb such that it only absorbs 5W of power, we could place a resistor in series with it to absorb 5W, then the light bulb could absorb the other 5W. This would work, but the power dissipated in the resistor is wasted and the battery is still supplying 10W. An alternative way is to switch the light bulb on and off very quickly so that it is only on for half of the time. Then the average power absorbed by the light bulb is still 5W, and the average power supplied by the battery is also 5W. The on-off switching can be effected by a PWM (a high pulse switches on the bulb while a low pulse switches it off). If we want the bulb to be brighter (i.e. uses 6W of power), we could leave the switch on for a little longer than the time it was off, then a little more average power will be delivered to the bulb. In this manner, a variable amount of power is transferred to the load without having to dissipate any power in the load driver. The main advantage of a PWM circuit over a resistive power controller is the efficiency. At a 50% level, the PWM will use about 50% of full power, almost all of which is transferred to the load, while a resistive controller at 50% load power would probably consume about 70% of full power, 50% of the power goes to the load and the other 20% is wasted heating the series resistor3 . Another advantage of using a PWM is that the pulses reach the full supply voltage and will produce more torque in a motor by being able to overcome the internal motor resistances more easily4 . A PWM is also useful in the communications field. The output of a PWM is a digital signal which is either high or low. By keeping the signal digital, noise effects are minimized. Noise can only affect a digital signal if it is strong enough to change a logic1 (high voltage) to a logic-0 (low voltage), or vice versa. Increased noise immunity is the principal reason PWM are used for communications over analogue control system. In addition, switching from an analogue signal to pulse width modulated signal can increase the length of a communications channel dramatically. At the receiving end, a suitable RC (resistor-capacitor) or LC (inductor-capacitor) network can remove the modulating square wave and return the signal to analogue form5 . The capability of a PWM to produce digital outputs is another reason why it is commonly used. Digital signals are often needed as computers usually require digital inputs. However, digital signals cannot be easily generated from analogue circuits with 2 Cf.

[2] [3] 4 Ibidem. 5 Cf. [4] 3 Cf.

2.2. APPLICATIONS

9

relatively simple components. As a result, devices that is able to convert analogue signals to digital outputs are useful. A PWM is an example of such devices. It is able to convert analogue input signals into digital pulses with variable-width pulses that represent the amplitude of the analogue input signal. The many applications of a PWM include voltage regulation, power-level control, fanspeed control and signal modulation. Such a PWM circuit can be implemented with three op amps6 and this will be discussed in greater detail in the following chapter.

6 Cf.

[5]

10

CHAPTER 2. PULSE WIDTH MODULATOR

3. Design 3.1

High level design

A PWM consists of two main building blocks: a differential comparator and a triangle wave generator. A differential comparator generates either a high or low output, based on the voltage difference between its two input signals. The triangle wave generator produces a triangle waveform.

Figure 3.1: Block diagram a generic PWM. See [2].

Referring to Figure 3.2, the triangle wave generator is fed to the “-” (inverting) input of the comparator and the modulating signal to the “+” (non-inverting) input.

Figure 3.2: Working principle of PWM.

The comparator generates a high output when the voltage level at the “+” input is higher than that at the “-” input. On the other hand, a low voltage is generated when the “-” input is higher than the “+” input. The resulting output is a square wave whose pulse width is determined by the modulating signal (reference voltage). The modulating signal can be any waveform depending on the modulating signal generator (refer to Figure ??). Essentially, the modulating signal generator block can be any peripheral blocks like potentiometers, voltage rails, audio receivers or even microprocessors depending on the PWM’s application. While a PWM is built from two main building blocks, the two main blocks are in turn built from two basic op-amp circuits: a comparator and an integrator. Having considered the high level design of a PWM, the next level of design which we are interested in is the low level design — the circuit components that make up a PWM. In the following section, the two main building blocks will be broken down to their components level and examined in greater detail. 11

12

3.2 Integrator

CHAPTER 3. DESIGN

Low level design

A triangle wave generator is built from an integrator and a comparator with hysteresis op-amp circuits. Figure 3.3 is a circuit diagram of an op-amp integrator.

Figure 3.3: An op-amp integrator circuit.

The circuit essentially integrates the current flowing in resistor R1 across capacitor C1. The output voltage, VO is simply the voltage across capacitor C1 since node 2 is a virtual earth. This produces a ramp (either up or down) voltage, which is necessary for generation of triangle wave output. This can be done by placing a fixed voltage at the input that forces a constant current, Iin through resistor R1. Due to the very large input impedance of the op-amp, it is assumed that no current flows into it. As such, the current passing through resistor R1 flows into the capacitor C1. The capacitor then integrates the current creating a ramping voltage: Vo = −

1 C1

Z Iin dt

The input current, Iin is given by Vin /R1, where Vin is the input voltage. After a time interval T, the output is the capacitor voltage described by 1 Vo = − R1C1

ZT

Vin dt R1

0

If Vin is negative and constant, the output voltage increases steadily (ramp). can predict the ramp’s voltage at any time T by the simplified equation: Vo = −

1 × Vin × T R1C1

You

(3.1)

This equation also gives the parameters to control the ramp up/down speeds i.e. the period of the generator.

3.2. LOW LEVEL DESIGN

13

Similarly, a ramp down output voltage can be obtained by switching the input to a positive DC voltage.

(a) Ramp up, Vin < 0

(b) Ramp down, Vin 0

Figure 3.4: The two possible outputs of an integrator circuit

To generate a triangle wave successfully, we need to switch from ramping up to ramping down and vice-versa. An op-amp comparator with two thresholds will be able to do the switching, changing its output state from negative to positive saturation (and vice-versa) depending on one of its inputs. We now examine the comparator circuit shown in Figure 3.2 and discuss its role as a “switch” in a triangle wave generator. The non-inverting input of the op-amp (U1B), V+ is a combination of the both the input Vin and the output voltage Vo . By superposition, voltage at V+ is given by: V+ = Vin

R1 R2 + V0 R1 + R2 R1 + R2

Due to positive feedback and the op-amp’s large voltage gain, the op-amp’s output is driven to either positive or negative saturation (VP or VN ) only. The change in output voltage occurs at V+ = V− = 0. This is known as the switching threshold. By making V+ = 0 in the above equation, we obtain Vin = −Vo × R1/R2. Vo can be in one of the two states1 : 1. Positive Saturation Output State:

Vo = V P

2. Negative Saturation Output State: Vo = VN So we solve the above equation first with Vo = VP and then Vo = VN . We get two thresholds for Vin : Vth1 = −VN × R1/R2 Vth2 = −VP × R1/R2

1 Cf.

[6]

Comparator

14

CHAPTER 3. DESIGN

To summarise, the comparator only changes its output when the conditions below are met: 1. To get to the positive output state: Vo is at negative saturation. Thus, the switching threshold is Vth1 . The input must rise above the threshold: Vin > Vth1 before the output voltage swings to positive saturation. 2. To get to the negative output state: Vo is at positive saturation. Thus, the switching threshold is Vth2 . The input must now fall below the threshold: Vin < Vth2 before the output voltage swings to negative saturation. Figure 3.6 is a plot of the input and output voltage of the circuit in Figure 3.5. The switching thresholds are at ±7V since the output voltage is about ±14V. Notice that when the input reaches +7V, the output changes from negative (−14V) to positive saturation (+14V). The switching threshold now becomes −7V and when the input drops to this value, the output swings negative. This alternating switching will repeat itself.

Figure 3.5: Circuit diagram of a comparator with hysteresis.

Figure 3.6: Input and output voltage of circuit in Figure 3.5

3.2. LOW LEVEL DESIGN

15

By connecting the op-amp integrator and comparator together, we obtain a triangle wave generator. The output of the integrator is fed into the non-inverting input of the comparator while the output of the comparator becomes the input of the integrator as shown in Figure 3.7. The comparator circuit provides the integrator with a square wave input of amplitude ±14V. As such, the current flowing into resistor R1 of the integrator circuit interchanges between a positive and negative constant current. This current gets integrated across the capacitor C1 — as explained previously — to produce a ramp up voltage with a negative current and a ramp down voltage when the current is positive.

Figure 3.7: Circuit diagram of a triangle wave generator.

Figure 3.8: Input and output waveform of U1A in Figure 3.7.

16

CHAPTER 3. DESIGN

Therefore, the output of the integrator circuit is a triangle wave. This triangle output is in turn sent into the comparator circuit. The threshold voltages for this comparator is ±7V i.e. the input to the non-inverting terminal of U1B must reach +7V / -7V in order for the output voltage to change from -14V to +14V / -14V to +14V. This relationship is reflected in the graph of Figure 3.8). When the triangle wave (input) is increasing from -7V to +7V, the output (square wave) stays at -14V. The output only changes to +14V when the triangle wave reaches +7V. Likewise, when the triangle wave decreases from +7V to -7V, the output stays at +14V. The output only changes to -14V when the input is -7V. Differential comparator

A differential comparator compares a varying input voltage with a fixed reference voltage. This application uses the large open-loop gain of an op-amp. An op-amp in its open-loop configuration amplifies the voltage difference between its two inputs. Since there is no negative feedback in the circuit and due to its huge voltage gain, the op-amp is driven to saturation i.e. the output becomes limited by the power supply rail. If the input voltage is higher than the reference voltage, then the output is negative. On the other hand, if the input voltage is lower than the reference, then the output is positive.

Figure 3.9: Circuit diagram of a differential comparator.

In the circuit of Figure 3.9, the reference voltage is set at +5V. The input is a sine wave. When the sine wave is above +5V, the output is at -14V and the conversely, when the sine wave is less than +5V, the output is +14V. The plot in Figure 3.10 illustrates the action of the differential comparator. Putting the two main blocks together, we obtain a PWM in its components level i.e. its low level design. The reference voltage in the above circuit (Figure 3.11) is set at +3V. The differential comparator compares the triangle wave with this reference. The comparator generates a high output (+14V) when the triangle wave is below the reference level and a low output (-14V) when the triangle wave is above the reference. This has already been discussed talking about the differential comparator. The width of the output pulse can be varied by altering the reference voltage. Increasing the reference voltage will result in wider positive pulse (narrower negative pulse) while decreasing the reference voltage does the opposite.

3.2. LOW LEVEL DESIGN

Figure 3.10: Input and output waveform of circuit in Figure 3.9.

Figure 3.11: Circuit diagram of a PWM.

Figure 3.12: Output waveforms of circuit in Figure 3.11.

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CHAPTER 3. DESIGN

4. Optimization From the basic PWM circuitry discussed earlier, depending on the application of PWM, there are several ways in which to improve or optimize the circuit. Here are eight possible ways in which the PWM circuitry can be optimized. In most cases peripheral circuit blocks are employed to achieve the optimization. 1. Since the op-amp switching speed is limited by its slew rate, for high speed PWM applications, high frequency op-amps can be used instead. An example of a high speed op-amp is HA-2840. This op-amp has a slew rate of 600V/µs which is much higher than the slew rate of AD648A (1.8V/ µs1 ) which has been used to run all the simulations. Notice that the switching time in Figure 4.2 is negligible at the operation frequency of 9.5kHz while the switching time is about 15µs.

Figure 4.1: PWM output when using AD648A op-amp. The capacitance value for the integrator is at 0.01uF.

Figure 4.2: PWM output when using HA-2840 op-amp. The capacitance value for the integrator is at 0.01uF. 1 For

this data see [7, AD648A and HA-2840]

19

Hi-freq opamps

20 Switching effects

CHAPTER 4. OPTIMIZATION

2. To reduce the transient switching effects when the PWM is first powered up, a small capacitance value e.g. 0.01 µF could be used in the integrator circuit. The circuit that uses 0.1µF capacitor needs 4.5ms to ‘settle down’ (see Figure 4.3) while the circuit with a 0.01µF capacitor only needs 0.42ms (see Figure 4.4). Using a small capacitance value will also increase the frequency of the output signal, that is dependent on the ramp up/down speed. This speed is in turn determined by the resistor and capacitor values as given in equation 3.1. High frequency output is essential for signal modulation in the communications field and smoother rotation of DC motor. However, as operation frequency increases there is more distortions to the triangle wave (the triangle wave does not has pointed edges). This will in turn affect the pulse width if the modulating signal is going to cut the triangle wave very close to its edges. As such, there has to be a balance between reducing the transient switching effect, increasing the operation frequency and maintaining the waveform. During design a decision has to be made as to which parameters are more crucial to the proper funcioning of the circuit.

Figure 4.3: PWM output when using AD648A op-amp. The capacitance value for the integrator is at 0.1uF.

Figure 4.4: PWM output when using AD648A op-amp. The capacitance value for the integrator is at 0.01uF.

21 3. If an output load to the PWM requires high power, the PWM comparator output might not be able to provide a large enough current for this purpose. Hence, using a switching MOSFET at the output of the PWM would solve this problem. As long as the PWM output provides a voltage larger than that of the MOSFET threshold voltage, current from the externally biased source can drive the load. Figure 4.5 shows a possible setup of this circuit.

Output MOSFET

Since MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) can generate radio frequency interference when switching, so for heavy loads, this can be damped with a low-value resistor and a small ferrite bead threaded in series with the nearest the gate2 .Apart from using MOSFETs, Bipolar Junction Transistors (BJTs) can be used. And for higher loads, Darlington power transistor such as TIP120, 121 or 122 could be a good choice3 .

Figure 4.5: Peripheral blocks needed to drive a large output current.

4. Adding a resistor in series with the potentiometer to the comparator portion of the circuit would ensure that the input signal when compared with the triangle waveform will never exceed the peak of the triangle waveform.

Figure 4.6: An addition resistor to the supply rail.

2 Cf.

[8, pwm.html] pwm erg.html

3 Ibidem,

Input resistance

22 Buffer opamp

CHAPTER 4. OPTIMIZATION

5. Op-amp integrated circuit chips usually provide a minimum of four op-amps (single quad-op-amp chip). Three have been used for the basic PWM design. So as to make full use of the provided circuitry, the final op-amp could be used as a voltage follower to buffer the input reference voltage on the comparator, as shown in Figure 4.7. This would provide high input and low output impedance, thus drawing very little power from the input reference voltage circuitry – the potentiometer in our case.

Figure 4.7: A voltage follower added to the differential comparator.

Parallel diode

6. A diode could be placed in parallel with the output load as shown in Figure 4.8(a). This would prevent back-EMF (Electromagnetic Force) from inductive loads such as brushed motors from damaging the switching transistor. It isn’t needed however, with brushless fans or when controlling lighting.

(a) A diode in parallel with the load

(b) Circuit with an inductive load. The resistor and inductor are used to model a DC motor and ETABLE component is used to model the back EMF.

Figure 4.8: A diode as a protective component against back-EMF.

23 The transistors used in the above circuit are power transistors. Even though they are of different models, their characteristics are closely matched4 . The diodes are silicon high current5 diodes to accommodate the high current in the circuit. The resistor R9 and inductor L1 are used to model a DC motor. The ETABLE component is used to model the back EMF. The operating frequency is 9kHz as shown in Figure 4.9.

Figure 4.9: Voltage waveform at point X of the circuit in Figure 4.8(b).

7. A capacitor can be placed in parallel to the PWM circuitry and the load circuit. This will ensure that the supplied voltage to the circuit is constant.

Constant DC

8. For low power PWM applications, micro-power op-amp with high resistance values in the PWM circuit can be used.

Micropower opamps

4 See 5 See

[9, IRF540 and IRF9530] [10, ZHCS750]

24

4.1

CHAPTER 4. OPTIMIZATION

Optimized PWM circuit

Putting together some of the optimizations, we have managed to design a circuit that has higher maximum operating frequency, faster switching speed and reduced transient switching effect. The maximum operating frequency is now about 76kHz as compared to 9kHz in the original design. The transient switching time has also been reduced from 4.5ms using a 0.1µF capacitor to less than 2us. The triangle wave also suffer less distortion.

Figure 4.10: Optimized PWM circuit.

Figure 4.11: Output of the optimized circuit.

5. Further discussion 5.1

Digital PWM

The PWM that we have designed has a maximum working frequency of about 9kHz. Above that frequency the triangle wave suffers distortions. In order to deal with higher frequency application, we can consider using a digital circuit. We also take this opportunity to apply the design concept that we have learned previously, i.e. we find a new implementation for the same high level design (refer to section 3.1). th[7..0]

INPUT

CLK

INPUT

CLK

p[7..0] VCC JKFF

OUTPUT

p[7..0]

OUTPUT

PW

PRN

th[7..0] p[7..0]

J

Q

PW

clk K CLRN

VCC

Figure 5.1: Digital PWM circuit.

The circuit requires two inputs: the clock, and a 8-bit threshold. The threshold set the point on the triangle wave at which the output should toggle between high and low, and it has the same function as potentiometer in our analogue design model.

Inputs

The triangle wave is generated by a synchronous up-down counter. The counter goes towards 0xFF if DNUP is high, and towards 0x00 otherwise. When it reaches one of these ends (either or 0x00 0xFF), COUT is set to 1. To make a change of direction every time COUT is 1, we make it toggling a JK-flipflop connected to DNUP.

Triangle wave generator

The output of the counter is then compared with the threshold (q): we want the output to be 1 (high) if it’s above it and 0 (low) otherwise. There are some standard comparators that offer this particular function (they have an output for that is HI when the input is greater or equal that threshold) but they gave glitches at higher frequencies. So we simplified the comparator with the one shown in figure 5.3. Its output is 1 (high) if and only if the two 8-bit inputs are equals. This output then toggles a JK-flipflop: so the first time two inputs are equal it gives the mark of the pulse wave, and the second time the space.

Comparator

This circuit can be programmed in an Altera programmable chip, with costs comparable to the building of an analogue PWM as in this case we only need one component. The main advantage of this implementation is that it can work at higher frequencies: with 8-bits we were able to run the clock at 125Mhz, as can be seen from figure 5.4. If we consider a pulse wave with the minimum mark/space ratio1 , the pulse actually

Analysis

1 A full period takes 0x200 clock cycles, one clock per step (0xFF up and 0xFF down). We can’t have a pulse of only one clock, since the JKs will not toggle fast enough to reset DNUP before the next clock, so the smallest duty cycle possible is 2 clocks.

25

26

CHAPTER 5. FURTHER DISCUSSION

has a duty cycle of 16ns and the pulse wave itself has a frequency of 207kHz. In applications that do not require 8bits of precision, we can reduce the number of bits and increase the frequency of the pulse wave by a significant factor2 . For example, a 3 bit counter that gives 16 possible mark/space ratios can run at a frequency of 7Mhz.

INPUT

CLK OUTPUT

8count

p[7..0]

GND VCC

CLK

LDN A B C D E F G H GN DNUP SETN CLRN CLK

QA QB QC QD QE QF QG QH COUT

p0 p1 p2 p3 p4 p5 p6 p7

UP/DN COUNTER

VCC JKFF PRN Q

J

n_clk

NOT

CLK

K CLRN

VCC

Figure 5.2: Up down counter: triangular wave generator.

q0 p0

XNOR

q1 p1

XNOR

q2 p2

XNOR

q3 p3

XNOR

q4 p4

XNOR

q5 p5

XNOR

q6 p6

XNOR

q7 p7

XNOR

q[7..0]

INPUT

p[7..0]

INPUT

AND8

OUTPUT

EQ

Figure 5.3: Digital asynchronous comparator.

2 Actually the number of bit doesn’t effect the “precision”, but it just sets the period of the triangular wave, and therefore the number of possible m/s ratios.

5.2. OPTIMAL PULSE WIDTH MODULATION

27

Figure 5.4: Extract of a simulation: q is the threshold, p is the counter output, PW is the modulated output. Clock period is 8ns (125MHz).

Digital PWMs are actually widely used in digital microcontrollers, for example PICs3 . In fact when you want to control something with a pulse wave from a PIC is very inefficient to use machine cycles and the PIC itself to perform the simple operation of repeating pulses. That’s why the PIC comes with a built-in peripheral PWM, that can of course be controlled from the program but that runs independently. Furthermore, one of the advantages that comes with the use of the 8count synchronous counter is that we could potentially implement a “load” routine, in order to be able to change dynamically the period of the wave counting from a certain offset and not from zero. In fact this feature is implemented in the PIC, and once a starting offset has been loaded into the PWM, it is saved in a special register and reloaded every cycle. (refer to PIC datasheet section 8.3 page 61)

5.2

Optimal pulse width modulation

Apart from overcoming the problem of operating at very high frequencies, we could also aim to reduce the energy consumption of a load that is driven by a pulse-width modulated signal. The following section explains how this form of optimization is achieved. The total harmonic content of a pulse-width modulated wave dictates the amount of additional heating that may occur where we are utilizing our wave; say in a motor being driven by a PWM inverter. The lower order harmonics of a modulated voltage wave can be greatly reduced if a sinusoidal modulating signal modulates a triangular carrier wave. The pulse widths then cease to be uniform but become sinusoidal functions of the angular pulse position. A reasonable optimization criterion is maximizing the distortion factor which is defined as: Vrms of the fundamental compontent Vrms of the PWM wave Vrms of the PWM is synonymous to the harmonic content of out PWM-ed wave. The switching angles can be calculated in order that the PWM waveform possesses a fundamental component of a desired magnitude while at the same time suppressing “selected” harmonics such as the 5th and/or 7th from the waveform which are of higher magnitudes. 3 Peripheral Interface Controller, made by Microchip. From now on we refer in particular to the PIC16F87X series)

Applications

28

CHAPTER 5. FURTHER DISCUSSION

Figure 5.5: Introducing notches in the PWM output.

To serve our purpose we introduce “notches” at the quarter cycle of our wave form, as shown in Figure 5.5. From Fourier series, as our PWM wave is an odd function, the Fourier coefficients an are zero, and 4 bn = π

Zπ/2 v(ωt) sin nωt dt 0

The wave form is then defined by: a2,a4 a1,a3,π/2 − Vdc v(ωt) = Vdc 0,a2,a4

a1,a3

Combining the above two equations gives:   Vdc bn = 4 1 − 2 cos na1 + 2 cos na2 − 2 cos na3 + 2 cos na4 nπ The above equation can be extended to accommodate any desired number of notches or switches per quarter-wave. Each switching-angle in the quarter-wave represents an unknown to be determined. The generalized form of our equation is given by   m X Vdc 1+ cos nai Vn = 4 nπ i=1 where m is the number of switchings per quarter-cycle. Therefore putting m = 4 gives us four simultaneous equations which can be equated to zero to suppress four harmonics of our choice. It may therefore be logical to suppress the higher magnitude 5, 7, 11 and 13 order harmonics as these cause torque pulsations and speed fluctuations in AC motor when driven at low rotational speeds. Elimination of these four harmonics produces a waveform in which there is no harmonic of order lower than the seventeenth4 . The introduction of “notches” however is a trade-off, as it will decrease the amount of the fundamental component as well as lead to more switching losses. 4 Cf.

[11, p. 142-143]

5.2. OPTIMAL PULSE WIDTH MODULATION

29

In general the set of simultaneous equations described above need to be solved by using numerical methods. This requires a main-frame computer. The pre-computed values of switching angle are stored in a ROM-based look-up table from which they are accessed by a microprocessor in order to generate the necessary switching pulses. It would not be possible to solve the equations in real-time as would be needed in a motor control application. The more the number of notches the more refined the output waveform but equations would need to be solved repetitively, once for each desired level of output. Because of this, optimal PWM is yet to be practical at frequencies below about 10Hz5 .

5 Cf.

[12, p. 503, passim]

30

CHAPTER 5. FURTHER DISCUSSION

6. Conclusion In conclusion, we have seen that the Pulse Width Modulator is essentially made up of a triangular waveform generator and a differential comparator. As analysed from the pSpice simulations, the integrator and Schmitt Trigger circuits can be combined to produce the triangle waveforms. While a differential comparator generates either a high or low output, based on the voltage difference between its two input signals. Optimization of the basic PWM circuitry were tested and suggested. Other possible PWM circuit enhancements were also discussed. Apart from approaching the PWM from the analogue aspect, a digital approach was also explored. Through simulations, it was shown that high frequency pulses of over 200KHz were attainable. This is far higher than the 9KHz simulated for the analogue circuit. A general optimization for power electronics applications (above 10Hz) through the removal of higher order harmonics was shown mathematically.

31

32

CHAPTER 6. CONCLUSION

A. Management report We had our first preliminary meeting on 17th January 2006. At the meeting, Jamin was once again elected as our group leader. We agreed to research over the next two weeks what a PWM was about. We met up again on 3rd February. This was when we decided to split into three groups: Guangfan and Jamin would work on analyzing the low-level PWM circuits, Pietro and Hadeed would find out how the PWM could be optimized, Parisa and Frankie would start working on the report introduction of what the PWM is. The circuit analysis of the PWM was done and the draft report written by Jamin and Guangfan. Guangfan also simulated the various parts of the circuit on pSpice. A brief introduction to PWM was also drafted out by Frankie and Parisa. There was a delay in the progress of the group as Hadeed was unable to check with Dr Fobelets about the issue of optimization for two weeks. Jamin finally wrote an email to Dr Fobelets to clarify the issue. Pietro suggested building the PWM from a digital circuit stand point as higher frequencies could be obtained. This was welcomed by the group. He wrote and contributed the part on PWM via digital circuitry. He ran simulations of his digital PWM on Altera MAX+plus II 9.6. Upon receiving Dr. Fobelets’ reply on optimization, Jamin researched and wrote about the possible ways of optimizing the current PWM circuitry. He also wrote the introduction and conclusions of the report and the management report. Hadeed contributed to the report in the discussion of further optimization of the PWM through the removal of harmonics in the PWM output. Guangfan improved on the write-up on PWM drafted by Frankie and Parisa, discussing more in depth about why PWMs are useful. He then completed the high-level design with the help of Jamin. He also produced the simulations for the basic PWM circuit and generated the simulations for the various optimizations on Pspice. Lastly, he compiled the report for the group and prepared the management timetable, while Pietro designed1 and converted the report in LATEX. Frankie and Parisa took turns writing and sending out the minutes for the group.

1 This report, with the exception of the simulations, has been produced using only free, open source, software.

33

Individual research on PWM.

2 (23 Jan)

3 (30 Jan)

⊗

4 (6 Feb)

5 (13 Feb)

6 (20 Feb)

7 (27 Feb)

⊗

⊗ ⊗

Note: 1. 1st week of work plan commenced from 16th January 2006. 2. Arrows show provision of materials from one activity to another. 3. ⊗: Group meeting in that week.

Figure A.1: Timetable

: Time allocated : Actual time used

APPENDIX A. MANAGEMENT REPORT

Dedication of tasks and individual group work. Optimization of our basic PWM circuitry. Compilation and final touchup.

Timetable (weeks) 1 (16 Jan) ⊗

34

Activity

A.1. MINUTES OF MEETINGS

A.1

35

Minutes of Meetings

Meeting 1 Date: 3rd Feb, 2006 Time: 1.30pm Present: Jamin, Guangfan, Pietro, Parisa and Frankie Absent: Hadeed Work Distribution: since we have already got the low level design, we have the following things left to do: • Guangfan and Jamin: work on analysing the circuits • Pietro and Hadeed: finding out how exactly optimisation works • Parisa and Frankie: write essay about the PWM (what it is and application), name the two main blocks of PWM. I’m unsure about the top level design of PWM: building blocks. I think we were first discussed that Parisa and Me doing it, but has Pietro said he would do it? Next Meeting: 9th Feb (Coming Thursday) at 1.00pm in Computer Lab straight after communication lecture Minutes written by: Frankie Meeting 2 Date: 9th Feb, 2006 Time: 12.45pm Attendant: Jemin, Guangfan, Hadeed, Pietro and Frankie Absent: Parisa Frankie talked about what she and Parisa did. A general essay has been done and need to add more points on the applications of PWM and polish the essay off. Jamin and Guangfan explained the analysis done on the PWM circuitry. They explained the Schmitt trigger, raised the issue of how plays an important role in the PWM and also talked about how triangular wave can be generated. However, there are things that they are unsure about and further discussions were made within the group. Pietro and Hadeed had talked about what they meant by optimisation of PWM. Pietro suggested that since our PWM contained only 3 op-amps and it’s is cannot be optimised that much. Instead he will possibly make a digital PWM using a digital counter. Hadeed had found out that we can optimise the PWM by cutting harmonics, dependiing on the different applications. Aims for next week: • Jamin and Guangfan continue the write up for analysing the Low Level Design

36

APPENDIX A. MANAGEMENT REPORT • Parisa and Frankie continue to do the introduction and essay. • Pietro: build and simulate digital PWM, find out about costs. • Hadeed: clarify what exactly we are supposed to do for optimisation and can carry on.

Next meeting: Date: 16th Feb, 2006 Time: 1pm Location: computer lab Minutes written by: Frankie Meeting 3 Date: 23rd Feb, 2006 Time: 12:50pm Present: Pietro, Parisa, Guangfan, Frankie and Jamin Absent: Hadeed

• Pietro: presented his report on the digital pwm circuit and will be sending it to Guangfan. Discussed with Jamin about 555 timers and clocks, and agreed that clock is allowed. • Guanfan: covered the portion he wrote, including the introduction, circuit analysis and circuit simulation • Jamin: present the pwm audio amplification application and added that it was probably not useful to split the optimization methods under Digital and Analogue headings • Frankie and Parisa: described what they found about analogue optimization and that it is different in each kind of applications. Discussion: 1. We talked about optimisation and the fact that somebody should finally ask Dr Fobelets about it and find out how we can write down the report. 2. We also agreed that if anyone does not contribute constructively to the group, their name will be left out of the report. TO DO LIST 1. Ask Dr. Fobelets what she means by optimization (Jamin) 2. Optimization of the circuit (Jamin, Parisa, Franki) - Meeting times: (anyone else can feel free to join them at the stated times) (a) Friday evening after computer lab - Evening till late, level 3 computer room (Jamin) (b) Saturday morning 9am - 12.30pm, level 3 computer room (Jamin, Franki) (c) Monday morning 8am - 10am, level 3 computer room (Jamin, Parisa)

A.1. MINUTES OF MEETINGS

37

3. Final draft of each part to be sent to Guangfan by wednesday 9pm (Everybody) 4. Final draft report to be sent to Pietro to convert into LATEX (Guangfan) 5. Compiling of report in LATEX format (Pietro) Minutes written by: Parisa Edited by: Jamin Meeting 4 Date: 28th Feb, 2006 Time: 12.00 Present: everyone During the meeting: Jamin explained what he had done for optimisation and will send it to Guangfan. Hadeed talked about things he had thought of adding to the project i.e. using transistors and also using signals from PWM as input to a digital circuit. And we discussed how it can fit into the report. Aims for this week: Hadeed will send what he had done to Guangfan by tonight Guangfan will organise the report and send it to Pietro on about wed. Pietro will edit it using LATEX and print it by Friday morning. Minutes written by: Frankie

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APPENDIX A. MANAGEMENT REPORT

List of Figures 2.1

Various outputs from a PWM. . . . . . . . . . . . . . . . . . . . . . .

7

3.1

Block diagram a generic PWM . . . . . . . . . . . . . . . . . . . . . .

11

3.2

Working principle of PWM. . . . . . . . . . . . . . . . . . . . . . . . .

11

3.3

An op-amp integrator circuit.

. . . . . . . . . . . . . . . . . . . . . .

12

3.4

The two possible outputs of an integrator circuit . . . . . . . . . . . .

13

3.5

Circuit diagram of a comparator with hysteresis. . . . . . . . . . . . .

14

3.6

Input and output voltage of circuit in Figure 3.5 . . . . . . . . . . . .

14

3.7

Circuit diagram of a triangle wave generator. . . . . . . . . . . . . . .

15

3.8

Input and output waveform of U1A in Figure 3.7.

. . . . . . . . . . .

15

3.9

Circuit diagram of a differential comparator.

. . . . . . . . . . . . . .

16

3.10 Input and output waveform of circuit in Figure 3.9.

. . . . . . . . . .

17

3.11 Circuit diagram of a PWM. . . . . . . . . . . . . . . . . . . . . . . . .

17

3.12 Output waveforms of circuit in Figure 3.11. . . . . . . . . . . . . . . .

17

4.1

PWM output when using AD648A op-amp. . . . . . . . . . . . . . . .

19

4.2

PWM output when using HA-2840 op-amp. . . . . . . . . . . . . . . .

19

4.3

PWM output when using AD648A op-amp. . . . . . . . . . . . . . . .

20

4.4

PWM output when using AD648A op-amp. . . . . . . . . . . . . . . .

20

4.5

Peripheral blocks needed to drive a large output current. . . . . . . . .

21

4.6

An addition resistor to the supply rail. . . . . . . . . . . . . . . . . . .

21

4.7

A voltage follower added to the differential comparator. . . . . . . . .

22

4.8

A diode as a protective component against back-EMF. . . . . . . . . .

22

4.9

Voltage waveform at point X of the circuit in Figure 4.8(b). . . . . . .

23

4.10 Optimized PWM circuit. . . . . . . . . . . . . . . . . . . . . . . . . . .

24

4.11 Output of the optimized circuit. . . . . . . . . . . . . . . . . . . . . . .

24

5.1

Digital PWM circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

25

5.2

Up down counter: triangular wave generator. . . . . . . . . . . . . . .

26

5.3

Digital asynchronous comparator. . . . . . . . . . . . . . . . . . . . . .

26

5.4

Timeline of digital PWM . . . . . . . . . . . . . . . . . . . . . . . . .

27

5.5

Introducing notches in the PWM output. . . . . . . . . . . . . . . . .

28

A.1 Timetable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

34

39

40

LIST OF FIGURES

References [1] Stephen Cloutier. Pulse Width (Duration) Modulators - Updated for Solid State Devices. http://www.classeradio.com/pdm_article_solid_state. html, 2005. [2] Paul Hills. PWM Signal Generators. http://homepages.which.net/~paul. hills/Circuits/PwmGenerators/PwmGener%ators.html, 2004. [3] Forrest Cook. Pulse Width Modulator for 12 and 24 Volt applications. http: //www.solorb.com/elect/solarcirc/pwm1/, 1999. [4] Michael Barr. PWM Signal Generators. Publications/Glossary/PWM.html, 2001.

http://www.netrino.com/

[5] Dallas Semiconductor. Pulse-Width Modulator Operates at Various Levels of Frequency and Power. http://www.maxim-ic.com/appnotes.cfm/appnote_ number/3201, 2004. [6] Ecircuit center. Opamp Comparator with Hysteresis. ecircuitcenter.com/Circuits/op_comp/op_comp.htm, 2005.

http://www.

[7] Datasheet4u. Datasheets. http://www.datasheet4u.com/, 2005. [8] Cpemma. Fan noise solutions. www.cpemma.co.uk, 2005. [9] Datasheet catalog. Datasheets. http://www.datasheetcatalog.com/, 2005. [10] Zetex. Datasheets. http://www.zetex.com/, 2005. [11] JMD Murphy and FG Turnbull. Power Electronic Control of AC Motors. Permagon press, 1988. [12] L.N. Hulley W.Shepherd and D.T.W. Liang. Power Electronic Control of AC Motors. Cambridge University Press, 2 edition, 1996.

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