Performance analysis of single- and multi-walled carbon nanotube bundle based through silicon vias Arsalan Alam, Manoj Kumar Majumder, Archana Kumari, V. Ramesh Kumar, and Brajesh Kumar Kaushik Department of Electronics and Communication Engineering, Indian Institute of Technology Roorkee, Roorkee – 247667, INDIA E-mail: {arsalanalam89, manojbesu, archna.iiita, rameshkumar.nith}@gmail.com, [email protected] This research letter presents a comparative analysis for power, delay and bandwidth performances between single- (SWCNT) and multi-walled (MWCNT) carbon nanotube bundle filled through-silicon vias (TSVs). A comprehensive and accurate electrical equivalent model of CNT bundled TSV is presented that takes into account the MOS effect of silicon substrate. The transfer function of driver-TSV-load (DTL) system is obtained by representing the via line with equivalent single conductor (ESC) model of CNT bundle based TSVs. Using absolute frequency response, it is observed that the bandwidth of 10-shell MWCNT bundled TSV is larger in comparison to the SWCNT bundle, 4-shell MWCNT and 8-shell MWCNT bundle based TSVs. Moreover, a 10-shell MWCNT bundle demonstrates substantial reduction in delay and power dissipation in comparison to the SWCNT bundle based TSV.

1. Introduction: Three-dimensional (3D) integrated circuit (IC) technology provides an alternative solution to 2D planar ICs, wherein two or more dies are stacked on top of each other and connected with suitable interconnects. The 3D interconnects allows data transfer in both horizontal and vertical directions simultaneously that helps in improving the overall performance of 3D IC [1]. Moreover, it offers integration of heterogeneous system onto a single platform as shown in Fig. 1. Recent advances in 3D technology offers vertical interconnect access (via) that extend through silicon, known as through silicon via (TSV). Compared to the conventional wire-bond, TSVs offers higher bandwidth and density, low latency and power dissipation and thereby, enabling higher integration density and superior system performance [2]. Chip 3 Chip 2

Chip 4

Chip 1

Silicon interposer SiP substrate

Chip substrate

Device layer

Standard and backside metal layers

Fig. 1. TSV based 3D technology The performance of 3D IC is primarily dependent on the choice of filler materials used in TSVs. Tungsten (W) and copper (Cu) are the most commonly used filler materials in 3D TSVs. However, in recent years, the W and Cu have faced certain challenges due to the fabrication limitations in achieving proper physical vapour deposition (PVD), seed layer deposition and performance limitations due to the electromigration and higher resistivity. Therefore, researchers are forced to find an alternative replacement of W and Cu materials. Carbon nanotubes (CNTs) are considered to be promising material in current nanoscale regime due to their unique electrical, thermal and

mechanical properties [3-5]. The superior electrical properties are due to unique band structure of graphene that leads to zero effective mass of electrons and holes. CNTs have higher current carrying capability, long ballistic transport length, higher thermal conductivity, and better mechanical strength than Cu [6-8]. The performance of Cu and single-walled CNT (SWCNT) bundle based TSVs were previously analyzed and compared by Gupta et al. [9] for different via dimensions. The authors proposed an equivalent electrical model by neglecting the imperfect metal-nanotube contact resistance. Xu et al. [1] proposed a compact RLCG model of SWCNT and multi-walled CNT (MWCNT) bundle based TSVs for a fixed number of conducting channel and mean free path. However, Zhao et al. [10] considered the diameter dependent conducting channels while modeling via parasitics. The authors compared the performance of Cu, W and SWCNT bundle based TSVs for perfect contact resistance (Rmc = 0) and a fixed value of mean free path (λmfp = 1μm). These analyses [1, 9, 10] lacked in accuracy and did not analyze the performance thoroughly. Therefore, a more realistic model and analysis is required that can fairly compare the performance of SWCNT and MWCNT bundle based TSVs. This research letter analyzes and compares the power, delay and bandwidth of bundled TSVs having SWCNTs and MWCNTs of different number of shells. A comprehensive and accurate equivalent single conductor (ESC) model is employed, taking into account the MOS effect generated by the presence of TSVs on silicon substrate. The via parasitics are accurately modeled by considering diameter dependent mean free path and conducting channels. The ESC model of SWCNT and MWCNT bundle is used to represent the TSV in a driver-TSV-load (DTL) system. 2. Physical configuration and equivalent model: The filler material of embedded TSV on Si substrate is composed of different types of CNT bundles. The top cross-sectional views of SWCNT and MWCNT bundled TSVs are shown in Figs. 2(a) and 2(b), respectively. The bundled SWCNT and MWCNT are surrounded by dielectric (usually SiO2) for dc isolation. Furthermore, the isolation dielectric is surrounded by a depletion region. The thickness of the depletion region primarily depends on the voltage bias condition, interface charge density, material properties of the surrounding Si substrate, etc [1].

1

SWCNT

Silicon Substrate

tox

Silicon Substrate

MWCNT

tox

wdep

' LTSV =

wdep

rvia

rvia

rox

rox rdep

rdep (a)

(b)

Silicon substrate

Depletion region

SiO2

Fig. 2. Top cross-sectional view of (a) SWCNT and (b) MWCNT bundled TSVs surrounded by dielectric layer, Si depletion region and the bulk Si Rmc/2

Rq/2

R'TSV

L'TSV

Rq/2

' Q

C /2

' ox

C /2

Cox' / 2

' /2 Cdep

' Cdep /2

where vF ≈ 8×105m/s is the Fermi velocity of CNT and graphene [7]. The mutual magnetic inductance has been often neglected in comparison to kinetic inductance by several researchers. As reported by Sarto et al. [8] and Li et al. [12], the magnitude of kinetic inductance is in the order of nH/μm whereas the mutual magnetic inductance is just in the order of pH/μm and therefore, it can be safely neglected in the equivalent electrical model. The equivalent model of Fig. 3 comprises of two different types of capacitances: 1) quantum capacitance (C'Q) that arises due to the density of electronic states in a quantum wire and 2) the MOS capacitance (C'TSV) that depends on the oxide and depletion region capacitances, C'ox and C'dep, respectively [5, 10]. The C'Q and C'TSV in p.u.l. can be expressed as

Rmc/2 ' C= TSV

=

Fig. 3. Physical configuration and equivalent electrical model of CNT bundle based TSV The number of CNTs (NCNT) in bundle is approximated using the cross-sectional area of via and the diameter of each CNT in a bundle. For a fixed via radius rvia = 2.5μm and SWCNT/MWCNT inner shell radius rCNT = 0.5nm [5, 10], the total numbers of SWCNTs and MWCNTs in a bundle can be obtained as N CNT =

(

2 2π rvia

3 2 rCNT + δ

)

2

' RTSV =

h 2

 1  '  Cox

1 + ' C dep

  

; where

2 2e ' CQ 0 = hv F

(4)

−1

 ln [( r + t ) / r ] ln ( rvia + tox + wdep ) / ( rvia + tox )    via ox via +  2 2 πε πε   ox Si

−1

(5)

where rvia, tox, wdep, εox and εSi are the via radius, oxide thickness, depletion region width, permittivity of oxide and Si substrate, respectively. Additionally, each shell in MWCNT and each SWCNT/MWCNT in bundle experiences an inner-shell and interCNT coupling capacitance, Cs and Cc, that primarily depends on the diameter of adjacent shells and centre-to-centre distance between neighbouring CNTs (Sc-c), respectively [8, 13]. The C's and C'c in p.u.l. can be expressed as

(1)

where δ ≈ 0.34nm is the distance between neighboring CNTs in the bundle. Depending on the physical configuration, an equivalent electrical model of CNT bundled TSV is shown in Fig. 3. The equivalent via resistance (R'TSV) arises due to the static impurity scattering, defects, line edge roughness scattering and acoustic phonon scattering [6, 11]. The per unit length (p.u.l.) R'TSV can be expressed as

(3)

4 e v F . N channel . N CNT

' ' = CQ 2CQ 0 × N channel . N CNT

' Q

C /2

h 2

'i +1,i = Cs

and

(

2πε 0

ln Di Di +1

(6)

)

πε 0

' Cc = ln

( S  c −c

)

2r +

(

( S c −c

2r

)

2

+1

)

 

(7)

where r represents the mean radius of any two CNTs in the bundle.

'i +1,i represents the coupling capacitance between ith and (i+1)th Cs

shells with corresponding diameters of Di and Di+1, respectively. (2)

2 e . N channel . N CNT .λ mfp

where h, e and λmfp represents the Planck’s constant, electron charge and diameter dependent mean free path, respectively. Nchannel and NCNT are the number of conducting channels and the number of SWCNTs/ MWCNTs in a bundle, respectively. Resistance, Rq appears mainly due to the quantum confinement of electrons and depends on the Nchannel of each SWCNT/MWCNT in a bundle. The imperfect metalnanotube contact resistance is represented by Rmc that mainly depends on the fabrication process. The equivalent inductance (L'TSV) appears due to kinetic energy associated with the velocity of electrons in each conducting channel and can be expressed as

3. Performance analysis: Propagation delay and power dissipation of single- and multi-walled CNT bundled TSVs are analyzed using a driver-TSV-load system (Fig. 4). A resistive driver with supply voltage Vin = 1V is used to drive the via line. The TSV in the DTL system is represented using the equivalent electrical models of bundled SWCNT and bundled MWCNT. The p.u.l. equivalent resistance, inductance and capacitance are represented as R'ESC = R'TSV, L'ESC = L'TSV and C'ESC = (1/C'Q + 1/C'TSV)-1, respectively. The lumped resistance (R1) in Fig. 4 is the series combination of imperfect metalnanotube contact resistance (Rmc) and quantum resistance (Rq). The driver resistance and driver capacitance are represented as Rdr and Cdr, respectively. The via line is terminated by a load capacitance CL of 10fF. The quantitative values of driver and via parasitics of SWCNT and MWCNT bundled TSVs are summarized in Table 1.

2

Cdr

R1

R'ESC

L'ESC

C'ESC /2

C'ESC /2

32.5 CL

Fig. 4. A driver-TSV-load system Table 1 Equivalent Parasitics of CNT bundled TSVs Via parasitics '

'

R ESC (mΩ/μm) L ESC (pH/μm) '

C ESC (fF/μm)

SWB

*

*

*

0.55

32.0

0.50

31.5

0.45 0.40

31.0

0.35

30.5

0.30

*

0.25

MWB (8)

MWB (10)

4.59

0.91

0.42

0.32

TSV filler material

0.73

1.05

1.54

1.72

(b)

0.27

0.17

0.11

0.09

Fig. 5. Propagation delay and power dissipation of different CNT bundled TSVs for (a) hTSV = 30μm and (b) hTSV = 90μm

292.36

Cdr (aF)

45.51

*

SWB, MWB (4), MWB (8) and MWB (10) represent the SWCNT bundle, 4shell, 8-shell and 10-shell MWCNT bundled TSVs, respectively.

The propagation delay and power dissipation are analyzed for different number of shells in MWCNT and SWCNTs in the bundle. Each SWCNT has a diameter of 1nm whereas the outermost shell diameters of MWCNTs are in the range of 3.04nm to 7.12nm. Figures 5(a) and 5(b) presents the propagation delay and power dissipation of different bundle configurations at via height of 30μm and 90μm, respectively. Irrespective of via height, the overall delay and power dissipation substantially reduces for 10-shell MWCNT bundled TSV compared to SWCNT, 4-shell and 8-shell MWCNT bundled TSVs. Propagation delay and power dissipation are proportional to the via self resistance and capacitance, that in turn depends on the number of conducting channels. For a fixed via radius, the 10-shell MWCNT bundle has lesser number of CNTs in comparison to SWCNT bundle resulting in reduced number of conducting channels. This substantially reduces the C'Q while increasing the R'ESC. However, in 10-shell MWCNT bundled TSV that has larger diameter CNTs, the longer mean free path (λmfp) reduces the overall R'ESC (Table 1), which in turn significantly increases the overall conductivity of the bundle. Thus, the cumulative effect of number of conducting channels and mean free path in 10-shell MWCNT bundled TSV is the overall reduction of R'ESC (increase in conductivity) and C'Q. Thus, the overall propagation delay and power dissipation of 10-shell MWCNT bundled TSV are substantially reduced in comparison to the bundled SWCNT, 4-shell MWCNT and 8-shell MWCNT bundle based TSVs.

SWB

MWB(4) MWB(8) MWB(10)

3. Frequency response and bandwidth analysis: This section analyzes the frequency response and bandwidth of CNT bundle based TSVs using the transfer function (TF) of the DTL system (Fig. 4). The TF accurately takes into account the driver resistance, driver capacitance and via parasitics (Table 1). Using the transmission matrix parameter for a uniform RLC transmission line, the distributed transfer function of the DTL (Fig. 4) can be expressed as

30.2 0.20

30.1 30.0

0.15

29.9 29.8

0.10

29.7 SWB

MWB(4) MWB(8) MWB(10)

TSV filler material (a)

0.05

(8)

A + sC L B

where CL = 10fF is the load capacitance and the coefficients A and B can be expressed as 2 ' '  RESC C ESC ( nx )

A= 1+ s 

2  2 ' '  L C 2 ESC ESC ( nx ) +s  2  +

' '2 R ESC C ESC

+

' + Rdr C dr + C ESC '2 '2 R ESC C ESC

( nx ) ( R1 + Rdr ) 3

3!

B=

(

' 2R + R + R (n 1 dr ESC

)

( nx )



( nx ) ( R1 + Rdr ) 

4 +

' ' R ESC Rdr C ESC C dr

4!

)

( nx )

(8a)

2

2

 ' + R1 Rdr C dr C ESC ( nx ) 

 R' C ' ( nx )2 2R + R 2R R C x+ s  ESC ESC  1 1 dr dr dr 2

(



)

'2 ' R C ( nx )3 ' ' ' R C ( nx ) + ESC ESC +L ( nx ) + R12CESC ( nx ) + RESC ESC dr dr 3! 2  '2 '2  L' C ' nx ) R C ( ( nx )4  ESC ESC ' 2 2R + R nx )  + s +R R C + ESC ESC (  1 dr   1 dr ESC 2 4! 

)



Power dissipation (µW)

Propagation delay 0.25 Power dissipation

30.3

1

TF =

(

30.4

Propagation delay (ps)

0.60

MWB (4)

Rdr (Ω)

29.6

Propagation delay Power dissipation

Power dissipation (µW)

Vin

R1

Propagation delay (ps)

Rdr



(8b)     

' ' ' '3 '2 L C C ( nx )3 RESC ( nx )5 2 ' ' ESC ESC ESC ESC + +R R R C C ( nx ) + 1 dr ESC ESC dr 3! 5! 3 3 2 ' '2 '2 ' R R C nx ) R R C C nx ) ( ( ' 2 ' + 1 ESC ESC + ESC dr dr ESC +R C L +R C 1 ESC dr dr ESC 3! 3! 2R

(

)(

nx )

where n and x represents the number of distributed segments and the length of each segment, respectively. The transfer function of (9) is used to obtain the cut-off frequency (fc) that primarily depends on the via parasitics as presented in Table 1. For a fixed via radius of 2.5µm, Figs. 6(a) and 6(b) plots the frequency response of DTL at TSV height of 30µm and 90µm, respectively. It is observed that the 10-shell MWCNT bundled TSV demonstrates higher fc in comparison to the SWCNT, 4-shell MWCNT and 8-shell MWCNT bundle based TSVs.

3

This fact can be explained in terms of dominating via parasitics R'ESC and C'ESC. It leads to form a RC low pass filter that has a bandwidth close to the cut-off frequency, fc = 1/2π.R'ESC.C'ESC [11]. For a fixed via height and radius, the time constant (R'ESC.C'ESC) of 10-shell MWCNT bundle is smaller compared to the other TSV bundles that results in higher value of fc. Therefore, the bandwidth of 10-shell MWCNT bundled TSV is significantly higher in comparison to the SWCNT, 4-shell MWCNT and 8-shell MWCNT bundle based TSVs. 1

MWB(10) MWB(4) SWB

Gain

0.8 0.6 0.4 0.2 0 108

109

1010

1011

1012

Frequency (Hz)

[4] Xu, Y. and Srivastava, A.: ‘A model for carbon nanotube interconnects,’ Int. J. Circuit Theory Appl., 2010, 38, pp. 559 – 575. [5] Zhao, W.-S., Sun, L., Yin, W. -Y., and Guo, Y. –X.: ‘Electrothermal modelling and characterisation of submicron through-silicon carbon nanotube bundle vias for threedimensional ICs’, IET Micro & Nano Letters, 2014, 9, 123-126. [6] Majumder, M. K., Kaushik, B. K., and Manhas, S. K.: ‘Analysis of delay and dynamic crosstalk in bundled carbon nanotube interconnects’, IEEE Trans. Electromag. Compat., 2014 (doi: 10.1109/TEMC.2014.2318017). [7] Li, H., Xu, C., Srivastava, N., and Banerjee, K.: ‘Carbon nanomaterials for next-generation interconnects and passive, physics, status and prospects’, IEEE Trans. Electron Devices, 2009, 56, pp. 1799-1821.

(a) 1

MWB(10) MWB(4) SWB

Gain

0.8

[8] Sarto, M. S. and Tamburrano, A.: ‘Single-conductor transmission-line model of multiwall carbon nanotubes’, IEEE Trans. Nanotechnol., 2010, 9, pp. 82–92.

0.6 0.4 0.2 0 107

108

109

1010

1011

[9] Gupta, A., Kannan, S., Kim, B. C., Mohammed, F., Ahn, B.: ‘Development of novel carbon nanotube TSV technology’, Proc. IEEE 60th Electronic Component and Technology Conference (ECTC), Las Vegas, NV, USA, 2010, pp. 1699-1702.

Frequency (Hz)

(b) Fig. 6. Frequency response of different CNT bundled TSVs at (a) hTSV = 30μm and (b) hTSV = 90μm

[10] Zhao, W. –S., Yin, W. –Y., and Guo, Y. –X.: ‘Electromagnetic compatibility-oriented study on through silicon single-walled carbon nanotube bundle via (TS-SWCNTBV) arrays’, IEEE Trans. Electromag. Compat., 2012, 54, pp. 149-157.

4. Conclusion: This research letter presented an accurate analytical model of signal-ground CNT bundle based TSVs. The equivalent RLC model of SWCNT and MWCNT bundled TSV is used to represent the TSV of the DTL system. A second order transfer function is obtained to analyze the frequency response of CNT bundled TSVs. For a fixed via dimension, the bundled TSV having MWCNTs with more number of shells demonstrates larger bandwidth compared to the bundled SWCNT and bundled MWCNT with lesser number of shells. Moreover, the bundle containing MWCNTs with more number of shells exhibits improved delay and power performance in comparison to the other single- and multi-walled CNT bundle based TSVs.

[11] Majumder, M. K., Kukkam, N. R., and Kaushik, B. K.: ‘Frequency response and bandwidth analysis of multi-layer graphene nanoribbon and multi-walled carbon nanotube interconnects’, IET Micro & Nano Letters, 2014, 9, pp. 557-560.

5. References

[12] Li, H., Yin, W. -Y., Banerjee K., and Mao, J. -F.: ‘Circuit modeling and performance analysis of multi-walled carbon nanotube interconnects’, IEEE Trans. Electron Devices, 2008, 55, pp. 1328–1337. [13] Subash, S., Kolar, J., and Chowdhury, M. H.: ‘A new spatially rearranged bundle of mixed carbon nanotubes as VLSI interconnection’, IEEE Trans. Nanotechnol., 2013, 12, pp. 3-12.

[1] Xu, C., Li, H., Suaya, R., and Banerjee, K.: ‘Compact AC modeling and performance analysis of through-silicon vias in 3D ICs’, IEEE Trans. Electron Devices, 2010, 57, pp. 3405-3417. [2] Morris, J. E.: ‘Nanopackaging: Nanotechnologies and electronics packaging’, in Proc. IEEE Int. Conf. Microsystems, Packaging, Assembly and Circuits Technology, 2007 (IMPACT 2007), Taipei, 2007, pp. 251-254. [3] Stan, M. R., Unluer, D., Ghosh, A., and Tseng, F.: ‘Graphene devices, interconnect and circuits–challenges and opportunities’, in Proc. IEEE International Symposium on Circuits and Systems, 2009, pp. 69–72.

4

ECTC Accepted paper.pdf

TSV is presented that takes into account the MOS effect of silicon substrate. The transfer function of driver-TSV-load ... integration of heterogeneous system onto a single platform as shown. in Fig. 1. Recent advances in 3D ... For a fixed via radius rvia = 2.5μm and SWCNT/MWCNT inner shell. radius rCNT = 0.5nm [5, 10], the ...

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