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High Aspect Ratio Microcolumns to Manipulate Single Electrons on a Liquid Helium Surface for Quantum Logic Bits S. Pilla, X. C. Zhang, Brian Naberhuis, Alex Syschenko, and J. M. Goodkind

Abstract—Electrons are bound to the surface of liquid helium by the image potential due to the induced polarization of the helium. The potential varies as the reciprocal of the distance of the electron from the surface so that the energy levels for the electron motion perpendicular to the surface are those of a one-dimensional hydrogen atom with very small charge. In order to make quantum logic elements (qubits) using the ground state and first excited state in this potential, individual electrons must be confined over microelectrodes which are individually connected to variable voltage sources so that the electron energy levels can be shifted in and out of resonance with applied microwave radiation. The electrodes consist of an array of gold columns, about 1.2 m tall and 200 nm in diameter, separated by 500 nm. These are grown by electroplating on the ends of leads deposited on a silicon substrate by e-beam lithography. The leads are covered by a dielectric layer and then a metal ground plane, so that the electric field from the leads is screened. We describe, here, our technique for fabricating this system and present the numerical computations of the electric fields from the electrodes. Index Terms—Electron, microfabrication, quantum computing.

I. INTRODUCTION

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HE BASIC UNIT of a quantum computer is the quantum bit (qubit), which is a two level quantum system such as a spin 1/2 particle [1]. A variety of physical systems are being developed for use as qubits [2]–[8]. We are developing a system using electrons on the surface of liquid helium for this purpose [9]. An electron is bound to a dielectric surface by the electric field from the induced polarization of the dielectric, the image potential. The potential varies as the inverse of the height of the electron above the surface but there are no constraints on motion in the horizontal plane. Consequently, the energy levels for motion perpendicular to the surface are those of a one-dimensional (1-D) hydrogen atom; see Fig. 1(a). The wave function of the ground and first excited state are shown in Fig. 1(b). Liquid helium has a small dielectric constant (1.057) so that the coefpotential (the Rydberg) is small and the enficient for the ergy difference between the ground state and first excited state is about 120 GHz. There is a high (1 eV) barrier for penetration of Manuscript received April 6, 2006; revised May 31, 2006. This work was supported by the National Science Foundation under Award 0085922 and the U.S. Army Research Office (ARO)/Advanced Research and Development Activity (ARDA) under Award DAAD19-03-R-0011. The review of this paper was arranged by Associate Editor W. Porod. The authors are with the Department of Physics, University of California at San Diego, La Jolla, CA 92093, USA (e-mail: [email protected]; [email protected]; [email protected]; [email protected]; [email protected]). Digital Object Identifier 10.1109/TNANO.2006.880892

the electron into the liquid and the mean position of an electron in the ground state (Bohr radius) is about 7.6 nm above the surface. In order for a quantum logic element to be useful, it must be possible to shift its quantum states in a controlled manner [10]. In our case this is done by adjusting the electric field (Stark shift) on individual electrons to bring them in and out of resonance with applied microwave radiation and with neighboring electron energy levels. For this purpose, we fabricated a pattern of microelectrodes with suitable geometry to allow us to confine single electrons over single electrodes and to vary the Stark shift with the voltage applied to each electrode. Historically, the manipulation of single electrons began with the oil drop experiment by Millikan, which measured differences of charge attached to an oil drop, thereby measuring the charge of the electron [11]. Single electrons have also been held in a Penning trap and detected by cyclotron and spin resonance [12]. One electron quantum dots have been realized in self-assembled, solid-state structures and in small vertical pillars defined by etching [13], also in lateral confined quantum dots defined in a two-dimensional electron gas by surface gates on top of a semiconductor heterostructure [15]. Recently Papa-Georgiou et al. reported a setup for manipulating electrons on a helium surface [16]. Several electrons are trapped above a ring shaped superfluid helium pool, which is 5 m in diameter, 0.8 m deep. A single electron transistor buried underneath the pool was used to detect and count the electrons. To our knowledge, fabrication of a device that can manipulate an array of individual electrons on superfluid helium surface, such as that described here, has not been reported. II. ELECTRON LOCALIZATION The geometry of our electrodes to localize electrons is illustrated in Fig. 2. Our criteria for selecting the geometry include the following. 1) At a horizontal displacement, , between electrodes, the horizontal component of the field, , from each electrode should be at least comparable to the Coulomb field of one electron on its neighbor. This is about 6.4 kV/m at separam. tion, 2) The vertical component of the field, , at the position of the electrons over the column, should be no greater than a few kV/m so that it is about an order of magnitude smaller than 36 kV/m field of the image charge in the helium. 3) The helium surface should be sufficiently far above the top of the columns so that the field of the image charge in the conducting columns is small relative to the field from the

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Fig. 1. Energy levels and wave functions for the ground state and first excited state of electrons on the surface of liquid helium. (Color version available online at http://ieeexplore.ieee.org.)

Fig. 3. Drawing of the electrode structure showing lead wires, insulating layer, ground plane, and electrode columns.

Fig. 2. Schematic diagram of the microelectrode structure. The electrodes are in the form of columns, grown by electroplating onto the ends of the wires. An insulating layer covers the wires and a conducting (Au) layer is evaporated on top of the insulating layer. The electrodes extend above the ground plane to a point 500 nm below the surface of the film.

image charge in the liquid helium. In practice this means that the helium surface must be at least about 0.3 m above the top of the columns for 100-nm-diameter columns and higher for larger diameters. 4) The ground plane must shield the fields from the leads connected to the columns but the field from the image charge of the electron in the ground plane should also be small relative to that from the image of the electron in the helium. This requires that the surface of the helium be at least 0.5 m above the ground plane. 5) The horizontal separation between columns is chosen so that the coupling energy between the vertical degrees of freedom of neighboring electrons is about 1 GHz. This requires a separation that is also about 0.5 m. All of these requirements are approximately satisfied for a geometry using columns with center to center distance about 0.5 m, the top of the columns are 0.3–0.5 m above the ground plane, and the helium film is 0.8–1.0 m thick. Our current design is for a 10 2 array of columns at the center of the chip

Fig. 4. Electron micrograph of a sample of columns separated by 0.5 m, about 1.5 m tall. The columns were grown by electroplating gold onto a gold film, through holes drilled by e-beam lithography.

as shown in Fig. 3. In the following sections, we present the device fabrication techniques, electrostatic field calculations for the column geometries explored, and the proposed experiments using these devices. III. DEVICE FABRICATION An electron microscope picture of a test growth of the columns, on a continuous gold film, is shown in Fig. 4. A photograph of the entire chip, without the ground plane and microstructure, is shown in Fig. 5. On the right and left are the leads for making electrical contact to the electrodes. A ground plane covers these leads exposing only the columns at the center as indicated in Fig. 3. The upper and lower portions are interdigitated lines that form in-plane capacitors that are used to measure the thickness of the helium film. An SEM picture of the fabricated center portion of the chip is shown in Fig. 6.

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Fig. 5. Microelectrode chip without ground plane showing lead wires to electrodes, in-plane capacitance thickness gauges.

Fig. 6. SEM picture of the center portion of a completed electrode chip. The picture is distorted due to charge accumulation but is a realization of the drawing of Fig. 4. The pattern of the lead wires propagates through succeeding layers.

Fig. 7. SEM picture of a larger portion of the center of the completed electrode chip showing the pattern of the e-beam written lead wires propagated through the layers above them.

The electrodes shown in Fig. 6 are about 200 nm in diameter, 1400 nm (maximum) tall with center to center distance of 500 nm. An SEM picture of a broader area of the die, including some of the lead wires is shown in Fig. 7.

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The process begins by depositing an insulating layer of SiO followed by SiN (2 and 0.5 m, respectively) on a silicon wafer by plasma-enhanced chemical vapor deposition (PECVD). The large lead wires fanning in from the contact pads (left and right sides of Fig. 5) and the in-plane capacitors (upper and lower sections) are formed by optical lithography, and liftoff using a stepper operating at 365 nm (Hg i-line) to fabricate nine dies on each 100-mm wafer. In the standard manner for evaporating Au on SiO or SiN, a layer of Ti is evaporated first, to provide adhesion to the SiO . An e-beam resist, ZEP 520A, is then spun onto the wafer and the fine leads at the center of the pattern (Fig. 7) are written with an electron beam. Alignment of the e-beam pattern with the previously deposited outer leads is accomplished via local alignment marks on each die (visible in Fig. 7). Prior to writing with the e-beam, a 10-nm-thick layer of gold is deposited on the resist to prevent charge buildup during the writing process. The e-beam leads have complex zigzag patterns, shown in Fig. 7, so that the dosage is varied from place to place to avoid distortion from the proximity effect. After e-beam lithography, the resist is developed and liftoff performed to obtain the final lead pattern on the substrate. The next steps are deposition of 0.5- m insulating SiN layer over the lead wires, deposition of a metal ground plane, and creation of small rectangular openings in SiN and ground plane layers through which the microelectrodes will be fabricated in the final step. Two slightly different processes are used for these steps. In the first process that we tested, we used a bilayer negative photoresist. The mask exposes the upper and lower triangles of Fig. 5 (the in-plane capacitors) as well as the small openings for the tips of the electrodes (Fig. 7). A single layer resist process is not suitable for sputter deposition of SiN because of side wall coverage during sputtering which makes liftoff impossible. In a bilayer resist process, the under layer is slightly over developed to provide overhang of the top layer. The under layer thickness and the overhang are chosen such that even after depositing a 0.5- m-thick layer over the resist, enough gap between the overhang and the substrate remains to allow solvents to reach the bottom of the resist for liftoff. As the openings in the ground plane and SiN layers are only 1.3 m wide by 5.5 m long, the mask for this exposure requires very accurate stepper alignment using the local marks shown in Fig. 7. The mask is therefore aligned within 0.35 m to provide sufficiently accurate centering of the columns within the openings. Several attempts at alignment were required to achieve this precision. After developing the resist, a 500-nm-thick SiN insulating layer is deposited by magnetron sputtering. Sputtering proceeds at sufficiently low temperature so that it does not harden the resist. SiN was chosen as the insulating material because of its high breakdown voltage and good adhesion to the gold wires. One hundred nanometers of Pt is then deposited for the ground plane without breaking the vacuum. Finally, liftoff removes the SiN and Pt over the in-plane capacitors and leaves the two small openings for the electrodes. Although this process for deposition of the SiN/Pt layer works, several process conditions adversely affected the 1.5 m used process reliability. For the thick bilayer resist here, the process is sensitive to the exposure and baking times for the resist as well as humidity in the lab during development.

PILLA et al.: HIGH ASPECT RATIO MICROCOLUMNS TO MANIPULATE SINGLE ELECTRONS ON A LIQUID HELIUM SURFACE FOR QUANTUM LOGIC BITS

These have a large effect on the small bars of resist that create the small openings in the ground plane. Slight underdeveloping washes away the 5 1.3 m bar of resist that would otherwise leave an opening in the ground plane after SiN/Pt layer deposition and liftoff. However, due to its simplicity and straightforwardness, this process technique will be used for future electrode geometries where the lateral dimensions of the openings in the ground plane are expected to be 10 m. To circumvent the above problems, a second method based on a reliable two-step process for depositing the SiN/Pt layers is developed. In the first step, we deposited a 500-nm SiN layer on the entire wafer using the PECVD process. A thin layer of positive resist is then spun onto the wafer and exposed with the positive mask pattern for the ground plane using the optical stepper. A 100-nm Pt layer is then deposited by e-beam evaporation. Careful local alignment of the stepper is required only for this second step. After liftoff and cleaning, reactive ion etching (RIE) is used to remove the unwanted SiN in the two small ground plane openings and in-plane capacitor regions. In the RIE process using SF and O , no other masks are necessary because the Pt ground layer and the Ti/Au lead wires etch sufficiently slowly to act as a mask. During the RIE etch, the oscillations of the reflection intensity of a laser spectrometer is used to monitor the etch process. Small windows are left open in the Pt layer during e-beam evaporation by placing strips of metal foil in the unused portion of the wafer between neighboring dies. The SiN etch is monitored by shining the laser spot in this widow. The Ti/Au layer underneath the SiN layer limits the etch in this window. When the oscillation of the reflected laser beam ceases, the SiN layer is completely removed. Slight overetching guarantees removal of all residual SiN from the gold e-beam leads. Some etching into the tips of the leads is necessary to ensure good contact to the plating bath for growing uniform gold columns in the plating process described below. Finally the resist and the Pt layer over the rest of the wafer is washed away. The final step is the electroplating process to grow uniform cylindrical columns at the tip of each lead exposed in the ground plane opening. To accomplish this, a layer of PMMA 0.5–0.8 m thick is spun uniformly on to the wafer. The e-beam writer, operating at 50 keV, is then used to write holes through the resist to the ends of the lead wires exposed in the small openings of the ground plane. Due to the capillary action, the resist fills these small openings completely resulting in the desired 1.2–1.4- m thickness where the columns are grown. The best dosage was found, by trial and error to be 1200 C/cm for the columns separated by 0.5 m and yields holes about 200 nm in diameter. The beam is aligned on each ground plane opening on each die using the local alignment marks. The wafers are then diced so that developing of the PMMA and the gold plating are performed one die at a time. In this way, errors in developing or plating times effect only one die rather than the entire wafer. The optimal developing time for the holes is 5 min in MIBK : IPA (1 : 3) in an ultrasonic bath. Overdeveloping or over exposure results in conical shaped electrodes. Underdeveloping or underexposure results in inverted cones so that the attachment to the underlying e-beam leads is weak, and the columns can break away.

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Fig. 8. Overplated columns showing mushroom shape at the top, shorting all electrodes together.

After developing, the dies are immersed in gold plating solution heated to 65 C. A 1-cm test strip is also connected to the anode and immersed in the bath. The total current density is adjusted to 2.5 mA/cm . Typical plating time is 2.5 min. All of the microelectrode leads are shorted together for this process, as shown in Fig. 5, and only the tips of the e-beam leads in the ground plane opening are exposed to the plating solution. The plating time is critical, and it depends on the surface roughness of gold leads which results from the RIE etching and cannot be controlled accurately. Plating for too long overfills the holes, leading to a mushroom shape on top of the columns, which can electrically short all of the columns together (see Fig. 8). Plating for too short a time results in columns that are too short. After plating, prior to removal of the resist, the dies are cut around the edges so as to remove the short circuit between the contact pads. Finally, the resist is dissolved with acetone and washed with IPA, and the resulting columns are examined with an SEM as in Figs. 6, 7, and 8. IV. ELECTROSTATIC FIELD CALCULATIONS The electric fields produced by the electrode configuration of Fig. 3 are numerically simulated using the electromagnetic solver package FlexPDE.1 Fields for some of the geometries were computed using the MAFIA2 package as well. Fig. 9 shows the computed horizontal component of electric field parallel to the row of columns at various heights above them, and the vertical component, at the same locations for a 0.2 V potential applied to the columns. The tops of the columns are 0.3 m above the ground plane and the fields are plotted for three different elevations above the tops. The values computed were for the ground plane at 0 V. These simulated results indicate that at an elevation of 0.3 m above the columns near the center of the array, the peak value of kV/m. For this 1PDE

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Fig. 9. Components of electric field (E , E ) along the surface of the helium (x) for the geometry of electrodes shown in Fig. 4. The fields at three different elevations above the columns are plotted when the columns are biased 1 V. The ground plane, with a 5 1.3 m opening centered about the columns, is held at 0 V. The distance between neighboring columns is 0.6 m. These fields are computed using the MAFIA package. (Color version available online at http://ieeexplore.ieee.org.)

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voltage configuration, the maximum value of will be about 110 kV/m, which is large relative to the maximum desired field of 10 kV/m and would produce a larger Stark shift than is desired. However, a large component can be compensated by applying a uniform field (by forming a parallel plate capacitor between the ground plane and another electrode placed 1 mm from it) to yield the desired Stark field. Although the above geometry is adequate for initial experiments using qubits, a configuration that yields the strongest in-plane confinement (i.e., largest spatial derivatives of , along the axis of each column that localizes an electron) while still allowing adjustment of the electric field in the direction normal to the liquid He surface to desired values is required. A design that accomplishes this is simulated as shown in Fig. 10. The field calculations show that the spatial derivatives of , for this geometry are larger than those obtained for the geometry of Fig. 4 at an elevation of 0.3 m above the columns (not shown). A key improvement resulting from the new geometry is better confinement along the axis. Also, stronger overall confinement allows us to have thicker He films. It should be noted that in Fig. 10, the fields are plotted at an elevation of 0.51 m (ground state) whereas in Fig. 9 they are plotted at 0.25, 0.30, and 0.35 m elevation, respectively. Thicker He films are desirable to minimize the adverse effect of image charges that develop in the metal columns when electrons are localized on the

Fig. 10. Components of electric field (E , E , E ) along the surface of the helium for a body centered square lattice geometry of electrodes shown in the inset. The lattice constant is 0.5 m. The “Position” coordinate is along the x axis of the lattice for E , E field plots while it is along y axis of the lattice for the E field plot. The simulation was performed with the columns at the body centers of 5 lattices held at +0.03 V while the 12 columns at the corners held at 0.03 V. The ground plane, with a 10 10 m opening centered about the columns, is held at 0 V. The plots show the fields at the elevation of the ground state and the first excited states of the electrons when the liquid He level is 0.5 m above the tops of the columns. (Color version available online at http:// ieeexplore.ieee.org.)

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liquid He surface. Additional simulations further demonstrated that the lead wires have no observable effect on the field configuration at the positions where electrons are localized even though the ground plane opening is increased to 10 10 m. As mentioned earlier, the motivation for choosing up to 1.2- m-tall columns was to reduce the adverse effect of the leads on localized electrons. The same optical lithography patterns can be used for this new geometry. Only the final steps in the processing, i.e., the e-beam writing of the small leads and of the columns, will be changed so that the same masks and processing techniques can be used for the rest of the chip. In this design, the columns are arranged in body centered square lattice with a lattice constant of 0.5 m. Electrons will be trapped only over the positively biased columns at the body centers of the lattice. The columns at the corners are biased negative to provide electron confinement in the plane of the liquid He surface. Using the same 0.5- m spacing of the lead wires, this will require that the spacing between qubits be doubled to 1 m. This slows down the swap frequency by a factor of four [9] but it would still be high enough to allow for error correction schemes within the expected relaxation times. V. PROPOSED EXPERIMENTS The first step in the road map to develop multiple qubits using localized electrons on liquid He surface consists of capture and

PILLA et al.: HIGH ASPECT RATIO MICROCOLUMNS TO MANIPULATE SINGLE ELECTRONS ON A LIQUID HELIUM SURFACE FOR QUANTUM LOGIC BITS

detection of single electrons. As a precursor to this first step, we used the shorted columns of Fig. 8 to capture a large number of electrons (several hundred to a few thousand electrons) on the liquid He surface. The pool of electrons were released from the surface when a negative pulse is applied to the columns and a fraction of them are detected using a super conducting transition edge bolometer placed 1.5 mm above the columns. The present detector has a transition temperature of 220 mK. The detector is held at 5 V with respect to the ground plane of the columns chip so that the released electrons are accelerated toward the detector. Further work is underway to improve of the detectors to the detection efficiency both by lowering 100 mK and using better electrostatic models of the sample assembly in order to form an electron microlens and focus electrons onto the detector. We are also working on better regulation of liquid He film thickness. A major unanticipated problem we faced in the present setup is the presence of long wavelength surface waves on the bulk liquid surface that vary the thickness of the He film leading to the loss of captured electrons before their controlled release from the surface with a negative voltage pulse on the columns. To address this problem, we plan to fabricate a 10- m-wide channel around columns by forming 0.8–1.0- m-tall walls on the ground plane. The liquid film thickness in such a channel will be self-regulating because the capillary forces completely fill the channel up to the height of the walls surrounding the channel [17], [18]. The channel also separates the bulk liquid film from the columns region if the bulk level is held well below the columns chip level. A channel of this type will be fabricated by writing the desired rectangular pattern on the ground plane of Fig. 8 using e-beam writer in a PMMA layer and then plating gold similar to the columns fabrication. The work is currently underway to fabricate the channel and the new body-centered columns pattern. We also plan to carry out atomic force microscope (AFM) study to map the electric fields generated by the properly biased columns and compare them with the simulation results. VI. CONCLUSION In conclusion, we have designed and fabricated a microelectrode structure to trap and release single electrons floating on the surface of liquid helium. The ability of the system to manipulate single electrons is indicated by numerically calculated electric fields on top of individual microelectrodes. Physical demonstration of the capability is in progress. ACKNOWLEDGMENT The authors would like to thank B. Thibeault, B. Mitchell, J. Whaley at the National Nanofabrication User Network (NNUN) facility at the University of California, Santa Barbara, for their help and expertise in the design and fabrication of the devices. The initial proof of principle for electroplating the microelectrodes was carried out at the NNUN facility at Cornell University under the guidance of R. Panipucci.

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REFERENCES [1] B. Schumacher, “Quantum coding,” Phys. Rev. A, vol. 51, pp. 2738–2747, Apr. 1995. [2] J. F. Poyatos, J. I. Cirac, and P. Zoller, “Schemes of quantum computations with trapped ions,” Fortschr. Phys., vol. 9–11, pp. 785–799, Oct. 2000. [3] P. Grangier, G. Reymond, and N. Schlosser, “Implementations of quantum computing using cavity quantum electrodynamics schemes,” Fortschr. Phys., vol. 9–11, pp. 859–874, Oct. 2000. [4] D. G. Cory et al., “NMR based quantum information processing: Achievements and prospects,” Fortschr. Phys., vol. 9–11, pp. 875–907, Oct. 2000. [5] I. H. Deutsch, G. K. Brennen, and P. S. Jessen, “Quantum computing with neutral atoms in an optical lattice,” Fortschr. Phys., vol. 9–11, pp. 925–943, Oct. 2000. [6] G. Burkard, H. A. Engel, and D. Loss, “Spintronics and quantum dots for quantum computing and quantum communication,” Fortschr. Phys., vol. 9–11, pp. 965–986, Oct. 2000. [7] B. E. Kane, “Silicon-based quantum computation,” Fortschr. Phys., vol. 9–11, pp. 1023–1041, Oct. 2000. [8] Y. Makhlin, G. Schön, and A. Shnirman, “Josephson-junction qubits,” Fortschr. Phys., vol. 9–11, pp. 1043–1054, Oct. 2000. [9] P. M. Platzman and M. I. Dykman, “Quantum computing with electrons floating on liquid helium,” Science, vol. 284, pp. 1967–1969, 1999. [10] D. P. DiVencenzo, “The physical implementation of quantum computation,” Fortschr. Phys., vol. 9–11, pp. 771–783, Oct. 2000. [11] H. A. Boorse and L. Motz, Eds., The World of the Atom. New York: Basic, 1966, ch. 40. [12] H. Dehmelt, “Experiments on the structure of an individual elementary particle,” Science, vol. 247, pp. 539–545, 1990. [13] P. M. Petro, A. Loeke, and A. Imamoglu, “Epitaxially self-assembled quantum dots,” Phys. Today, vol. 54, p. 46, 2001. [14] L. P. Kouwenhoven, D. G. Austing, and S. Tarucha, “Few electron quantum dots,” Rep. Prog. Phys., vol. 64, pp. 701–736, 2001. [15] J. M. Elzerzman et al., “Few-electron quantum dot circuit with integrated charge read out,” Phys. Rev. B, vol. 67, pp. 161308-1–161308-4, 2003. [16] G. Papageorgiou et al., Counting electrons on liquid helium (preprint) [Online]. Available: http://www.arxiv.org/abs/Cond-mat/0405084 [17] P. Glasson et al., “Microelectronics on liquid helium,” Physica B, vol. 284–288, pp. 1916–1917, 2000. [18] D. Marty, “Stability of two-dimensional electrons on a fractionated helium surface,” J. Phys. C, Solid State Phys., vol. 19, pp. 6097–6104, 1986.

S. Pilla received the B. S. and M. S. degrees in physics from the Indian Institute of Technology, Kharagpur, in 1990 and 1993, respectively, and the Ph.D. degree in physics from the University of Florida, Gainesville, in 1999. Until 2003, he worked as a Postdoctoral Associate, first at the University of Florida and later at the University of California, San Diego. He is currently a Project Scientist in the Department of Physics, University of California, San Diego. He is a coauthor of 15 scholarly publications. His research interests include quantum computing, development of next generation lithography techniques, wide-field electron optics, coherent terahertz wave generation with > 100 W output power, development of high-gain, high-bandwidth, semiconductor-based electron detector arrays, and development of novel electron microscopy techniques.

X. C. Zhang received the M. S. degree from the Chinese Academy of Sciences in 1996 and the Ph.D. degree in physics from the Physics Institute, University of Wuerzburg, Germany, in 2002. From 2002 to 2003, he was a Postdoctoral Researcher in the Department of Physics, University of California, San Diego. Currently he is a Postdoctoral Research Scholar at the University of California, Los Angeles. His scientific interests include nanofabrication, cryogenic STM, and transport on semiconductor quantum dots.

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Brian Naberhuis received the B.S. degree in physics and computer science from the University of California, Santa Barbara, where he did research on pattern formation in fluid convection. He is currently working toward the Ph.D. degree in physics at the University of California, San Diego.

Alex Syshchenko was born in 1973 in Ukraine. He received the Ph.D. degree in physics from Charles University, Prague, Czech Republic, in 2002 with a thesis on anomalous phenomenon connected with the phase transitions in intermetallics. He joined Prof. J. Goodkind’s Low Temperature Physics Group, University of California, San Diego, in 2002. Currently his work is devoted to the development of the system of electrons floating on the surface of liquid helium for their use as quantum logic gates for a possible quantum computer.

J. M. Goodkind is with the University of California, San Diego. He developed the first system for adiabatic demagnetization of nuclei that cooled materials to temperatures to 100 K. He developed the superconducting gravity meter that provides the best signal to noise ration for long term measurement of gravity at the surface of the earth. It is used for geophysical measurements and for fundamental experiments in gravitational physics. He has made fundamental measurements of the properties of solid Helium that discovered a new phase transition that appears to involve a new state of matter, a solid with some of the properties of a superfluid. Recently he has worked on using electrons on the surface of liquid helium as quantum logic bits.