IEEE BCTM 8.2

High-Q integrated RF passives and micromechanical capacitors on silicon J.T.M. van Beekl, M.H.W.M. van Delden’, A. van Dijken’, P. van Eerd’, M. van Grootel’, A.B.M. Jansman’, A.L.A.M. Kemmeren’, Th.G.S.M. Rijks’, P.G. Steenekenl, J. den Toonder’, M. Ulenaers’, A. den Dekker’, P. Lok’, N. Pulsford’, F. van Straten’, L. van Teeffelen’, J. de Coster3, R. Puers3 (1) Philips Research Laboratories, Prof. Holstlaan 4, 5656 AA Eindhoven, The Netherlands tel: +3 1-40-2742141, fax: +3 1-402743352, e-mail: [email protected] (2) Philips Semiconductors, Gerstweg 2,6534 AE Nijmegen, The Netherlands

(3) Katholieke Universiteit Leuven, Dept. Electrical Engineering ESAT-MICAS, Belgium Abstract. The PASSIm technology platform is described for the integration of low-loss inductors, capacitors, and MEMS on high-ohmic Si substrates. Using this platform the board space area taken up by e.g. impedance matching circuits can be reduced by 50%. The losses of passives induced by the semi-conducting Si substrate can effectively be suppressed using a combination of surface amorphisation and e-beam irradiation. The incorporation of MEM tuneable capacitors in high-Q inductor-capacitor networks is demonstrated. I. INTRODUCTION Integration of passive components and MEMS in RF front-end modules is one of the key enablers for RF front-end miniaturization, while improving its RF performance at the same time. The integration of on-chip passive components along with active elements has been hampered by the low qualityfactor Q, especially for inductors, that can be achieved in today’s CMOS and Bipolar technologies. Furthermore, it is doubtful whether onchip integration of passive networks can be done in a cost effective manner due to their large size. An alternative for the on-chip integration of passives is the system-in-module approach [I]. Using this approach the passives are integrated on a chip using a dedicated technology, which is then combined with active IC’s in a modular fashion. In this way, technologies and processes can easily be mixed and matched leading to an optimum in terms of transceiver performance, cost, and size. An illustrative example of this approach, described in this paper, is the integration of passives on an insulating or high-ohmic substrate using a dedicated, CMOS compatible, thin film process. The inductors and capacitors made in this fashion have much higher Q-factors and are made more cost-effective

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than the same type of passives that can be made onchip using today’s CMOS or Bipolar processes. Preferably, high-ohmic silicon instead of an insulating substrate is used, since a very wide manufacturing infrastructure exists for processing Si wafers. Within Philips, the so-called PASSIM process is developed for the integration of high-Q inductors and capacitors on high-ohmic silicon using this system-in-a-module approach [ 1,2]. A next step in the integration of passives would include the integration of (MEMS-) switches, filters, resonators, and tuneable capacitors [3]. This will lead to a further decrease of the RF module size and will improve the performance of RF systems, such as Power Amplifiers, Low Noise Amplifiers, and Voltage Controlled Oscillators. Especially, the integration of MEMS capacitors and switches together with high-Q inductors and capacitors into a single technology is advantageous for several applications. For example, incorporating MEMS tuneable/switchable capacitors in impedance matching circuits will allow for low-loss adaptive impedance matching [4]. Also, the replacement of semi-conducting vari-caps by tuneable MEMS will increase the linearity and the Q-factor of tuneable LC tanks. Another example is the implementation of low-loss true-time delay phase shifters using distributed MEM co-planar waveguides [5]. Therefore, PASSIM is an obvious technology platform for the incorporation of high-Q inductors and capacitors, as well as MEMS switches and tunable capacitors. In this paper, the PASSIm technology is benchmarked against conventional SMD technology. Losses of capacitors and inductors that are induced by the high-ohmic Si substrate, are discussed and benchmarked against the same passives processed on an insulating substrate and low-ohmic silicon. Several methods for further improving the Q-factor of the passive circuit through substrate modifications are

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IEEE BCTM 8.2 discussed. A distinction is made between interfaceand bulk induced losses. Interface losses can effectively be suppressed using ion implantation. Bulk losses are suppressed by the introduction of lattice defects by irradiating the wafers with high energetic electrons. The "add-on" process extension to include MEMS tunable/switchable capacitors, as well the erformance of MEMS capacitors realized in PASSIThPis discussed.

board space reduction of 30%. On the left, the same functionality is shown, but now using a flip chipped PASSIn' die. In this way, the technology enables a further reduction of occupied board space by approximately 50%.

11. RF FRONT-END MINIATURIZATION

USING P A S S I TECHNOLOGY ~ The PASSIm process is a technology platform in which the electrical performance, cost of manufacturing, and the process compatibility to existing IC manufacturing infrastructure are considered simultaneously. For this reason a material system is chosen that is fully compatible with existing IC manufacturing. High ohmic Si @ > 4 kQ.cm) is used instead of "normal" Si @ - I S c m ) in order to suppress substrate induced ohmic losses and stray capacitance. The process starts with the thermal oxidation of a Si wafer. On top of the oxide a stack consisting of 3 aluminum layers is deposited. The A1 layers are separated by silicon nitride and silicon oxide dielectric layers, as is shown in Fig. 1.

Fig.2 A dual-band PA module incorporating PASSIT"' for the integration of output impedance matching and diplexing circuitry.

Fig.3 Size comparison of a impedance matching circuit realized using a flip-chipped and wirebonded PASSITMdie, and a SMD solution. \

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111. LOSS-MECHANISMS IN PASSITM

Fig. I Cross-section of PASSITu technology MIM capacitors are defined by the two bottom AI layers, which are separated by a PECVD silicon nitride dielectric. The top AI is several microns thick and has therefore a very low electrical resistance. This AI layer is used for defining inductors with a high-Q factor . The PASSIm process is used for the integration of e.g. impedance matching networks and diplexers. Fig.2, shows a Philips PA52 dual-band GSM-DCS power amplifier module in which these functions are incorporated in PASSIm technology. A PASSI" impedance matching circuit is benchmarked to illustrate the level of miniaturization that can be achieved using this integration technology. Fig.3 compares three different implementations of a 1Q to 50Q impedance matching circuit. On the right, a conventional impedance matching circuit is shown consisting of SMD capacitors mounted on a LTCC board. In the middle, the same functionality is realized using wire-bonded PASSIN chip leading to a

Even though high-ohmic Si is used as a substrate material, the semi-conducting nature of Si will in principle deteriorate the performance of capacitors and inductors that are processed on top. The mechanism of substrate loss can be understood by considering the simple model depicted in Fig.4.

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From this model it can be understood that for capacitors substrate losses are dominating at low

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IEEE BCTM 8.2 frequencies, while losses start to dominate at high frequencies for inductors. The substrate induced losses can be split in bulk induced losses and losses that are induced at the Si-Si02 interface. Under zerobias conditions an accumulation layer exists at the SiSiOz interface, induced by e.g. fixed charge normally present in thermai silicon oxide. From CV measurements it is deduced that the amount of accumulated charge is about an order of magnitude larger than the total amount of mobile charge present in the bulk of 4 k B c m Si. Therefore, it is clear that, next to the bulk resistance, the interface resistance associated with this accumulated charge is significantly influencing the loss of the passives processed on top. The low resistance at the Si-Si02 interface can be increased by making the top surface of the Si substrate amorphous, thereby decreasing the carrier mobility. In our case, this is achieved using ion implantation of e.g. Ar or N after growing the thermal oxide and before deposition of the first Al layer 161. The influence of the interface amorphisation on the inductor Q-factor is shown in Fig.5 for different bulk resistivities.

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radiation or particles such as ions, and neutrons [7]. In this work, the effectiveness of high-energy electrons is investigated for the reduction of hirlk substrate loss. The irradiation is a low temperature process and can therefore be carried out after the PASSIT” layer stack is deposited and structured. A Van-de-Graaf accelerator is used which produces an electron energy o f 3 MeV at a flux of 1 . 5 4 ~ 1 0 ”e.cm-2.s-l.ProcesseP wafers are irradiated with a dose of 1.4XIO” e.“*, which corresponds to irradiation time of 15 min. The change in equivalent series resistance (ESR) of PASSIT“ capacitors is used as a measure for the change in substrate resistance, see Fig.6.

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Fig. 6 ESR of a 3 pF capacitor on high-ohmic, ionimplanted, and e-beam irradiated Si. For after comparison the same capacitor is processed on glass.

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For comparison, the ESR is plotted of the same capacitor processed on a glass substrate. From Fig.6 it

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can be seen that the ESR after e-beam irradiation has reduced by about the same magnitude as is achieved using interface ion-implantation. The ESR is further lowered when combining the e-beam irradiation with the interface ion-implantation. As expected, this clearly shows that the irradiation is complementary to the implantation. Fitting these data with the model depicted in Fig.4 show that the effective substrate resistance is increased by a factor 10.000 (!) compared to “un-treated“ high-ohmic silicon. After ebeam irradiation the leakage current of the MIM capacitor is not changed significantly.

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Fig.5 Q-factor of a 5 nH inductor processed on silicon of different specific resistivif?i, before and after N implantation.

In this case the interface amorphisation is accomplished using a I20 keV N ion implant with a dose of 3.8XIOl4 It can be seen that a significant improvement of inductor Q is obtained for the highohmic Si ( p - 4 kQ..cm) used in PASSITv. The increase in inductor Q is almost absent for bulk resistivities < IkQ.cm. For substrate resistivities below IkQcm the bulk induced losses clearly dominate over the losses that are induced at the SiSi02 interface. A further suppression of substrate losses is achieved though the introduction of lattice defects in the bulk. By creating localized energy states within the band-gap of Si mobile charge is trapped and, as a result, the specific resistivity is increased. Permanent damage to the crystal lattice can be achieved using high-energy (E > 1MeV) beams of electro-magnetic

IV. PASSIT“ PROCESS EXTENSION FOR MEM CAPACITORS Two types of MEM capacitors are fabricated in the PASSITMprocess. The first type is manufactured by locally removing the PECVD silicon oxide layer underneath the third AI top layer. In this way, an air gap is created above the PECVD nitride layer. The second type of MEM capacitor is created by removing both dielectric layers between the first and the third AI layer resulting in an air gap of 1.5 p.In the “type 11” devices the capacitor dielectric is formed by the AI-oxide layer that is covering the top- and bottom electrodes. Fig.7 shows a SEM picture of such

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IEEE BCTM 8.2 a “type 11” device and Fig.8 shows a CV measurement for a temperature compensated “type 11” device [SI.

The PASSIT” process flow can be extended to include MEMS tuneable/switchable capacitors. The incorporation of MEMS into passive networks allows for the implementation of various low-loss adaptive networks, such as adaptive impedance matching circuits, tank circuits, and delay lines. A “Type 11” MEM capacitor is demonstrated with a switching voltage of 4.8V, using AI-oxide as the capacitor dielectric when the beam is pulled down. To our knowledge, the “type 11” device is the first demonstration of an aluminium MEM capacitor in which AI-oxide is used as a dielectric layer separating both electrodes when the capacitor is closed. The dielectric reliability of the native AI-oxide is still under investigation.

Fig.7 A SEM micrograph of a “type II” MEM capacitor.

VI. ACKNOWLEDGEMENTS Special thanks to Marinus Hom from the “Interfaculty Reactor Institute” (IRI) at the TU Delft for performing the e-beam irradiations. The work on MEMS is supported by the EU in the framework of the IST project MEMS2TUNE.

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IX. REFERENCES

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Fig.8 CV measurement for a “Wpe II” MEM capacitor. It can be seen that the AI-oxide that electrically separates the freestanding electrode from the bottom electrode can withstand voltages up to 6V without dielectric breakdown. Currently, the dielectric reliability of the native AI-oxide is under investigation. V. CONCLUSION

Using the PASSIT“ process a platform is created for the integration of high-Q factor inductors, capacitors, and MEM ca acitors The replacement of SMD’s by a PASSI’ chip ‘ i n e.g. GSM/DCS impedance matching circuits leads to a board space area reduction of up to 50%. The loss of passives processed on high-ohmic Si can for a large part be attributed to dissipative currents induced in the silicon substrate. Two loss mechanisms can be distinguished: interface losses and bulk losses. Interface losses can effectively be reduced by making the Si-Si02 interface amorphous using ion-implantation. A further loss reduction is accomplished by irradiating the wafer with high energetic electrons, hereby creating traps in the bandgap. Using both techniques the effective substrate resistance can be increased by a factor 10.000.

[ I ] N. Pulsford, “Passive Integration Technology, Targeting small and accurate RF parts”, RF Design magazine, Nov. 2002 [2] J.T.M. van Beek, M.H.W.M. van Delden, A.B.M. Jansman, A. Boogaard, A. A.L.A.M. Kemmeren, N. Pulsford, A. den Dekker , “The integration of RF passives using thin-film technology on high-ohmic Si in combination with thick film interconnect”, Proceedings IMAPSZOOI , Baltimore, Oct. 2001. [3] H. Tilmans, W. de Raedt, E. Beyne, “MEMS for wireless communications; From RF-MEMS components to RF-MEMS SIP”, MME’02 workshop, Oct.2002 [4] Th.G.S.M. Rijks, J.T.M. van Beek, M.J.E. Ulenaers, J. de Coster, A. den Dekker, L. van Teeffelen, “Passive Integration and RF MEMS; a toolkit for adaptive LC circuits”, ESSIRC 2003 [ 5 ] N. Barker, M. Rebeiz, “Distributed MEMS true-time delay phase shifters and wide-band switches”, IEEE Trans. Microwave Theory, V46, No. 11,1998 [6] A.B.M. Jansman, J.T.M. van Beek, M.H.W.M. van Delden, A.L.A.M. Kemmeren and A. den Dekker “Elimination of accumulation charge effects for HiphResistive Silicon Substrates”. ESSDERC 2003 [7] Mangiagalli et al., “A comparative study of radiation damage on high resistivity silicon”, Eur.Phys.J. AP 6, p.121-130 (1999) [8] Nieminnen, H. et al. 2001, European Patent Application 01660182.5-2203

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