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Code No: NR311002

III B.Tech I Semester Supplementary Examinations, November 2005 ELECTRONIC EQUIPMENT DESIGN (Electronics & Instrumentation Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ?????

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1. Derive the reliability function of a parallel - series system using neural networks. From the result obtained, obtain the back propagation galient Vs training epoch graph and the density distribution function. [16] 2. Differentiate between logic timing analyzer and logic state analyzer. Give the details of the controls in a typical logic analyzer. [16]

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3. (a) Discuss the advantages of electronic weighing system over mechanical weighing system. (b) Explain any two applications of each type.

[8+8]

4. (a) What is meant by conductively coupled interference? How does it affect the readings of the instrument? How can this be eliminated? (b) When both temperature and pressure changes, how is the instrument’s performance affected? How can they be eliminated? [9+7]

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5. Write about PCB layout check related (a) General Consideration

(b) Mechanical considerations (c) Electrical considerations.

[4+6+6]

6. Explain about following basic process for double sided PCB’s (a) Pattern plating process. (b) Tenting process.

[8+8]

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7. (a) Draw the schematic diagram of magnetic amplifier with a center tapped transformer and D.C. output and explain its operation. (b) Explain the automatic control of power output of a d.c.generator using magnetic amplifiers with the help of a circuit diagram. [8+8]

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8. Explain the following testing methods for testing inductors and transformers (a) Ohmmeter testing

(b) Voltmeter testing (c) Resonance method of testing.

[16]

????? 1 of 1

NR311002 III B.Tech I Semester Supplementary Examinations ...

(a) Pattern plating process. (b) Tenting process. [8+8] · 7. (a) Draw the schematic diagram of magnetic amplifier with a center tapped trans- · former and D.C. ...

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