Outline: ATPG for stuck at faults l
Deterministic, Fault-Oriented ATG ♦ ♦ ♦
l
Random ATG ♦ ♦
l
D-Algorithm PODEM FAN
Weighted random RAPS
Test Compaction
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D-Algorithm l
Roth (1966) proposed a D-algebra and a deterministic ATG algorithm. ♦ ♦
D: good value 1 / faulty value 0 D: good value 0 / faulty value 1 5-valued algebra: VG / VF 0/0 1/1 1/0 0/1 -/X,X/-
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0 1 D D X University of Toronto
D-Algorithm: 5-Valued Operations A B
C
1 D
D
1 D
D
X D
X
A 0 1 1 X D 1 1 D D D
B 0 1 X 1 1 D D 1 X D
C 0 0 1 X X D D D D X D
AND 0 0 0 1 0 D 0 D 0 X 0
1 0 1 D D X
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D 0 D D 0 X
D 0 D 0 D X
X 0 X X X X
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Fanout-Free Circuit m s-a-1 X no conflicts with implications or justifications
l
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Test for m s-a-1 in a fanout-free circuit ♦ begin s set all lines to X; s Justify (m, 0); // activate the fault s Propagate (m, D); ♦ end
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Justify Justify d=0 a b c
d=0 select one i of {a,b,c} & justify i=0
a b c
a b c
d=0 justify (a=0) justify (b=0) justify (c=0) d=0 justify (a=1)
a b c
a a b c a b c
d=0 justify (a=1) justify (b=1) justify (c=1) d=0 select one i of {a,b,c} & justify i=1
Justify d=1 d=1 justify (a=1) justify (b=1) justify (c=1) d=1
a a b c a b c
select one i of {a,b,c} & justify i=1 d=1 justify (a=0) d=1 select one i of {a,b,c} & justify i=0 d=1 justify (a=0) justify (b=0) justify (c=0)
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Propagate (a, D) Propagate D on line a a b c a b c b D
a c ECE 1767
a1
D
d
D
d
d
a2 e
justify (b=1) and justify (c=1) justify (b=0) and justify (c=0) select one path i ∈ {a1,a2} Propagate (i, D)
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Test Generation g
a
g/0 X
f i d e h c b Set g=1 justify (g=1) justify (a=1), justify (f=1) justify (d=0), --> justify (c=0) propagate (g, D) justify (h, 0) --> select one, justify (e=0) --> justify (c=0) ECE 1767
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Test Generation l l l
What if we make “wrong” selection (decision)? What if justify (a=1) fails? What if propagate fails?
g
a
g/1 X
f i c b ECE 1767
d e
h
Set g=0 justify (g=0) select f --> justify (f=0) justify (d=1) justify (c=1) propagate (g, D) justify (h, 0) select e justify (e=0) justify (c=0) X University of Toronto
Backtracking l
Conflicts can occur in circuits with fanout and reconvergence. ♦ ♦ ♦
♦
If a decision causes inconsistency, then we need to backtrack. A backtracking strategy is simply a systematic exploration of all decisions (choices). Conflict/inconsistency/contradiction s An already-assigned value is different from the value implied by the last decision. Bounding conditions s There is no D left in the circuit. s The fault is not excited. s Lookahead indicates that a D cannot propagate.
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Choice in D-Propagation d
a b c
G2
G5 D
G1
X
choice
s-a-1 G6
G3 e
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f1
G4
f2
d
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Choice in Line Justification a b
k
c d
l
choice q 1
m n
r 1 o
e f h
1
s
D
p X
s-a-1 D
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General Test Generation Algorithm l
l
Procedure Imply_and_check() implies and checks for inconsistency. Procedure Solve() is a generic branch-andbound procedure. ♦
AND-OR search strategy. set of problems that must be solved {a, b, c} AND solve a
choice {a1 OR a2 OR a3} solve a1 solve a3 AND {x, y} {f, g, h} AND solve x Failure Failure Success Success Success ECE 1767
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