http://prince.parihar.googlepages.com/home

RAJ KUMAR SINGH PARIHAR Ph: 408-823-5470 701/3, 1st Main Road, Domlur Layout, Bangalore, KA - 560 071, INDIA Ph: +91-9916510638 Email: [email protected], [email protected]

HIG – 61, Bharhut Nagar, Satna, MP – 485001, INDIA Ph: +91-7672-228057, +91-9425885593

Objective Pursue graduate studies and research leading to a PhD in Computer Architecture

Area of Interest   

Multiprocessor Architecture and Parallel Processing Application Specific Processor and Embedded System Design Hardware/ Software Co-Design and Operating Systems

Education B.E. (Honors), Electrical & Electronics Engineering Birla Institute of Technology & Science, Pilani, India

CGPA: 8.48/ 10.00 June, 2006

Higher Secondary Examination, (10+2) Standard Sarswati Higher Secondary School, Satna, India

Marks: 94.9 % March, 2002

Test Score(s) GRE (CBT): TOEFL (iBT):

Verbal – 470/800 Listening – 26/30 Total – 103/120

Quantitative – 730/800 Writing – 28/30

AW – 3.5/6 Reading – 26/30

Total – 1200/1600 Speaking – 23/30

Relevant Coursework       

VLSI Architecture (RISC, CISC, and DSP) Digital Electronics & Computer Organization Electronic Devices & Integrated Circuits Microprocessor Programming & Interfacing Analog & Digital VLSI Design Microelectronic Circuits Analog Electronics

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Communication Systems Circuits & Signals Image Processing Optimization and Operation Research Data Structures and Algorithms Probability and Statistics Operating System (Informal)

Talk and Workshop(s)    

Assisted participants during hands-on-session in “National Workshop of VLSI Design and Embedded System” (NWVDES) organized by BITS - Pilani, March – 2006. Co-presented “Universal Serial Bus” (USB) classes and assisted in hands-on-session of “Microchip US MASTER# Conference”, Phoenix, USA, August – 2007. “Featherweight Computing and Efficient Electronic Book Implementation”, Talk delivered at Microsoft Research India, Bangalore, December – 2005. “Digital Design using VHDL”, Talk delivered at Central Electronics Engineering Research Institute – Pilani, June – 2004.

Academic and Professional Experience Cypress Semiconductor, Bangalore Feb 08 – Present Applications Engineer Working in Data Communication Division (DCD), job responsibilities include Reference Design using PSoC devices, Handset Connectivity solution using West Bridge Chipsets, Conducting internal and external training programs and building Industry and University relationships. Microchip Technology Inc, Bangalore June 06 – Feb 08 Applications Engineer Working in Advance Microcontroller Architecture Division (AMAD), job responsibilities include silicon validation of PIC microcontrollers, USB device firmware and driver development, ZigBee - MiWi application development Birla Institute of Technology and Science, Pilani Jan 06 – June 06 Professional Assistant Appointed by Electrical & Electronics department for course “Analog and Digital VLSI Design”, Conducted lab sessions and tutorial classes for students enrolled in VLSI courses Microsoft Research India, Bangalore July 05 – Dec 05 Research Intern Hired by “Trends in Emerging Market” (TEM) group; Prototyped hardware using FPGA and developed prototype of featherweight computing devices i.e. electronic book and touch pads Birla Institute of Technology and Science, Pilani Jan 05 – June 05 Professional Assistant Selected by Electrical & Electronics department for “VLSI CAD Lab”, Conducted lab sessions, assignments for several students registered under VLSI Design courses and labs Central Electronics Engineering Research Institute, Pilani May 04 – July 04 Intern Worked with “VLSI Group”, Simulated and synthesized digital circuits and basic building blocks using VHDL hardware description language

Projects 1.

Design, Synthesis and Implementation of 16-bit RISC Processor using VeriLog HDL BITS - Pilani and CEERI – Pilani; (Jan – May 2006) This project work includes designing of 16-bit RISC processor and modeling of its components using VeriLog HDL. Complex blocks i.e. memories, register file, and control logic had been modeled using behavioral approach, whereas simple blocks i.e. adders and arithmetic logic unit have been implemented using structural approach. A new architecture was proposed for efficient cache implementation. Simulation of design was done using ModelSim and synthesis in Leonardo Spectrum. Design was implemented on Cyclone EP1C6Q240C FPGA device from ALTERA.

2.

Design and Synthesis of 16-bit Arithmetic and Logic Unit BITS – Pilani; (Feb – April 2006) This project was a part of lab activities in a graduate level course - “VLSI Architecture”. Modeling of ALU was fully structural with minimum number of logic gates and minimum delay. Semi custom layout of this design has been developed using AMI05 standard cell library. Tools used in this project work were ModelSim (Digital Simulation), Leonardo Spectrum (Digital synthesis) and IC station (semi custom layout).

3.

Efficient Floating Point 32-bit Single-Precision Multipliers Design using VHDL CEERI – Pilani and BITS – Pilani; (Jan – May 2005) These lab-oriented activities had been carried out into two parts. First half emphasized efficient representation of floating-point using IEEE-754. Later half addressed simulation, synthesis and performance comparison of various multipliers’ architectures using mentor graphics tools - ModelSim and Leonardo Spectrum. In the end, comparison and analysis were done for various types of multipliers and their pros and cons were stated.

4.

CRC and MAC unit Design of ZigBee Network Processor for Low Power Applications BITS – Pilani; (March – May 2006) 16-bit Cyclic Redundancy Check (CRC) generator module and Medium Access Layer (MAC) unit have been coded using VeriLog HDL for ZigBee low power network processor. These two units were integrated with standard RISC CPU architecture in order to reduce the software overhead of network processor. This project won second prize in the Intel Higher Education Competition - IISRC 2006.

5.

Digital Simulation of Basic Building Blocks in VHDL CEERI – Pilani; (May – July 2004) This lab-oriented project dealt with study and behavioral simulation of digital electronic circuits and basic building blocks i.e. multiplexers, decoder, latches, and flip –flops, elements of a more complex and complete digital systems. Description and RTL of these blocks had been written using VHDL.

6.

4-bit Structural Multiplier Design and Layout in Tanner Tool VLSI CAD Lab at BITS - Pilani; (Jan – March 2005) This short project had been carried out using various design flow in Tanner tool. Schematics were drawn in S-Edit and simulation results were obtained using T-Spice. Final layout was created Using LEdit. I/O s had been taken from standard libraries.

7.

Design of a Differential Two-Stage CMOS Op-Amp for High Gain, High Bandwidth Applications BITS – Pilani; (Jan – June 2006) In this project, design and implementation of a two stage fully differential, RC Miller compensated CMOS operational amplifier had been done. High gain enables this circuit to operate efficiently in a closed loop feedback system, whereas high bandwidth makes it suitable for high speed applications. Implementation has been done in 0.18 um technology using libraries from tsmc with the help of tools from Mentor Graphics and Cadence. Designed Op-amp exhibits >95 dB DC differential gain, ~135 MHz unity gain bandwidth, phase margin of ~53o, and ~132 V/uS slew rate for typical 1 pF differential capacitive load.

8.

Prototyping of Reprogrammable Featherweight Electronic Book for Rural Education Microsoft Research India, Bangalore; (July – Dec 2005) This project was an attempt to explore the possibilities and new dimensions in the field of “Trends in Emerging Markets”. Development and deployment of featherweight computing devices i.e. electronic books and smart computational toys for rural development was the theme of the project. The content of book was able to provide an efficient user-friendly awareness about the education, health and technologies. Prototype of design was robust, reprogrammable and cost effective.

9.

80x86 Microprocessor based Elevator Control System Design BITS – Pilani; (Jan – March 2004) In this class room project an elevator system, with ‘n’ floors and users’ preferences, was implemented using 8086 microprocessor kit. Interfacing of stepper motor and other input, output devices i.e. keypad and display panel was done. Dedicated I/O s port chips i.e. 8255 and 8257 were used in order to interface the keypad and display panel.

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Project reports, presentations, source code and other information related with these above projects are available at http://prince.parihar.googlepages.com/resources

At Microchip Technology Inc 1.

Validation of EUSART and USB module of PIC18F4450 revision A4 (Aug - Oct 2007) Secondary responsible application engineer for silicon validation of new revision of device PIC18F4450, which is a high – performance USB microcontroller with nanowatt technology; Revision A4 tries to address all bugs of previous version of same device. Enhanced Universal Synchronous Asynchronous Receiver and Transmitter (EUSART) and Universal Serial Bus (USB) module were validated.

2.

Enhanced Multimedia Keyboard Design using Microchip USB Stack and PIC Microcontrollers (Dec 06 – Feb 07) This project dealt with implementation of Universal Serial Bus (USB) keyboard with enhanced features using Microchip’s USB firmware framework. Firmware incorporates QWERTY keyboard function, multimedia volume control and system power management functionalities along with Application Launch (AL) functions. Design has been implemented using Human Interface Device (HID) class in a composite USB device manner with consumer control application. Software: MPLAB IDE, C and C++, Hardware: MUC PIC18F4550 An application note on same would be available soon on www.microchip.com

3.

Validation, Application and Library development for Streaming Parallel Port (SPP) Module This peripheral integrates the concept that a module can connect directly to the USB interface with data streamed to/from an external buffer without CPU support. SPP provides a high-speed interface for moving data to and from an external system. SPP module’s validation was done for CPU and DMA mode. A library has been developed in order to communicate to this peripheral. High speed data logging system, approx 8 Mbps speed, using USB Isochronous transfer has been developed. Software: MPLAB IDE, C++ and C Hardware: MUC PIC18F4550 Technical brief notes on “Isochronous USB Transfer” and “SPP application” are in the process of getting published.

4.

Designing Wireless USB Keyboard and Mouse with MiWi Protocol and PIC Microcontrollers Wireless PC peripherals have become very popular in recent times. The Idea presented here can be extended for plenty of applications including home controlling, building automation, and PC peripheral development. MiWi is Microchip’s proprietary wireless protocol which follows IEEE 802.15.4 specifications for PHY and MAC layers. USB and MiWi firmware stack were integrated into one in order to make the device capable of capturing wireless data and sending to PC over USB. Software: MPLAB IDE, C Programming Hardware: Microcontrollers - PIC18F4550 and PIC18F4520, 2.4 GHz RF radio chip - MRF24J40 An application note on same would be available soon on www.microchip.com

5.

Temperature Monitor and Alarm System This system monitors temperature of ambience and informs when the temperature exceeds beyond a certain limit. TC74 is used to measure ambient temperature which is a serial digital thermal sensor by Microchip. PIC and TC74 communicate using SPI interface of MSSP module. Software: MPLAB IDE, PIC Assembly language Hardware: Microcontroller - PIC18F4520 and Temperature Sensor - TC74

Computer Skills Languages:

VLSI CAD Tool:

Programming languages - C, C++ and Visual Basic Hardware description languages - VHDL and VeriLog Assembly language - 80x86, 8051, MIPS, PIC and AVR microcontrollers ModelSim, Leonardo Spectrum, Precision Synthesis by Mentor Graphics ISE Web pack Analysis and EDK, Impact, ChipScope by Xilinx PSPICE, orCAD, Design Architect – EldoSPICE, IC-Station Virtuoso -full custom Layout, Schematic composer and Spectre by Cadence

Simulation Tool:

Platforms:

Magma for Digital Design: Synthesis, Logic analysis, Timing analysis, Floor planning, Power analysis & Routing MATLAB: Control System, Signal & system, Image processing, Communication Toolbox MASM: 8086-microprocessor programming and simulation environment MPLAB IDE: PIC Microcontrollers’ integrated development environment Windows (9x, NT, 2000, XP) and MSDOS; UNIX and Sun Solaris

Academic Activities and Participations:  

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Represented Microchip Technology and demonstrated TCP/IP demo projects in “Embedded System Conference”, Bangalore, October – 2007. Presented “The Complete VLSI Design Flow” starting from design specifications, design entry using HDLs, simulation, synthesis and implementation on FPGA chips using Mentor Graphics and Xilinx tool in APOGEE* – 2005. Conducted Bread Storm – a digital design competition and MATLAB competition and “Analog and Mixed Signal Design Competition” on behalf of Electrical and Electronics Engineering (EEE) association in APOGEE – 2005 and 2006. Contributed in “Virtual India” online map project at Microsoft Research lab, where rectification of place-names, over 2000 words, in Devanagari script was required. Mentored “VLSI Student Group” - a group of sophomore students, in Electrical & Electronics department for three semesters.

Honors and Awards      

3rd rank holder in course “Analog and Digital VLSI Design” among 160 students. Recipient of “Institute Merit- Cum- Need” scholarship from BITS during throughout graduation. State Board Topper in Higher Secondary Examination -2002 conducted by MP Board among over 2 hundred thousand students. Qualified the state engineering examination MP-Pre Engineering Test in year 2002. 1st place in national competition of “Essay Writing” conducted by “Vidya-Bharti” in year – 1998. Received “JAI PRAKASH Scholarship” by Jai Prakash Sewa Sansthan in year 2002.

Extracurricular Activities     

Placements Volunteer, EEE Group, BITS - Pilani Senior Member, Electrical and Electronics Engineering Association Executive Committee Member, SANGAM – A Cultural Association Member, Hindi Drama Club Member, Hindi Press Club

Jan 2006 – May 2006 Jan 2006 – May 2006 Aug 2003 – May 2004 Aug 2002 – May 2003 Aug 2002 – Dec 2003

Reference(s) 1. 2. 3. 4.

Dr. Chandra Shekhar, Director, Central Electronics Engineering Research Institute – Pilani , India [email protected], [email protected] Dr.(Mrs.) Anu Gupta, Assistant Professor, Electrical & Electronics Engineering, BITS – Pilani, India [email protected], [email protected] Dr. Kentaro Toyama, Assistant Managing Director, Microsoft Research India, Bangalore [email protected] Mr. Rawin Rojwanit, Principal Application Engineer, Microchip Technology, Chandler, AZ, USA [email protected]