5

4

Clock and Distribution

Power input and linear regulators

3v3

U6

4

VDD

1

Output

Standby

GND

4 1 2

2

Decoupling & Power Bank

1

VCC IN GND

3 5 7 9 11 12 14 16 18 19

O1 O2 O3 O4 O5 O6 O7 O8 O9 O10

ASDMB-25.000MHz

CLK1 CLK10 CLK9 CLK8 CLK6 CLK7 CLK5 CLK2 CLK3 CLK4

Vcore

5v0

R1 10

CUI PJ-037BH 5v0

3v3 3.3v Regulator - 1A

5v0

IDT74FCT3807APYG

VIN

0.01uF C39

VOUT GND

R4 0 0.01uF C37

3

5.11k

L2

4.7uF

0

BLM18HE102SN1D

J3

1 2 3 4 5

MCLR 3v3

VCC DD+ ID GND Shield

ICSPDAT ICSPCLK

1 2 3 4 5 6

VUSB

4.7uF

5v Regulator - 100mA For SMPS

VIN

1kOhm @ 100MHz

C40

VIN

L3

8

D+ BLM18HE102SN1D

0.01uF C41

1kOhm @ 100MHz

Molex 0473460001

VIN

VOUT GND

VID[0..5]

C42

1 PGOOD

R6

0.01uF C43

2

R7

1.21k 4.7uF

4.7uF

C7

100k

PVDD CBOOT HG SW LG SRCK PGND DGND

DE_EN# VID0 VID1 VID2 VID3 VID4 VID5 CK_EN# VR_ON STP_CPU# XPOK SLP PGOOD

VDD

PVDD

5v0

5v0

Input

VIN

C8 1uF

D1

C9 1uF

Vcore Output Bulk

C13

C1

4.7uF C12

330uF

C3

48 1

C2 VIN

U21

2 3 47 5 45 13

CMDSH-3

3 4 5

22uF

TG TGR BG

VIN VSW PGND

L1

1 6 9

R9

4.7uF C10

330uF

Vcore 560nH 0.003

CSD86350Q5D

4.7uF C11

4.7uF

D

R10

ILIMREF ILIM SENSE

31 32 23 25

KA78L05AIDTF

L4

ICSP

5v0 5v0

U4

35 41 40 39 38 37 36 12 42 34 15 33 14

VID0 VID1 VID2 VID3 VID4 VID5 CK_EN

D-

D

VDD V1R7 VOVP VBOOT VSLP

5v0

5.11k

AP1117IE33G-13

USB & Programming for Microcontroller

24 26 17 27 28

R3

R5

2

R12 2.2 U1

R2

VERIFY VBOOT

C36

3v3

U3

1

J2

5v0

2

1v0

C38

1

VIN

U5

3

2

Switching power supply for Vcore

J1 3v3

3

VDAC VSTP SGND SS

CMP CMPREF VREF

BLM18HE102SN1D

C4

8 7 16

1200pF C5

9 10 11

Should have 2-6 15uF on input (Sanyo 25TQC15)

182 R11

Output

Vcore C6

100

Vcore

Vcore

Vcore

C14

C17

C20

C23

22uF C15

22uF C18

22uF C21

22uF C24

22uF C16

22uF C19

22uF C22

22uF C25

22uF

22uF

22uF

22uF

1200pF

LM27213

1kOhm @ 100MHz 0.022uF

0.1uF

Microcontroller

VID[0..5] 3v3

3v3 C44

LOW ESR

C46 0.01uF C45 0.01uF 4.7uF 3v3

MCLR C168

Crystal DNP

40k

VID0 VID1 VID2 VID3 VID4 VID5 OSC2 OSC1

17 18 19 20 21 22 29 28

FANDAT FANCLK

8 9 10 11 12 13 14 15

UC_PO UC_NO ICSPCLK ICSPDAT

R30

OSC2 Y1 XuF C169 CRYSTAL

OSC1

3v3

U7

RESPONSE_CLK RESPONSE_DAT

RB0 RB1 RB2 RB3 RB4 RB5 RB6 RB7

30 31 32 40 1

RC0 RC1 RC2 RC6 RC7

VDD VUSB3V3 D+ DRD0 RD1 RD2 RD3 RD4 RD5 RD6 RD7 RE0 RE1 RE2 MCLR/VPP/RE3

VSS

7 33

3v3

39 38

D+ D-

34 35 36 37 2 3 4 5

LED0 LED1 LED2 LED3

REP_P REP_N

1 2 5 INV_DAT 6

R29

100

1A 1B 2A 2B

8 7 3 4

VCC 1Y 2Y GND

R28 1k

INV_CLK

REP_N

R27 1k

75-100

REP_P

R14

5

DD+

SMBDAT SMBCLK

LM63

75-100 R15

3v3

MCLR

INV_CLK INV_DAT

6

PWM

ALERT/TACH

4

R31 1k, 1/4W FANPWM

R32

75-100

VCC IN_A1 OUT_Y1 IN_A2 OUT_Y2 GND

R33 10k

13k

Vcore

J4

VIN

IC5_PO IC5_NO

3v3

1 2

IC6_NO IC6_PO

35 36

REP_N REP_P

16 17

3v3 CLK6 Q1 BC817-25-7-F

10

Vcore

U8

R34

4 6

RESPONSE_CLK RESPONSE_DAT

R16

22uF C30

22uF C33

LED

22uF C28

22uF C31

22uF C34

22uF

22uF

22uF

C35

22uF

D5

LED3

9 44

R17 100k

43

CONFIG_PI CONFIG_NI CONFIG_NO CONFIG_PO REPORT_N REPORT_P XCLKIN RSTIN CORE_CLKOUT

DVDD OVDD0 OVDD1 VDD_PLL VDDA_PLL VSS DVSS EPVSS OVSS0 OVSS1 VSS_PLL VSSA_PLL

3

Vcore

LED

C47

3v3 C51

Vcore C55

3v3

37 24 7 6

0.47uF C48

1v0

L5

0.47uF C52

0.47uF C56

BLM18HE102SN1D

27 12 49 38 23 8 5

0.47uF C49

1kOhm @ 100MHz

0.47uF C53

0.47uF

UC_PO UC_NO

1 2

IC1_NO IC1_PO

35 36

REP_N REP_P

16 17

3v3 CLK1

9 44

0.47uF C50

1v0

0.47uF C54

C58

R25 100k

43

CONFIG_PI CONFIG_NI CONFIG_NO CONFIG_PO REPORT_N REPORT_P XCLKIN RSTIN CORE_CLKOUT

0.47uF

H1

Vcore

1

Vcore

U9 IC6_PO IC6_NO

Drill - Unplated M3 H2

1

1 2

IC7_NO IC7_PO

35 36

REP_N REP_P

16 17

Drill - Unplated M3 H3

1

3v3 CLK7

9

Drill - Unplated M3

44

H4

R18 100k

1

43

Drill - Unplated M3

CONFIG_PI CONFIG_NI CONFIG_NO CONFIG_PO REPORT_N REPORT_P XCLKIN RSTIN CORE_CLKOUT

DVDD OVDD0 OVDD1 VDD_PLL VDDA_PLL VSS DVSS EPVSS OVSS0 OVSS1 VSS_PLL VSSA_PLL

3

0.47uF

Vcore C67

37 24 7 6

0.47uF C68

1v0

L6

0.47uF C69

1kOhm @ 100MHz

0.47uF C64

0.47uF C61

0.47uF

IC1_PO IC1_NO

1 2

IC2_NO IC2_PO

35 36

REP_N REP_P

16 17

3v3 CLK2

9 44

0.47uF C70

Vcore

IC8_NO IC8_PO

35 36

REP_N REP_P

16 17

3v3 CLK8

9 44

R19 100k

43

CONFIG_NO CONFIG_PO REPORT_N REPORT_P XCLKIN RSTIN CORE_CLKOUT

OVDD0 OVDD1 VDD_PLL VDDA_PLL VSS DVSS EPVSS OVSS0 OVSS1 VSS_PLL VSSA_PLL

1v0

0.47uF C62

C66

3

0.47uF

Vcore C79

R26 100k

43

37 24

0.47uF C80

1v0

L7

7 6

0.47uF C72

0.47uF C81

1kOhm @ 100MHz

CONFIG_NO CONFIG_PO REPORT_N REPORT_P XCLKIN RSTIN CORE_CLKOUT

35 36

0.47uF C76

0.47uF C73

0.47uF C82

REP_N REP_P

16 17

3v3 CLK9

9 44

R20 100k

43

REPORT_N REPORT_P XCLKIN RSTIN CORE_CLKOUT

OVDD0 OVDD1 VDD_PLL VDDA_PLL VSS DVSS EPVSS OVSS0 OVSS1 VSS_PLL VSSA_PLL

0.47uF

IC2_PO IC2_NO

1 2

IC3_NO IC3_PO

35 36

REP_N REP_P

16 17

3v3 CLK3

1v0

0.47uF C74

C78

3

0.47uF

Vcore C91

9

R22 100k

43

37 24

27 12 49 38 23 8 5

0.47uF C93

1kOhm @ 100MHz

0.47uF C88

0.47uF C85

0.47uF

IC3_PO IC3_NO

1 2

IC4_NO IC4_PO

35 36

REP_N REP_P

16 17

3v3 CLK4

9 44

0.47uF C94

REP_N REP_P

16 17

3v3 CLK10

9 44

R21 100k

43

CONFIG_NO CONFIG_PO REPORT_N REPORT_P XCLKIN RSTIN CORE_CLKOUT

OVDD0 OVDD1 VDD_PLL VDDA_PLL VSS DVSS EPVSS OVSS0 OVSS1 VSS_PLL VSSA_PLL

0.47uF C164

0.47uF C116

0.47uF

0.47uF C166

0.47uF C117

0.47uF

0.47uF

1v0 C150

Vcore

0.47uF

3v3

C161

C153

C157

1v0

0.47uF C162

0.47uF C154

0.47uF C158

0.47uF C163

0.47uF C155

0.47uF

0.47uF C165

0.47uF C156

0.47uF

0.47uF

BLM18HE102SN1D

27 12 49 38 23 8 5

1kOhm @ 100MHz

1v0 C160

CONFIG_NO CONFIG_PO REPORT_N REPORT_P XCLKIN RSTIN CORE_CLKOUT

DVDD OVDD0 OVDD1 VDD_PLL VDDA_PLL VSS DVSS EPVSS OVSS0 OVSS1 VSS_PLL VSSA_PLL

3

Vcore

0.47uF

3v3

C119

C107

C111

0.47uF C120

0.47uF C108

0.47uF C112

0.47uF C121

0.47uF C109

0.47uF

0.47uF C122

0.47uF C110

0.47uF

0.47uF

B

3v3

37 24

L12

7 6

1v0

BLM18HE102SN1D

27 12 49 38 23 8 5

1kOhm @ 100MHz

1v0 C118

0.47uF C86

1v0 C90

Vcore

R23 100k

43

CONFIG_PI CONFIG_NI CONFIG_NO CONFIG_PO REPORT_N REPORT_P XCLKIN RSTIN CORE_CLKOUT

DVDD OVDD0 OVDD1 VDD_PLL VDDA_PLL VSS DVSS EPVSS OVSS0 OVSS1 VSS_PLL VSSA_PLL

3

Vcore

0.47uF

3v3

C133

C125

C129

0.47uF C134

0.47uF C126

0.47uF C130

0.47uF C135

0.47uF C127

0.47uF

0.47uF C136

0.47uF C128

0.47uF

0.47uF

3v3

37 24

L13

7 6

1v0

BLM18HE102SN1D

27 12 49 38 23 8 5

1kOhm @ 100MHz

1v0 C132

BitSyncom A3255Q48

Vcore

35 36

7 6

U14

BLM18HE102SN1D

Vcore

DVDD

VSS DVSS EPVSS OVSS0 OVSS1 VSS_PLL VSSA_PLL

L11

Vcore C87

0.47uF C84

0.47uF

CONFIG_PI CONFIG_NI

VDD_PLL VDDA_PLL

37 24

3v3 C83

0.47uF C92

1v0

L8

7 6

U12 A

OVDD0 OVDD1

Vcore

CONFIG_PI CONFIG_NI

BitSyncom A3255Q48

1 2

0.47uF C124

3v3

C113 0.47uF

0.47uF

3v3

C89 0.47uF

IC9_PO IC9_NO

0.47uF C115

BitSyncom A3255Q48

Vcore

CONFIG_NO CONFIG_PO

DVDD

3

U13

44

Vcore

IC9_NO IC9_PO

0.47uF C152

Vcore C75

BLM18HE102SN1D

27 12 49 38 23 8 5

U11

DVDD

1kOhm @ 100MHz

3v3 C71

0.47uF

CONFIG_PI CONFIG_NI

C123

BLM18HE102SN1D

27 12 49 38 23 8 5

Vcore

CONFIG_PI CONFIG_NI

BitSyncom A3255Q48

1 2

1v0

C159 0.47uF

0.47uF

3v3

C77 0.47uF

IC8_PO IC8_NO

C114

BitSyncom A3255Q48

Vcore

DVDD

L10

7 6

U17

BLM18HE102SN1D

27 12 49 38 23 8 5

U10

CONFIG_PI CONFIG_NI

VSS DVSS EPVSS OVSS0 OVSS1 VSS_PLL VSSA_PLL

C151

Vcore C63

0.47uF C60

0.47uF

1 2

VDD_PLL VDDA_PLL

37 24

3v3 C59

BitSyncom A3255Q48

IC7_PO IC7_NO

OVDD0 OVDD1

3v3

3v3

C149 0.47uF

0.47uF

3v3

C65 0.47uF

B

DVDD

3

Vcore

BitSyncom A3255Q48

C57 0.47uF

Heatsink Mount

Vcore

U16

BitSyncom A3255Q48

H

22uF C27

U19

5 1 3 2

75-100

3 2 1

6

FANPWM

H

D4

LED

C

3 2

R35 470

H

Vcore C32

LED2

FAN

H

Vcore C29

Hashing ICs

VDD

GND

Vcore C26

VIN

U20

7 8

Vcore

74AUP2G02GF,115

C167 30pF

CAREFUL ON VIN! Q1 will be okay. Fan will be considerably less okay.

1

D3

NL27WZ14DFT2G

Fan Controller

3v3

LED

LED1

CK_EN PGOOD

23 24 25 16

D2

LED0 3v3

U18

PIC18F45K50

FANDAT FANCLK

3v3 R13

XuF

C

Status LEDs

Communication w/ hashing ICs

RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7

3

0.47uF

Vcore C103

C131 0.47uF

0.47uF

3v3 C95

Vcore C99 IC4_PO IC4_NO

3v3

37 24

L9

7 6

1v0

0.47uF C104

0.47uF C96

0.47uF C100

BLM18HE102SN1D

27 12 49 38 23 8 5

1kOhm @ 100MHz

0.47uF C105

0.47uF C97

0.47uF

1 2

IC5_NO IC5_PO

35 36

REP_N REP_P

16 17

3v3 CLK5

9 44

0.47uF C106

0.47uF C98

1v0 C102

Vcore

U15

R24 100k

43

BitSyncom A3255Q48

CONFIG_PI CONFIG_NI CONFIG_NO CONFIG_PO REPORT_N REPORT_P XCLKIN RSTIN CORE_CLKOUT

DVDD OVDD0 OVDD1 VDD_PLL VDDA_PLL VSS DVSS EPVSS OVSS0 OVSS1 VSS_PLL VSSA_PLL

3

Vcore C145

0.47uF

3v3 C137

C141

3v3 A

37 24 7 6 27 12 49 38 23 8 5

L14

1v0

0.47uF C146

0.47uF C138

0.47uF C142

0.47uF C147

0.47uF C139

0.47uF

0.47uF C148

0.47uF C140

0.47uF

0.47uF

BLM18HE102SN1D 1kOhm @ 100MHz

1v0 C144

BitSyncom A3255Q48

C101 0.47uF

0.47uF

0.47uF

0.47uF

C143 0.47uF

0.47uF Title Open Source Bitcoin Miner Size D

Document Number Sunday, December 01, 2013

Date: 5

4

3

2

1

Drawn By: George Hahn R e v A Sheet

1

of

1

schematic1 : page1 - GitHub

Dec 1, 2013 - 0.47uF. R22. 100k. C138. 0.47uF. C81. 0.47uF. C21. 22uF. C111. 0.47uF. C168. XuF. C9. 1uF. C34. 22uF. C73. 0.47uF. H3. Drill - Unplated M3.

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