SEQUENTIAL CIRCUITS Flip-Flops Analysis

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

FLIP-FLOPS Characteristic Tables, Characteristic Equations

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

CHARACTERISTIC TABLES

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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Characteristic Tables • A characteristic table defines the logical properties of a

flip-flop by describing its operations in tabular form. • For D, JK, and T flip-flops, the characteristic table defines

the next state as a function of the inputs and the present state. • For the characteristic tables, • Q(t) refers to the present state

• Q(t+1) refers to the next state

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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Characteristic Tables: D FF • The next state of a D flip-flop is dependent only on the D

input and is independent of the present state. • Q(t+1) = D • Next state value is equal to the D value.

• Notice that there is no “no change” condition.

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

Characteristic Table: D FF

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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Characteristic Tables: JK FF • The next state of a JK flip-flop • Q(t+1) = Q(t) when J and K are both 0 – no change

• Q(t+1) = 0 when J = 0 and K = 1 – reset • Q(t+1) = 1 when J = 1 and K = 0 – set

• Q(t+1) = Q’(t) when J and K are both 1 – output complemented

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

Characteristic Table: JK FF

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

Characteristic Tables: T FF • Characteristic table of a T flip-flop • Q(t+1) = Q(t) when T = 0 – no change

• Q(t+1) = Q’(t) when T = 1 – output complemented

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

Characteristic Table: T FF

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

CHARACTERISTIC EQUATIONS

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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Characteristic Equations • The logical properties of a flip-flop can be expressed

algebraically with a characteristic equation. • For D flip-flop: Q(t+1) = D • For JK flip-flop: Q(t+1) = JQ’ + K’Q • For T flip-flop: Q(t+1) = TQ’ + T’Q = T  Q • Characteristic equations can be obtained from the circuit.

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

ANALYSIS OF CLOCKED SEQUENTIAL CIRCUITS State Equation, State Table, State Diagram

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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Introduction • Analysis describes what a given circuit will do under

certain operating conditions. • Behavior of a clocked sequential circuit is determined

from • the inputs

• the outputs • the state of the flip-flops used

• The outputs and the next state are both a function of the

inputs and the present state.

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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Introduction • The analysis of a sequential circuit consists of obtaining a

table or a diagram for the time sequence of inputs, outputs, and internal states. • Boolean expressions, that describe the behavior of the

sequential circuit, can be determined. The expressions

must include the necessary time sequence.

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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Introduction • A logic diagram is recognized as a clocked sequential

circuit if it includes flip-flops with clock inputs. • The flip-flops can be of any type (D, JK, T). • The logic diagram may or may not include combinational

circuit gates.

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

STATE EQUATIONS

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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State Equations • The behavior of clocked sequential circuits can be

described algebraically by means of state equations. • A state equation (a.k.a. transition equation) specifies the

next state as a function of the present state and inputs.

Consider the figure in the next slide..

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

Sample Sequential Circuit

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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State Equations • The sample sequential circuit consists of • two D flip-flops A and B • input x • output y

• The state equations • A(t+1) = A(t)x(t) + B(t)x(t)

//at time t

• B(t+1) = A’(t)x(t)

//at time t

• Since all the next state variables are a function of the

present state, the designation (t) can be omitted.

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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State Equations • The present-state value of the output can be expressed

algebraically as • y(t) = [A(t) + B(t)]x’(t)

• Since

all variables are in the present state, the

designation (t) can be omitted. The output Boolean

equation now is, • y = (A + B)x’

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

STATE TABLES

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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State Table • The time sequence of inputs, outputs, and flip-flop states

can be enumerated in a state table. • The state table consists of four sections, • present state – state of flip-flop at any given time t • input – value of input for each possible present state

• next state – state of flip-flop after one clock cycle (at time t+1) • output – value of output at time t for each present state and input

condition

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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State Table • Derivation of a state table requires listing all possible

binary combinations of present states and inputs. • The next state section values are determined from the

state equations of the flip-flops used. • The output section values are determined from the output

equation.

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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State Table

A(t+1) = Ax + Bx B(t+1) = A’x y = Ax’ + Bx’

State table for the sample circuit

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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State Table • Given a sequential circuit with m flip-flops and n inputs, 2m+n

rows are needed for the state table. • The number of columns for each section: m for present state

and next state, n for input, the number of output variables. • The binary numbers 0 to 2m+n – 1 are listed under the present

state and input sections. • Values under next state section are derived from the state

equations of the flip-flops. Values under the output section are derived from the output equations.

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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State Table (version 2) • It is sometimes convenient to express the state table in a

slightly different form. • A different state table has three sections: present state,

next state, and output. • The input conditions are enumerated under the next state

and output sections.

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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State Table (version 2)

A(t+1) = Ax + Bx B(t+1) = A’x y = Ax’ + Bx’

Another form of the state table for the sample circuit

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

STATE DIAGRAMS

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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State Diagram • A state diagram is a graphical representation of the state

table. • A state diagram is derived from the information given in

the state table.

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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State Diagram Present State (A,B)

Input (x) Output (y)

Next State (A,B) State diagram for the sample circuit

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

State Diagram

Draw the state diagram of the sample circuit

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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State Diagram

State diagram for the sample circuit

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

INPUT/OUTPUT EQUATIONS

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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Flip-Flop Input/Output Equations • An output equation is a Boolean function describing the

external output of the combinational circuit part of the sequential circuit. • A flip-flop input equation is a Boolean function describing

the part of the circuit that generates the inputs to the flipflops. • With the flip-flop input equations and output equations,

the logic diagram of the sequential circuit can be drawn.

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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Flip-Flop Input Equation • Sample Circuit: 2 input equations and 1 output equations

DA = Ax + Bx DB = A’x

y = Ax’ + Bx’ • DA means that we are using a D flip-flop with output A

• DB means that we are using a D flip-flop with output B

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

37

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

ANALYSIS WITH FLIP-FLOPS More examples: D, JK, T

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

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Analysis: D Flip-Flop • Consider the following input equation for the circuit to be

analyzed,

• DA = A  x  y • Description of the circuit, • the DA symbol implies the use of a D flip-flop with output A • no output equations are given – output of the circuit comes from the

output of the flip-flop used • What to do: a) logic diagram, b) next state equations, c)

state table, and d) state diagram

Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

Analysis: D Flip-Flop a. Logic Diagram of DA = A  x  y

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

Analysis: D Flip-Flop b. Next State Equation of DA = A  x  y

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

Analysis: D Flip-Flop c. State Table of DA = A  x  y

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Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.

Analysis: D Flip-Flop c. State Diagram of DA = A  x  y

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sequential circuits

SEQUENTIAL CIRCUITS. Flip-Flops Analysis. Ciletti, M. D. and M. M. Mano. Digital design, fourth edition. Prentice Hall. NJ.
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