JOURNAL OF COMPUTER SCIENCE AND ENGINEERING, VOLUME 8, ISSUE 2, AUGUST 2011 33

Simulation and Optimization of the Effect of Work Function on Electrical Characteristics of Nano-MOSFETs Ooi Chek Yee

Aissa Boudjella

Lim Soo King

Faculty of Information and Communication Technology, Universiti Tunku Abdul Rahman, Jalan Universiti, Bandar Barat, 31900 Kampar, Perak, Malaysia. Abstract—Numerical simulations have been performed to investigate the electronic transport properties which cause drain current to flow through the Silicon (Si) channel of double-gate (DG) fully-depleted (FD) n-MOSFET at nanoscaled dimension. In this investigation, the top and bottom gate contact work function is varied from 4.45 eV to 4.75 eV. These work function ranges cover some arbitrary transition metal elements. The simulation is carried out at room temperature. Three electron transport models will be presented :- (1) ballistic transport using Green’s function approach, (2) ballistic transport using semiclassical approach, and (3) drift diffusion transport. Electrical data such as the subbands energy profile, 2D electron density, currentvoltage (I-V) and average electron velocity graphs have been plotted to study the effects of variations in the top and bottom gate contact work function. The effect on I-V characteristics are analyzed in terms of leakage current, on-state current and threshold voltage. Index Terms—nanoscale, MOSFET, ballistic transport, semiclassical transport , drift diffusion, work function.

——————————
——————————

1 INTRODUCTION

T

HE semiconductor industry faces continuous MOSFET scaling down to nanometer regime. Scaling down of MOSFET must be able to deliver everincreasing functionality and improve propagation as well as switching speed in digital integrated circuit applications. One of the challenges of scaling down MOSFET is to replace poly-Si gates with metal gate electrodes in order to reduce the depletion width. However, choosing a suitable gate metals is problematic. Metal gate is introduced to eliminate high threshold voltage [1], [2]. In this paper, arbitrary transition metals have been choosen so that the top and bottom gate work function of nanomos is varied from 4.45 eV to 4.75 eV [3], [4].

fixed at 0.6 V while the gate voltage is swept with step size of 0.05 V from 0 V to 0.6 V.

Fig. 1. Structural dimension design of nanomos

2 DEVICE DESIGN Figure 1 shows the structural dimension of the DG FD nMOSFET which is used in this project. The source and drain terminal are heavily n+ doped at 1x1020 cm-3. The Si film channel is intrinsic. Its thickness is TSi=3 nm. Channel length (LT) is fixed at 10 nm with no source overlap (US) and no drain overlap (UD). The junction doping is abrupt. Top gate length (LGT) and bottom gate length (LGB) are fixed at 10 nm. Source and drain length (LSD) is fixed at 7.5 nm. Top insulator thickness (TOX1) and bottom insulator thickness (TOX2) are fixed at 1.5 nm. All dimension of the device is in nanometer size. The nanomos is fabricated on (001) Si surface wafer. The drain-source potential is

© 2011 JCSE http://sites.google.com/site/jcseuk/

34

3

RESULT AND ANALYSIS

work function 4.75 eV has the largest threshold voltage while work function 4.45 eV has the smallest threshold voltage [8]. All these phenomenons are due to variation in potential barrier height against work function as shown

Figure 2 shows the plot of the subbands energy profile along the channel for various top and bottom gate contact work functions. From the plot, the larger the value of work function, the higher the potential barrier at the channel region near the source reservoir. Higher value potential barriers are expected to have lower current value. Figure 3 shows the 3D view of conduction band diagram at work function 4.5 eV. Figure 4 shows the semilog plot of I-V curves for various work functions. At Vgs=0 V, the work function 4.45 eV has the largest leakage current while the work function 4.75 eV has the smallest leakage current. Meanwhile, at Fig. 4. Semilog plot of I-V for different work function using Green’s function approach.

Fig. 2. Subbands energy profile versus distance along the channel Fig. 5. Normal plot of I-V for Fig. 4.

Fig. 3. 3D view of conduction band edge potential profile

on-state Vgs=0.6 V, the work function 4.45 eV has the largest on-state current while the work function 4.75 eV has the lowest on-state current [6], [7]. From Figure 5,

in Figure 2. Figure 6 shows the semilog I-V curve for three different electron transport models under work function 4.45 eV to study the leakage current. Figure 7 shows the normal plot for the same curve to study the threshold voltage. From the plots, drift diffusion transport shows the worst on-state current and highest threshold voltage but with the best leakage current value due to scattering mechanism in the channel region. Green’s function approachh has the highest leakage current value due to electron wave penetration in thick-body nanomos. On the other hand, semiclassical approach has the highest onstate current due to flow of electron particles through the thick-body nanomos. Since Green’s function and semiclassical both are ballistic in nature, their characteristics curve shape are quite similar. Green’s function and semiclassical have lower threshold voltage than drift diffusion. Figure 8 and Figure 9 show the corresponding plots for work function 4.75 eV. Since work function 4.75 eV has a higher potential barrier, these two plots exhibit lower current value and higher threshold voltage than previous two plots.

35

Fig. 9. Normal I-V plot ofr Fig. 8.

Fig. 6. Semilog I-V plot for 3 different transport models at work function 4.45 eV.

Fig. 10. Plot of Subbands energy profile and 2D electron density against distance along the channel at work function 4.45 eV.

Fig. 7. Normal I-V plot for Fig. 6.

Fig. 8. Semilog I-V plot for 3 different transport models at work function 4.75 eV.

Fig. 11. Plot of Subbands energy profile and 2D electron density against distance along the channel at work function 4.75 eV.

36

4 CONCLUSION

Fig. 12. Average electron velocity against distance along the channel for different Vgs biasing at work function 4.75 eV for ballistic Green’s function transport.

To design a DG FD n-MOSFET, compromise has to be achieved between low work function and high work function. Low work function has the advantage of low threshold voltage and high on-state current but has disadvantage of high quiescent leakage current. Meanwhile, high work function has disadvantage of high threshold voltage and low on-state current but has advantage of low quiescent leakage current. This is because high work function has high potential barrier. Among the three electron transport models studied, drift diffusion exhibit the poorest I-V performance because of scattering. On the other hand, ballistic nature of Green’s function and semiclassical approach exhibit quite similar I-V characteristics due to absence of scattering centers in the channel except that Green’s function treats electron as wave while semiclassical treats electron as particle. In the absence of scattering in ballistic condition, average electron velocity value in Green’s function and semiclassical can be greater than thermal velocity in drift diffusion model.

REFERENCES Fig. 13. Average electron velocity against distance along the channel [1] for different work functions for drift diffusion transport.

Figure 10 shows the plot for subbands energy profile and 2D electron density against distance along the channel at work function 4.45 eV, whereas Figure 11 shows the same title plot for work function at 4.75 eV. Analyzing these two graphs, work function at 4.75 eV has the lowest 2D electron density at the channel regiondue to highest potential barrier. Thus, lower drain current as proven in IV curves. Figure 12 shows the curve of average electron velocity against distance along the channel using ballistic Green’s function at 4.75 eV. From the curve, higher Vgs tend to speed up electron faster to a peak value greater than normal Si film thermal velocity which is 1x107 cm/s because ballistic nature has no scattering centers. At Vgs=0.00 V, electron in the Si channel reach normal Si film velocity of 1.0x107 cm/s. Previous graph shows that in ballistic condition, average electron velocity in the channel can be greater than normal thermal velocity. In Figure 13, where drift diffusion transport model is applied to the range of work function studied, the maximum peak average electron velocity in the channel which can be achieved is 1.8x107 cm/s at 4.75 eV, whereas the peak value is 1.3x107 cm/s at 4.45 eV. For drift diffusion transport, the peak value of average electron velocity which can be achieved is around normal thermal velocity for Si film at the range of work function studied in this project.

[2]

[3]

[4] [5]

[6]

[7]

[8]

Yeong-Taek Lee, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, “Threshold Voltage reduction Model for Buried Channel PMOSFETs Using Quasi-2-D Poisson Equation,” IEEE Transactions on Electron Devices, Vol. 47, No. 12, December 2000. Asen Asenov, “Random Dopant Induced Threshold Voltage Lowering and Fluctuations in Sub-0.1 µm MOSFET’s : A 3-D “Atomistic” Simulation Study,” IEEE Transactions on Electron Devices, Vol. 45, No. 12, December 1998. Niza M. Idris, Andrew R. Brown, Jeremy R. walting and Asen Asenov, “Simulation Study of Workfunction Variability in MOSFETs with Polycrystalline Metal gates,” ULIS 2010 – Ultimate Integration on Silicon, University of Glasgow, 18-19 march 2010. K. Tse, J. Robertson, “Work function control at metal-oxide interfaces in CMOS,” Materials Science in Semiconductor Processing 9 (2006) 964-968. Sheng-Lyang jang, Bohr-ran huang, and Jiann-Jong Ju, “A Unified Analytical Fully Depleted and Partially Depleted SOI MOSFET Model,” IEEE Transactions on Electron Devices, Vol. 46, No. 9, September 1999. Yon-Sup pang, and John R. Brews, “Models for Subthreshold and Above-Threshold Currents in 0.1-µm Pocket n-MOSFETs for LowVoltage Applications,” IEEE Transactions on Electron Devices, Vol. 49, No. 5, May 2002. Sheng-Lyang Jang, Shau-Shen Liu, and Chorng-Jye Sheu, “A Compact LDD MOSFET I-V Model Based on Nonpinned Surface Potential,” IEEE Transactions on Electron Devices, Vol. 45, No. 12, December 1998. M. Jagadesh Kumar, Vivek Venkataraman, and Susheel Nawal, “A Simple Analytical Threshold Voltage Model of Nanoscale Single-layer Fully Depleted Strained-Silicon-on-Insulator MOSFETs,” IEEE Transactions on Electron Devices, Vol. 53, No. 10, October 2006.