TATA ELXSI Technical(Electronics) PAPER TATA ELXSI PAPERS HELD AT DRIEMS ,CUTTACK ON 24th APRIL 2004 There were two rounds 1)TECH(30 ques,30 mins)2)APTITUDE(30 ques,30 mins) TECH QUESTIONS (Electronics & TC) 1. CMRR is given= Differential gain is given= Inputs: +ve end=2v,-ve end=1v of the OP-AMP Find the output voltage? 2. CRO is in X-Y mode.Sinusoidal inputs have 90degrees phase difference between them. What will appear on the display? a)circle b)line c)ellipse d)triangular wave 3. Which has least propagation delay? a)ECL b)TTL c)RTL d)CMOS 4. In a ripple counter how many change in states happen when count changes from7 to 8? a)1 b)2 c)3 d)4 5. Max. no. of variables that can be represented in K-MAP? a)3 b)5 c)7 d)none of these 6. How many comparators are required in a n-bit flash ADC? a)2^(n-1) b)(2^n)-1 c)2^n d) n 7. What is an EEPROM? a)Programmable transistor b)Transistor c)SRAM d) 8. Time period of input voltage=8ns. / Find the duty cycle of Vout.
Voltage across one capacitor is V volts. Another cacitor is added at its one end(now the two are in series). What is the voltage across their ends? a)V b)V/2 c)2v d)none of these 9. In an SCR why silicon is used? a) available easily b) has much less reverse saturation current than Germanium c) has greater reverse sat.current than Ge d) 10. Output=?
a)A’+B’+C b)A+B+C’ c)A(B’+C’) d)B’+C’+A’ 11. There was a question using transmission gates.Three inputs were A,B,C.Answer was (A+BxorC) 12. How to get the characteristic figure changed from 1 to 3?(characteristic diagram)
a)By increasing gate width of NMOS b)---------do----------------- of CMOS c)By increasing gate voltage 14. Find propagation delay?
a)200Hz b)150Hz c)5Hz d)2Hz 15. A diagram was given to identify? a)Synchronous counter b)Ripple counter c)Shift register d)None of the above answer was sync. Counter these options may be wrong.
16.
This acts as a: a)OR b)XOR c)AND d)NOR 17. At t=0 if position is changed from 1 to 2 ,find the voltage across 1K??
a)4V b)2V c)1.5V d)none of these 18. Find thevenin voltage and resistance across A and B
Flip-flop state diagram question.What does the above represent? 22. What is this?
a)Squaring device b)Divider c)Square root ckt d) 23. How will be the output vs. input graph if Vin=10V,sat voltage of OP-amp is 14V?
24. Basic memory cell of dynamic RAM a. Capacitance b. Flip flop c. Transistor d. Transistor with Capacitor 25. Ideal Power Supply has a. Zero internal resistance b. High O/P resistance c. High I/P resistance ittestpapers.com d. Low O/P resistance 26. Which type of transmission line will have max. value of characteristic impedence a. Open Wire line b. Coaxial Cable c. Twin lead line d. None 27. For same peak value of current, which waveform will have least RMS value a. Sine b. Square c. Triangular d. Full wave rectified wave 28. -V analogy displacement is analogous to a. Voltage b. Condutance c. Magnetic Flux Linkage d. Capacitance Similarly..............In F-I analogy displacement is analogous to a. Charge b. Resistance ittestpapers.com c. Inductance d. Current 29. In the following circuit Vo/Vin = (there were 4 options)
30. In the following circuit the charging and discharging time is(i don’t remember the options)
Don't remember the other value of other res and cap .But some values are given 31. The output at X acts as….
a.OR gate b.AND gate c.XOR gate d.XNOR gate The CRO in X-Y mode gives the following figure. If signal applied to the Y-plate is 2sin(wt) then the signal applied to the Xis a. 2 sin (wt) b. 2 sin (wt + pÖp/4)
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Page 1 of 1. Placement Paper of CISCO. CISCO. â â â â â (October, 2004). 1. In order to find out stack fault of a three input nand gate how many necessary input vectors. are needed ? 2. What is parity generation ? 3. A nand gate becomes ___ gat