Printed Pages:

NEC.3O9

(Fotlowing Paper ID and RoIt No. to be fitled in your Answer Book) Roll No. B.Tech.

(sEM. IIf) THEORY EXAMINATION,

2015-1 6

DIGITALLOGIC DBSIGN [Time:3 hoursf

[Total Marks:1001 ection-A

l.

Attempt all parts. All parts carry equal marks. Write answer of each part in short. ( l0 *2:2A)

(a)

Define Primitive Flowtable.

(b) What is race around condition in JK flip flop? (c)

r 8000

How many address lines and input output lines are needed in 2G X8 memory unit.

(d)

Differentiate between EPROM and EEpRoM.

(e)

Design full adder using two half adders.

(1)

P.T.O.

r

r i

(0

Differentiate between encoders and decoders.

(g)

Subtact 11010 from 10110 usi ngz's complement.

(h)

Represent (213.25),u insingle precision floating point representation.

(i)

Convert decirn al ginto gray code.

0)

Simplify the Boolean expresion: Y:(A+B) (A+C')

(B'+C'). Section-B Attempt any five questions from this

2.

Obtain Hamming codeward for the given data:

"l

I

section. (10x5:50)

1001001010"

3.

Design a4-bitby4-bitBinaryMultiplier.

4.

Design a3-bitbinaryto Gray Code converterusingpLA.

5.

Explain the difference between SRAm and DRAM

6.

Draw and explain 4-bit Universal shift Register.

I 8000

(2)

NEC-309

7.

Design a clocked sequential circuit that operates according to the state diagram shown:

Figure: State Diagram

Implement the circuit using D Flip-Flop. 8.

Describe the general procedures that must be followed to ensure a face-free state assignment with example.

9.

Obtain the reduced flow table for an Asynchronous sequential circuit that has two inputs x2 and xl and one output z. When xl:0 the outputr}. The first change in xZ that occurs while x1:1 will cauSe output z to be 1. The output zwillremain 1 until xl returns to zero.

t

sooo

(3)

PT.O.

r-

a

I

.

Sectior-C Attempt any two questions from this section. I 5x2:30

10. (a)

Implement the following Boolean function with a

multiplexer: F(A, B, C, D):

(b)

I

(0,

2,5,7,1l, 14)

Using a decoder and external gates, design the combinational circuit defined by the following three Boolean functions

:

Fl - (y'+x)z F2 -- y' z'+yz' F3 = (x'* y)z I

l.

Minimizethe following Boolean function using tabular method (Quine Mc- Cluskey method)

f(A,B,C,D)I:m

12.

(4,5,6,8,9, 10, 13)

+

Id

(A,7,1 5)

A sequential circuit has two JK flip-flops A and B, two inputs X and Y, and one output Z. The flip-flop input equations are:

JA:BX+B'Y' IQ{-B'K' KB:A+XY' JB:/fX ZFAX.,J{+BX'Y'

I

a) b)

Drawthe logic diagrarn

c)

Obtain the state table, state diagram.

I 8000

Derive the state equations.

NEC.309

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