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IV Semester B.E. (E&C) Degree Examination, January 2013 (2K6 Scheme) EC-402 : DIGITAL CIRCUIT DESIGN Time : 3 Hours

Max. Marks : 100

Instruction : Answer any five full questions, selecting atleast two questions from each Part. PART – A 1. a) What is a Flip Flop ? Discuss the working principle of SR Flip Flop with its truth table.

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b) What is race around condition ? Discuss in detail.

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c) Explain with suitable logic and timing diagrams.

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i) Serial – in – serial – out shift register ii) Parallel – in – parallel – out shift register. 2. a) With neat circuit diagram, explain the working of a Bidirectional universal shift register. b) Explain ring counter with circuit diagram and timing diagram.

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3. a) With truth table and logic circuit, explain the working of 4-bit asynchronous counter. b) Design a synchronous mod-6 counter using clocked JK flip flops.

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P.T.O.

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4. a) Draw the Mealy and Moore synchronous models. Label the excitation variables, state variables, input variables and output variables in both the diagrams.

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b) Construct the excitation table, transition table and state diagram for the Moore sequential circuit shown in fig. 4(b). 12

PART – B 5. a) Describe a basic PROM storage cell.

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b) Discuss the basic operation of a flash memory cell.

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c) Explain how SRAMS and DRAMS differ.

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6. a) With the block diagram, explain the Programmable Logic Devices (PLDs). b) Implement the following using a 3 × 4 × 2 PLA.

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f (a, b, c) = Σm (1, 2, 3, 6) f (a, b, c) = Σm (0, 1, 3, 6, 7 )

c) Implement the following function using a PROM PLD.

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f1 (a, b, c ) = Σ m (2, 4, 6, 7) f2 (a, b, c ) = Σ m (0, 1, 2, 5 ) f3 (a, b, c) = Σm (2, 6, 7)

7. a) Explain the static hazards with an example. State a procedure that can be used to eliminate all static logic hazards in a circuit. b) Find a fixed-scheduled fault-location experiment to locate all the distinguishable faults in the circuit of fig. 7(b).

8. a) Explain the fault detection by path sensitizing method with an example. b) With an example explain two-level circuit fault detection in AND/OR circuit.

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DIGITAL CIRCUIT DESIGN.pdf

3. a) With truth table and logic circuit, explain the working of 4-bit asynchronous. counter. 8. b) Design a synchronous mod-6 counter using clocked JK flip flops.

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