ED – 759
*ED759*
III Semester B.E. (CSE/ISE) Degree Examination, Dec. 2014/Jan. 2015 (2K11 Scheme) CI 33 : DIGITAL SYSTEM DESIGN Time : 3 Hours
Max. Marks : 100
Instruction : Answer five full questions choosing at least two from each Part. PART – A 1. a) Staircase light is controlled by two switches, one at the top of stair and another at the bottom of the stairs. i) Write the truth table for this system. ii) Write the logic equation in SOP form. iii) Realize the circuit using basic gates.
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b) Show that ab + ac+ a c + a b c (ab + c) = 1.
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c) Explain the different TTL parameters with their significance.
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2. a) Simplify the following function using K-map and Realize the circuit using basic gates.
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f(a, b, c, d) = π(2, 3, 4, 7, 10, 11, 12 ) . b) Simplify the following using Quine–McClusky method.
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f(a, b, c, d) = ∑ m(7, 9, 12, 13, 14, 15 ) + d (4, 11) Realize the simplified expression using NAND gates. 3. a) Implement f(a, b, c, d) = ∑ m(0,1, 5, 6, 7, 9,10,15) using.
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i) 8 : 1 MUX with a, b, c as select line. ii) 4 : 1 MUX with a & b as select lines. b) Differentiate between a decoder and an encoder. c) Realize 16 : 4 encoder using two 8 : 3 priority encoder.
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4. a) Define race around problem. Explain how race around problem can be eliminated using JK master-slave flip flop. 8 b) Explain the different flip flop triggering methods. 4 c) With a neat logic diagram, explain the working of positive edge triggered D flip flop. 8 P.T.O.
*ED759*
ED – 759 PART – B
5. a) Explain the working of 4 bit shift register for serial in – serial out and serial in – Parallel out operations with suitable truth tables. 10 b) Explain 4-bit universal shift register using negative edge triggered D flip flops. 10 6. a) Design a twisted ring counter using 4 bit shift register.
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b) Design and implement a synchronous BCD counter using JK flipflops.
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c) Design a MOD – 11 asynchronous counter with JK flipflops.
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7. a) A sequential circuit has one input and one output. The state diagram is as shown below. Design the sequential circuit with JK flipflops.
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b) Explain the working of Binary Ladder Digital to Analog converter with the help of a neat diagram. 10 8. Write short notes on : a) 7400 TTL series b) Parity generator c) Presettable counters d) A/D Conversion.
(5×4=20)
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