Uncompromised Clocking Solution for 16-Bit 2.5Gsps High Performance DAC Design Note 555 Clarence Mayott Introduction The LTC ®2000 16-bit 2.5Gsps DAC offers excellent AC performance. For many DAC applications, phase noise, noise spectral density (NSD), and spurious free dynamic range (SFDR) are critical to maximize the number of possible channels in a band without eroding the signal to noise ratio (SNR) in the band of interest. High speed DACs require a clean sample clock to achieve the best possible noise and spurious performance. Using the ultralow noise and spurious LTC6946 PLL synthesizer as a clock source for the LTC2000 maximizes system performance (Figure 1).
16-Bit High Speed DAC The high spectral purity and low noise of the LTC2000 make it an excellent signal generator. Figure 2 highlights the excellent additive phase noise performance of the LTC2000 of –165dBc/Hz at 1MHz offset and –147dBc/Hz at 10kHz offset with a 65MHz output. For output frequencies up to 100MHz, the LTC2000 has NSD better than –166dBm/Hz and SFDR better than 76dB. For higher output frequencies up to 1GHz, the SFDR is more than 68dB and the NSD remains below –155dBm/Hz. Producing these results requires a clock with good noise, high spectral purity and excellent jitter performance. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
LOOP FILTER CP 4.7nF
RZ 33.2Ω CI 56nF LF(s)
25
CP
ICP = 11.2mA
VRF+ f PFD KPFD
LTC6946-3 REF± R_DIV (fREF) ÷R = 1
L1 68nH fREF*
100pF
50Ω
÷N = 50 15
TUNE
O_DIV
f KVCO VCO ÷O = 2
CKP
+
N_DIV RF± (fRF)
+
RF
RF–
*CRYSTEK CVHD-950-100.000 100MHz OSCILLATOR
Figure 1. LTC6946 Driving the LTC2000
10/16/555
L2 68nH
100pF 50Ω
+
100pF
+
LTC2000
CKN 2000 F13
Frequency Synthesizer as a Clock Source The LTC6946 is an integer-N frequency synthesizer with integrated VCO that can produce signals from 370MHz up to 6.39GHz. It features excellent phase noise performance and very low spurious content, making it ideal to clock the LTC2000 at 2.5GHz. It can drive the LTC2000 directly without filtering to produce a spectrally pure low noise output. The LTC2000 divides the clock frequency (fCLK ) down to an output frequency (fOUT ). This frequency division causes the phase noise of the clock to appear at the DAC output, attenuated by a factor of 20 • log(fCLK / fOUT ). The total phase noise at the DAC output will be a combination of the additive phase noise of the LTC2000 (Figure 2) and the attenuated phase noise of the LTC6946.
The lower the phase noise, the closer signals generated by the LTC2000 can be spaced. This allows more information to be transmitted in a given bandwidth. With a lower phase noise floor, the total SNR of the system increases, which improves the integrity of the signal produced by the LTC2000. Results The single-sideband phase noise of the LTC2000 clocked by the LTC6946 is shown in Figure 3. The LTC6946 works well with the LTC2000, producing a clean clock that maximizes the DAC’s performance. The combination of the LTC2000 and the LTC6946 offer phase noise and spurious performance comparable to the best signal generators. For more information visit www.linear.com.
–100
–90
–110
–100
–120
SSB PHASE NOISE (dBc/Hz)
PHASE NOISE (dBc/Hz)
Wideband phase noise or jitter on the sample clock must be minimized to avoid degrading the NSD of
the DAC output, and the low spurious content of the LTC6946 output is critical to maintain high SFDR at the output of the LTC2000.
–130 –140 –150 –160 –170 –180
–110 –120 –130 –140 –150 –160
100k 100 1k 10k OFFSET FREQUENCY (Hz)
10
1M
–170
10
100
1k 10k 100k 1M OFFSET FREQUENCY (Hz)
DN5CM G01
2000 G48
Figure 2. Additive Phase Noise of the LTC2000, fOUT = 65MHz, fDAC = 2.5GHz
Data Sheet Download
www.linear.com/LTC2000
10M
Figure 3. Phase Noise of the LTC2000 Output at 80MHz Clocked by the LTC6946-3
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