COMPUTER SCIENCE AND ENGINEERING 2013-14

JAWAHARLAL NEHRU TECHNOLOGTCAL UNIVERSITY HYDERABAD

L T/P/D 411-4

ll Year B.Tech. CSE{ Sem

C

(A3O4O1) DlGlrAL LOGIC DESIGN

Objectives:

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To understand basic number systems codes and logical gates' To understand the Boolean algebra and minimization log'tc. To understand the design of combinational sequential circuits' To understand the basic s of various memory.

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canonical and standard forms. UNIT-II

Gate -Level Minimization and Three Variable, Four Variable,

sums Simplification, Don't care and other two level imPlantation.

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uNlT-lll combinational circuits (cc): Design Procedure, combinational circuit for different code converters and other problems, Binary Adder, subtractor, Multiplier, Magnitude comparator, Decoders, Encoders, Multiplexers, Demultiplexers.

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UNIT-IV

Circuits: Latches, Flip-flops, analysis of clocked

of counters, Up-down counters, Ripple counters

, Synchronous Counters.

Asynchronous sequential circuits: Reduction of state and follow tables, Bole free Conditions. UNIT.V:

s of ROM, MemorY decoding, Cache Memory, Programmable

f capacity and access time' TEXT BOOK:

1)

Digital Design- M. Morris Mano.

COMPUTER SCIENCE AND ENGINEERING 2013-14

REFERENCE BOOKS:

2)

3) 4l

ifi':"n,"n

and Finite Automata Theory by Zvi.

xf,vi,

Tata McGraw

Switching and Logic Design, C.V.S. Rao, pearson Education. Digital Principres and Design - Donard D.Givone,Tata McGrap Hiil,

Edition.

',

Fundamentals of Digitar Logic & Micro computer Dcsign , 5TH Edition, M. Rafiquzzaman John Wiley.

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1)

Outcomes:

could able to design, understand the number

quential circuits. And they should be in a position organization.

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L T/P/D C

Synchronous Counters. Asynchronous sequential circuits: Reduction of state and follow tables, Bole free Conditions. UNIT.V: s of ROM, MemorY decoding,.

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