Multi-hop Time Synchronization and Power Optimization for FRACTEL Ashutosh Dhekne Under guidance of

Prof. Kameswari Chebrolu Department of Computer Science and Engineering, IIT Bombay

FRACTEL System

Image Source: Nirav Uchat

Functional Blocks TDMA MAC

Routing

Time Synchronization Schedule Calculation Schedule Dissemination Node Join/Exit Bandwidth Req / Grant

Routing Metric Tree Calculation

Power Optimization

Operation Monitoring

Duty Cycling

Fault Diagnosis Performance Anomaly Detection

Problem Statement Part I • Managing time to enable TDMA – Time synchronization of Nodes • All nodes must know the global clock value

– Timer control • Fire timers accurately to follow the TDMA slot structure given by the schedule • Minimize guard band time

Related Work Part I • Reference Broadcast Synchronization – Single hop synchronization; our work will have multihop synchronization

• Timing-sync Protocol for Sensor Networks – Calculation of propagation delay; we subsume it within guard bands

• Flooding Time Synchronization Protocol – Adjustments for clock drift; we subsume it within guard bands and resynchronization

Solution Concept Global Time: 6000 Node A

Receive Timestamp: 2000 Synchronization Packet

Node B

Packet Contains

Calculation at the receiver

• Offset: -1950

• Offset: 7950 + (-1950) – 2000 = 4000

• Hardware Timestamp: 7950

• Even after synchronization, clocks may drift apart and need to resynchronize periodically

Implementation Details • Limitation: Only beacons are time stamped • Hack: Fool the hardware into considering the schedule (synchronization) packet as a beacon – Call the ath_hal_setuptxdesc() function with the flags parameter ORed with HAL_PKT_TYPE_BEACON – Bytes 24-32 overwritten with the 64-bit hardware timestamp

Clock Drift Characterization Card A

100 packets: 1pck/sec P1..P100

TXTS(P1) – RXTS(P1) = Offset1

Card B

TXTS(P2) – RXTS(P2) = Offset2 Offset2 – Offset1 = Drift1

TX Timestamp (TXTS)

RX Timestamp (RXTS)

Card Pair Pair 1

Pair 2

Pair 3

Pair 4

Pair 5

Average

-2.78

9.72

4.07

-1.41

13.12

Std Dev

0.42

0.47

1.03

0.5

1.04

Max

-3

11

6

-2

15

Clock Drift is under 15 µs per second; will be absorbed in guard bands

Timer Control • Accurate timers needed to send data at specific times • Hardware timer with 1ms granularity available • Evaluation of timer: Periodic Interrupt every 1 second 999425 µs 1000000 µs

Timer Fired Ideal Time

Interrupt occurs slightly (~575 µs) before time

Timer Control • Checking Timer Precision – conflicting results to FreeMAC paper Precision of the Hardware Timer - CDF

Percentile

5µs 110 100 90 80 70 60 50 40 30 20 10 0

999400

999410

999420

999430

999440

999450

999460

Time in Microsecond

Periodic timer with most interrupts within 5.7µs at 90 percentile

Timers in Action: TDMA Slots R to A

G

A to B

5050 5000

G

Topology R

8000

Node R

A

0 7950

B Node A 7000

7980

9990

-1950

Timer Interrupt Ideal time of sending

Node B 2030

Actual Packet Transmission

4000 Offset = TX Timestamp + Offset in Packet – RX Timestamp

G

Guard Band

Problem Statement Part II • Enable power saving of nodes – Duty cycle while TDMA schedule underway – Long term sleep when inactive

Related Work Part II • Wake on WLAN – Main Soekris board woken up by low power motes when energy detected – Mechanism requires the main board to boot up, hence time consuming

Image Source: Wake on WLAN

Power Optimization • Inactive nodes may sleep – Remote wake-up call must be possible – Low power listening capability required

• Mote as a proxy – Sender sends a specific length packet – Mote detects signature and wakes up the main board

• Initial implementation for CSMA based systems

Packet Length Detection • Mote cannot decode 802.11 frames • May use specific length packets for different nodes as wake up call • Detection of packet length by mote is possible using its CCA pin 802.11 Packet Generator Power Meter Telosb mote Mote image borrowed from data sheet

Packet Length Detection • Difference between actual packet length and that reported by the mote in microseconds Bytes Sent 1Mbps 6Mbps 11Mbps 18Mbps 1

11.66

19.01

-4.04

NA

100

6

-1.5

5.4

5.25

200

23

9.02

17.98

18

500

11

15.55

-5.28

28.5

1000

3

6

0.5

7

1400

38

-3

9

-1

Summary • Stage 1 Work – Study of madwifi drivers – Implementation of a coarse TDMA mechanism in adhoc mode – Beginning of monitor mode communication

• Stage 2 Work – – – – – –

Monitor mode communication completed Hardware time stamping of packets Drift characterization Timer characterization Synchronization using hardware time stamps Detecting packet length using mote – power optimization

Path Ahead • Managing Time – Verification of synchronization in multi-hop topology – Quantification of guard band to compensate for propagation delays and timer errors

• Power Optimization – Study of packet length pattern in wireless mesh networks – Use of motes to switch on the main board – Adapting the solution for a TDMA setting such as FRACTEL

Concluding Remarks • Conceptualization of various modules done in this stage • Workable timing accuracy achieved using available hardware timers • Use of motes for packet length detection looks promising

References • •

• •

•

Madwifi website. http://madwifi.org. Kameswari Chebrolu and Bhaskaran Raman. Fractel: A fresh perspective on (rural) mesh networks. ACM SIGCOMM Workshop on Networked Systems for Developing Regions (NSDR’07), A Workshop in SIGCOMM 2007, Aug 2007, Kyoto, Japan. Advanced Micro Devices. AMD Geode SC1100 Processor Data Book, January 2004. Christian Doerr, Michael Neufeld, Jeff Fifield, Troy Weingart, Douglas C. Sicker, and Dirk Grunwald. MultiMAC- An adaptive MAC Framework for Dynamic Radio Networking. IEEE, 2005. J. Elson, L. Girod, and D. Estrin. Fine-Grained Time Synchronization using Reference Broadcasts. Proceedings of the Fifth Symposium on Operating Systems Design and Implementation (OSDI 2002), Boston, MA, December, 2002.

References (cont…) • Saurabh Ganeriwal, Ram Kumar, and Mani B. Srivastava. Timingsync Protocol for Sensor Networks. SenSys ’03. • Mikls Marti, Branislav Kusy, Gyula Simon, and kos Ldeczi. The Flooding Time Synchronization Protocol. SenSys ’04. • Nilesh Mishra, Kameswari Chebrolu, Bhaskaran Raman, and Abhinav Pathak. Wake-on-WLAN. WWW 2006, May 23-26, 2006, Edinburgh, Scotland. • Randolph Nelson and Leonard Kleinrock. Spatial TDMA: A CollisionFree Multihop Channel Access Protocol. IEEE 1985. • Michael Neufeld, Jeff Fifield, Christian Doerr, Anmol Sheth, and Dirk Grunwald. SoftMAC - Flexible Wireless Research Platform. • Ananth Rao and Ion Stocia. An Overlay MAC Layer for 802.11 Networks. • Ashish Sharma, Mohit Tiwari, and Haitao Zheng. Mad-MAC: Building a Reconfigurable Radio Testbed using Commodity 802.11 Hardware.

References (cont…) • Fikret Sivrikaya and Bulent Yener. Time Synchronization in Sensor Networks: A Survey. 2003. • Qing Ye, Yuecheng Zhang, and Liang Cheng. A study on the optimal time synchronization accuracy in wireless sensor networks. Computer Networks 48 (2005) 549–566, 2004. • Dong Zhou and Ten H. Lai. An Accurate and Scalable Clock Synchronization Protocol for IEEE 802.11-based Multihop Ad Hoc Networks. IEEE Transactions on Parallel and Distributer Systems, 2007. • Ashish Sharma, Elizabeth M. Belding, FreeMAC: Framework for Multi-Channel MAC Development on 802.11 Hardware, PRESTO’08, August 22, 2008