III B.TECH – I SEM EXAMINATIONS, NOVEMBER - 2010 LINEAR IC APPLICATIONS (ELECTRONICS AND COMMUNICATIONS ENGINEERING) Max.Marks:80 Time: 3hours Answer any FIVE questions All questions carry equal marks --1.a) b)
Explain cascade connection of differential amplifier for active load. If all the transistors used in the circuit shown in figure.1 are made with silicon with β = 100, determine the emitter current in transistor Q3 ? [8+8]
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With necessary equations explain how does the negative feedback affect the performance of an inverting and non-inverting amplifier? Design a practical integrator to produce a peak voltage of 0.1V, when Vi =10Sin (2πx104t). Find the DC component at the output when the input is +10mV DC? [8+8]
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Draw the pin diagram and schematic symbol of a typical Op-Amp IC741 and explain the function of each pin. Also discuss its features? Explain the parameters that should be considered for AC and DC applications of an Op-Amp? Draw and explain the three open loop Op-Amp configurations with neat circuit [4+6+6] diagrams?
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Derive the expression for the output voltage of an Antilog Amplifier using OpAmp? Explain how computation is done against temperature variations? Describe the principle of operation of a precision Full wave rectifier with waveforms? [8+8] Explain the operation of a delay-equalizer circuit with neat sketches. Derive an expression relating input and output voltages of the delay-equalizer. Design a Butterworth active low pass filter for a given normalized polynomial of s2+1.414s+1 at a cut-off frequency of 5 KHz? [8+8]
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www.QuestionPaperDownload.com 6.a) b) c) 7.a) b) c)
Explain how the deficiencies of weighted resister type DAC can be overcome through an R-2R ladder type network. Explain the conversion procedure in R-2R ladder type DAC Define the terms ‘Resolution’, ‘Conversion time’ and ‘Linearity’ of an Analog to Digital converter. What is the resolution of a 11-bit Analog to Digital converter for a full scale input [8+4+4] voltage of 10.24 volts?
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What is the need of sample and hold circuit in electronic circuit design? With neat circuit diagram, describe the operation of an op-amp based sample and hold circuit. Draw the circuit of Four Quadrant multiplier and explain its operation? [8+8]
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8.a)
Explain one method to achieve 50% duty cycle in an astable multivibrator using 555 timer? Design a 555 timer astable multivibrator operating at 18 KHz with 40% duty cycle. Explain frequency translation and FM detection applications of PLL? [4+6+6]
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SET-2
R05
Code.No: R05310401
III B.TECH – I SEM EXAMINATIONS, NOVEMBER - 2010 LINEAR IC APPLICATIONS (ELECTRONICS AND COMMUNICATIONS ENGINEERING) Max.Marks:80 Time: 3hours Answer any FIVE questions All questions carry equal marks --1.a) b)
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Derive the expression for the output voltage of an Antilog Amplifier using OpAmp? Explain how computation is done against temperature variations? Describe the principle of operation of a precision Full wave rectifier with waveforms? [8+8]
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2.a)
With necessary equations explain how does the negative feedback affect the performance of an inverting and non-inverting amplifier? Design a practical integrator to produce a peak voltage of 0.1V, when Vi =10Sin (2πx104t). Find the DC component at the output when the input is +10mV DC? [8+8]
b)
c) 6.a) b)
Explain how the deficiencies of weighted resister type DAC can be overcome through an R-2R ladder type network. Explain the conversion procedure in R-2R ladder type DAC Define the terms ‘Resolution’, ‘Conversion time’ and ‘Linearity’ of an Analog to Digital converter. What is the resolution of a 11-bit Analog to Digital converter for a full scale input voltage of 10.24 volts? [8+4+4]
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c)
Explain one method to achieve 50% duty cycle in an astable multivibrator using 555 timer? Design a 555 timer astable multivibrator operating at 18 KHz with 40% duty cycle. Explain frequency translation and FM detection applications of PLL? [4+6+6]
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b)
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4.a)
Explain the operation of a delay-equalizer circuit with neat sketches. Derive an expression relating input and output voltages of the delay-equalizer. Design a Butterworth active low pass filter for a given normalized polynomial of s2+1.414s+1 at a cut-off frequency of 5 KHz? [8+8]
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What is the need of sample and hold circuit in electronic circuit design? With neat circuit diagram, describe the operation of an op-amp based sample and hold circuit. Draw the circuit of Four Quadrant multiplier and explain its operation? [8+8]
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www.QuestionPaperDownload.com 7.a) b)
Explain cascade connection of differential amplifier for active load. If all the transistors used in the circuit shown in figure.1 are made with silicon with β = 100, determine the emitter current in transistor Q3 ? [8+8]
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c)
Draw the pin diagram and schematic symbol of a typical Op-Amp IC741 and explain the function of each pin. Also discuss its features? Explain the parameters that should be considered for AC and DC applications of an Op-Amp? Draw and explain the three open loop Op-Amp configurations with neat circuit diagrams? [4+6+6]
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SET-3
R05
Code.No: R05310401
III B.TECH – I SEM EXAMINATIONS, NOVEMBER - 2010 LINEAR IC APPLICATIONS (ELECTRONICS AND COMMUNICATIONS ENGINEERING) Max.Marks:80 Time: 3hours Answer any FIVE questions All questions carry equal marks --1.a) b)
Explain how the deficiencies of weighted resister type DAC can be overcome through an R-2R ladder type network. Explain the conversion procedure in R-2R ladder type DAC Define the terms ‘Resolution’, ‘Conversion time’ and ‘Linearity’ of an Analog to Digital converter. What is the resolution of a 11-bit Analog to Digital converter for a full scale input voltage of 10.24 volts? [8+4+4]
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b)
Explain one method to achieve 50% duty cycle in an astable multivibrator using 555 timer? Design a 555 timer astable multivibrator operating at 18 KHz with 40% duty cycle. Explain frequency translation and FM detection applications of PLL? [4+6+6]
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2.a)
Explain the operation of a delay-equalizer circuit with neat sketches. Derive an expression relating input and output voltages of the delay-equalizer. Design a Butterworth active low pass filter for a given normalized polynomial of s2+1.414s+1 at a cut-off frequency of 5 KHz? [8+8]
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What is the need of sample and hold circuit in electronic circuit design? With neat circuit diagram, describe the operation of an op-amp based sample and hold circuit. Draw the circuit of Four Quadrant multiplier and explain its operation? [8+8]
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4.a)
Explain cascade connection of differential amplifier for active load. If all the transistors used in the circuit shown in figure.1 are made with silicon [8+8] with β = 100, determine the emitter current in transistor Q3 ?
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Derive the expression for the output voltage of an Antilog Amplifier using OpAmp? Explain how computation is done against temperature variations? Describe the principle of operation of a precision Full wave rectifier with waveforms? [8+8] --ooOoo--
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b)
With necessary equations explain how does the negative feedback affect the performance of an inverting and non-inverting amplifier? Design a practical integrator to produce a peak voltage of 0.1V, when Vi =10Sin (2πx104t). Find the DC component at the output when the input is +10mV DC? [8+8]
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8.a)
Draw the pin diagram and schematic symbol of a typical Op-Amp IC741 and explain the function of each pin. Also discuss its features? Explain the parameters that should be considered for AC and DC applications of an Op-Amp? Draw and explain the three open loop Op-Amp configurations with neat circuit diagrams? [4+6+6]
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SET-4
R05
Code.No: R05310401
III B.TECH – I SEM EXAMINATIONS, NOVEMBER - 2010 LINEAR IC APPLICATIONS (ELECTRONICS AND COMMUNICATIONS ENGINEERING) Max.Marks:80 Time: 3hours Answer any FIVE questions All questions carry equal marks --1.a) b)
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Explain cascade connection of differential amplifier for active load. If all the transistors used in the circuit shown in figure.1 are made with silicon [8+8] with β = 100, determine the emitter current in transistor Q3 ?
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What is the need of sample and hold circuit in electronic circuit design? With neat circuit diagram, describe the operation of an op-amp based sample and hold circuit. Draw the circuit of Four Quadrant multiplier and explain its operation? [8+8]
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c)
Explain how the deficiencies of weighted resister type DAC can be overcome through an R-2R ladder type network. Explain the conversion procedure in R-2R ladder type DAC Define the terms ‘Resolution’, ‘Conversion time’ and ‘Linearity’ of an Analog to Digital converter. What is the resolution of a 11-bit Analog to Digital converter for a full scale input voltage of 10.24 volts? [8+4+4]
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Draw the pin diagram and schematic symbol of a typical Op-Amp IC741 and explain the function of each pin. Also discuss its features? Explain the parameters that should be considered for AC and DC applications of an Op-Amp? Draw and explain the three open loop Op-Amp configurations with neat circuit diagrams? [4+6+6]
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6.a) b) 7.a)
Derive the expression for the output voltage of an Antilog Amplifier using OpAmp? Explain how computation is done against temperature variations? Describe the principle of operation of a precision Full wave rectifier with waveforms? [8+8] Explain the operation of a delay-equalizer circuit with neat sketches. Derive an expression relating input and output voltages of the delay-equalizer. Design a Butterworth active low pass filter for a given normalized polynomial of s2+1.414s+1 at a cut-off frequency of 5 KHz? [8+8]
c)
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Explain one method to achieve 50% duty cycle in an astable multivibrator using 555 timer? Design a 555 timer astable multivibrator operating at 18 KHz with 40% duty cycle. Explain frequency translation and FM detection applications of PLL? [4+6+6]
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With necessary equations explain how does the negative feedback affect the performance of an inverting and non-inverting amplifier? Design a practical integrator to produce a peak voltage of 0.1V, when Vi =10Sin (2πx104t). Find the DC component at the output when the input is +10mV DC? [8+8]
7.a) Explain how the deficiencies of weighted resister type DAC can be overcome. through an R-2R ladder type network. Explain the conversion procedure in R- ...
Explain how in a population of telomere deficient cells, the loss of p53 facilitates. the development of cancer? [16] ? ? ? ? ? www.questionpaperdownload.com ...
Page 2 of 8. Code No: R05420306 R05 Set No. 2. Figure 6. 7. (a) Explain the application of industrial Robots in stamping - press operation. (b) What are the ...
iii. the energy stored. 7. Explain about the parameters of the open wire line at high frequencies? [16]. 8. (a) List out the applications of transmission lines.
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(b) What is cipher feedback mode? Why it is used? [10+6] ? ? ? ? ? Page 1 of 1. B Tech 3-1 R05 CN Question Paper.pdf. B Tech 3-1 R05 CN Question Paper.pdf.
plates is 2cm and the accelerating voltage is 1000volts. [8+8] ? ? ? ? ? 1. www.QuestionPaperDownload.com www.QuestionPaperDownload.com. Page 1 of 4 ...
Construct a FA for the following Right Linear Grammar (R.L.G) and write the. conversion procedure? S A â 0. A A â10 / â. [16]. 5.a) Describe the language in ...
where X(k) is the 10-point DFT of x(n). (c) Find the 10-point sequence y(n) that has a DFT Y(K)=X(K)W(K) where. X(K)is the 10-point DFT of the sequence.
(a) Explain how a server generates dynamic content. (b) Give a note on request time errors. [8+8]. 7. Java server pages simplify the delivery of dynamic web ...
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