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Code No: NR311901

1. (a) Explain the steps involved in the CAMP algorithm.

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III B.Tech I Semester Supplimentary Examinations, May/Jun 2009 DIGITAL SYSTEMS DESIGN (Electronics & Computer Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ?????

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(b) Find all the intersecting pairs of cubes without the help of a Map in the following Boolean function. f = 0112 +1002 + 1221 + 2112 [8+8] 2. (a) What are the basic building blocks of an ASM chart? Explain about them?

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(b) Show the eight exit paths in an ASM block emanating from the decision boxes that check the eight possible binary values of three control variables x, y and z. [8+8] 3. (a) Contrast the structures of FPGA’s and CPLD’s.

(b) Tabulate the truth table for an 8 X 4 ROM that implements the following four Boolean functions.

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P A (xyz) = P (1, 2, 4, 6) B (xyz) = P (0, 1, 6, 7) C (xyz) = P (2, 6) D (xyz) = (1, 2, 3, 5, 7)

[8+8]

4. (a) Explain how a fault in a circuit is diagnosed and also describe the testing process.

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(b) For the circuit given below figure4, find the test set for SA0, SA1 faults at input lines x1 , x2 , x3 and x4 using Boolean difference method. [8+8]

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5. (a) What is meant by hardware redundancy? How does it provide fault tolerance in logic circuits? (b) Derive the reliability factor of a Triple modular Redundant system. [10+6]

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Code No: NR311901 6. (a) Write short notes on preset distinguishing experiments.

NS, Z X=0 X=1 A, 1 E, 0 A, 0 C, 0 B, 0 D, 1 C, 1 C, 0 C, 0 D, 0

7. (a) Discuss the types of faults in PLAs.

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PS A B C D E

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(b) Determine whether or not Synchronizing sequences exist, and if any do exist, find the shortest ones for the machine given below. [8+8]

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(b) Minimize the following function implemented on PLA using IISC algorithm. f = 2120 + 0102 + 1121 + 0002 [8+8] 8. (a) Describe the DFT scheme of Biswas and Jacob. (b) Explain FCM.

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[8+8]