Modeling Interconnect Corners under Double Patterning Misalignment Daijoon Hyun§‡ and Youngsoo Shin§ §School of Electrical Engineering, KAIST, Daejeon 34141, Korea ‡ Samsung Electronics, Hwasung 18448, Korea

ABSTRACT Interconnect corners should accurately reflect the effect of misalingment in LELE double patterning process. Misalignment is usually considered separately from interconnect structure variations; this incurs too much pessimism and fails to reflect a large increase in total capacitance for asymmetric interconnect structure. We model interconnect corners by taking account of misalignment in conjunction with interconnect structure variations; we also characterize misalignment effect more accurately by handling metal pitch at both sides of a target metal independently. identifying metal space at both sides of a target metal.

1. INTRODUCTION Interconnect parasitics are important as they account for large portion of circuit delay as well as power consumption.1 Manufacturing variations on interconnect are modeled by interconnect corners, which are combinations of extreme resistance (R) and capacitance (C) values as illustrated in Figure 1(a). For example, Cmax is a corner in which metal wire is patterned wider and thicker, and inter layer dielectric (ILD) is thinner as shown in Figure 1(c), so C becomes larger and R becomes smaller. If metal wire is patterned wider and thicker as in Cmax corner, but ILD is thicker instead of thinner as illustrated in Figure 1(d), C slightly decreases with the same R, which yields RCmin corner where RC product is minimized. Let metal width and thickness be denoted by W and T , respectively, and ILD height be denoted by H as shown in Figure 1(b). Assuming that the three parameters are random variables following respective Gaussian distribution, probability density function (PDF) of total capacitance, which includes both coupling (Cc ) and ground component (Cg ), can be obtained. Conventional Cmax and Cmin corners correspond to ±3σ of this PDF.2 In double patterning technology (DPT), in particular with litho-etch-litho-etch (LELE) process, mask misalignment in the same metal layer is another manufacturing variation that should be considered in interconnect corner modeling.3, 4 Let misalignment be denoted by a random variable M . A simple-minded approach to account for misalignment is to shift each corner by 3σ or -3σ variation of M (see Figure 1(a).) The resulting change of total capacitance is reflected by multiplying some coefficient to Cc and add that to Cc .5 This simple conventional approach has two limitations in modeling misalignment.

Design-Process-Technology Co-optimization for Manufacturability X, edited by Luigi Capodieci and Jason Cain Proc. of SPIE Vol. 9781, 97810F © 2016 SPIE · CCC code: 0277-786X/16/$18 · doi: 10.1117/12.2219150 Proc. of SPIE Vol. 9781 97810F-1 Downloaded From: http://proceedings.spiedigitallibrary.org/ on 04/15/2016 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx

Traditional corners DPT corners

RCmax

M

Resistance

Cmin

Nominal

RCmin

T

Cmax

W

H

Capacitance

(a)

(b)

(c)

(d)

Figure 1. (a) Interconnect corners, (b) interconnect parameters; interconnect structures at (c) Cmax and (d) RCmin corners.

• Interconnect corners represent worst conditions of geometric interconnect parameters (W , T , and H) that cause maximum and minimum total capacitances, in which misalignment is probabilistically unlikely to happen in its maximum amount. • Symmetric structure shown in Figure 1(b) is only considered in conventional modeling. However, asymmetric structure is involved with larger increase of total capacitance from misalignment compared to symmetric one. We address a new interconnect corner modeling under misalignment, in which misalignment variable M is treated in conjunction with interconnect structure variables (W , T , and H). In addition, we study asymmetric interconnect structure as well as symmetric one to model misalignment more accurately. The remainder of this paper is organized as follows. In Section 2, we address a conventional interconnect corner modeling under misalignment and its limitations. Our new corner modeling is presented in Section 3. Experimental results are presented in Section 4, in which we discuss the effectiveness of new modeling compared to conventional modeling. Conclusions are drawn in Section 5.

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M

Probability

Without misalignment

(b)

M

Cmax

Cmin

Cmax

C’min Cmin

C’max

M

(c)

Total capacitance (a) Figure 2. (a) Total capacitance distribution without misalignment, and estimation of capacitance changes (∆Cmax and ∆Cmin ) from maximum misalignment at (b) Cmax corner and (c) Cmin corner.

2. CONVENTIONAL CORNER MODELING UNDER MISALIGNMENT 2.1 Modeling Method The three interconnect parameters (W , T , and H) can be regarded as independent.6 We therefore assume that each parameter is a random variable following its own Gaussian distribution. To model interconnect corners without misalignment, Gaussian random value is drawn for each variable; a field solver is applied to obtain capacitance value for each combination of parameter values; the resulting capacitance distribution is illustrated in Figure 2(a). We then assign ±3σ points of this distribution to Cmax and Cmin corners. To consider misalignment at Cmax corner, capacitance change due to misalignment is estimated by moving center metal by maximum amount of misalignment as shown in Figure 2(b). At Cmin corner, right (or left) two metals move to the right (or left) as shown in Figure 2(c) to decrease total capacitance even though it would not happen in LELE process. The capacitance changes, ∆Cmax and ∆Cmin , are 0 0 added to Cmax and Cmin corners to obtain DPT corners, Cmax and Cmin . 0 Cmax = Cmax + ∆Cmax , 0 Cmin

= Cmin − ∆Cmin .

(1) (2)

Since misalignment affects only coupling capacitances, the capacitance change is expressed using the 0 coefficients of coupling capacitances, kM and km , at Cmax and Cmin corners, respectively. Now, Cmax 0 and Cmin are represented as the sum of ground capacitance and coupling capacitance multiplied by

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Table 1. Capacitance change due to misalignment for various symmetric interconnect structures Interconnect structures Left Right space space 1x 1x 2x 2x 3x 3x 4x 4x

Capacitance changes at Cmax (%) Total Coupling Coupling cap cap (left) cap (right) +2.6 +25.9 -17.9 +0.4 +15.9 -13.1 +0.1 +13.9 -12.0 +0.1 +12.6 -11.1

Coupling cap coefficient (kM ) 1.039 1.013 1.009 1.004

the coefficients. 0 Cmax = Cg,M + kM Cc,M , 0 Cmin

= Cg,m + km Cc,m ,

(3) (4)

where Cg,M and Cc,M represent ground and coupling capacitances at Cmax corner, and Cg,m and Cc,m represent ground and coupling capacitances at Cmin corner. This approach models the impact of misalignment through coefficients of coupling capacitances; however, considering 3-sigma misalignment at existing 3-sigma corner has too much pessimism, and is unrealistic.

2.2 Asymmetric Interconnect Structures Conventional modeling assumes a symmetric metal structure when misalignment effect is considered for total capacitance. Symmetric interconnect has same coupling capacitances to left- and right-metals, and when center metal is misaligned, the increase of coupling capacitance in one side is somewhat cancelled out by the decrease in the another side. Table 1 shows capacitance changes in columns 3-5 and coupling capacitance coeffcients in the last column for various interconnect structures. When the space to adjacent metals is 1x, increase and decrease of coupling capacitance are 25.9% and -17.9%, respectively, but total capacitance increase is only 2.6%. In addition, the increase of metal space in symmetric structure causes even smaller increase in total capacitance, which in turn yields the smaller coefficient of coupling capacitance. To consider the different misalignment impacts from metal spaces, conventional modeling characterizes the coefficients with various metal spaces. Since the conventional modeling only considers symmetric interconnect structures, coupling capacitance coefficients from symmetric structures are used to reflect misalignment in asymmetric structures. As an example of Figure 3(a), assume that an interconnect structure has 1x and 3x spaces to left and right adjacent wires, respectively, and we want to calculate the maximum capacitance for the structure. The coefficients of coupling capacitances for 1x and 3x spaces are extracted from column 6 of Table 1; they are called as kM,1x and kM,3x , respectively; total capacitance is now obtained by multiplying corresponding coefficients to each coupling capacitance. 0 Cmax = Cg,M + kM,1x Clef t,M + kM,3x Cright,M ,

where Clef t,M and Cright,M represent left and right coupling capacitances at Cmax corner.

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(5)

SR

Increase of total capacitance (%)

1x

7.8

7.1

2.2

8.2

Measured w/ asymmetric structure

Estimated w/ symmetric structure (conventional) 1.8

1.6

1.5

1x 2x 3x 4x Space to right metal (SR)

(a)

(b)

Figure 3. (a) Asymmetric interconnect structure and (b) estimation of increased total capacitance from maximum misalignment for (a).

Figure 3(b) shows the increase of total capacitance from misalignment in conventional modeling. Conventional modeling using (5) causes very small increase of total capacitance, and it decreases with increasing asymmetry (see white squares); however, if we measure capacitance changes in asymmetric structures with the same modeling method, much larger increase of total capacitance is obtained, and it increases with increasing asymmetry (see black circles). There are large differences in change of total capacitance between two approaches for asymmetric structures, which comes from the situation where the large increase of coupling capacitance in 1x space is not cancelled out due to the relatively small coupling capacitance in large metal space. In other words, asymmetric structure is the worst condition in terms of the increase of total capacitance from misalignment; however, conventional modeling only considers symmetric structure and restuls in optimistic modeling for misalignment.

3. NEW CORNER MODELING Conventional modeling considers maximum misalignment at existing 3-sigma interconnect corners, which has too much pessimism in considering misalignment. Instead, we consider all interconnect parameters including misalignment simultaneously. Overall flow is illustrated in Figure 4. Assume an interconnect structure of certain configuration. It has four interconnect parameters, W , T , H, and M ; we assume that four parameters are random variables following respective Gaussian distribution. From each set of interconnect parameters, we calculate total capacitance using two-dimension field solver, and total capacitance distribution is obtained by using a large number of samples (denoted by ’With misalignment’ in Figure 4). We define ±3-sigma points of the distribution as maximum and 0 0 minimum capacitances of DPT corners, simply Cmax and Cmin . As in conventional modeling, Cmax and Cmin are determined in total capacitance distribution (denoted by ’Without misalignment’) obtained from three random variables, W , T , and H, and they are composed of ground and coupling capacitances. To model the effect of misalignment on coupling capacitance, the coefficients of coupling 0 0 capacitances, kM and km , are obtained to satisfy Cmax and Cmin as in (3) and (4).

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W

T

H

M

M T

W

Field solver

Probability

Without misalignment With misalignment Cmin

Cmax

H C’min Cmin

Cmax

C’max

Total capacitance Figure 4. New interconnect corner modeling considering all four random variables, W , T , H, and M .

We apply the new modeling to asymmetric structures to estimate the capacitance changes due to misalignment, and obtain a coefficient of coupling capacitance for each asymmetric structure. In the modeling for asymmetric structures, we use a single coefficient value for both left and right coupling capacitances, which is different from conventional modeling.

4. EXPERIMENTS Experiments are carried out using various interconnect structures. Total capacitance distribution is obtained by using 3,000 random samples for each interconnect parameter, in which capacitance is calculated by using Raphael.7 Table 2 represents the difference in total capacitance between conventional- and new-modelings. Columns 1-2 represent configurations of interconnect structure, and columns 3-4 show the difference of total capacitance between conventional and new modelings at Cmin and Cmax . The new model reduces the pessimism in considering misalignment and the optimism in asymmetric structures from conventional modeling, where the difference implies the improvement of accuracy in modeling. For a symmetric structure with minimum space (see third row), we obtain pessimism reductions of 6.70% at Cmin and 2.11% at Cmax . In conventional modeling at Cmin , two metals are assumed to move in the same direction, which reduces large coupling capacitance in one direction without increasing coupling capacitance in the other direction. By removing this improbable pessimism, new modeling shows larger total capacitance than conventional modeling at Cmin . In Section 2.2, conventional modeling has a large optimism in considering misalignment for asymmetric interconnect structures; however, by considering misalignment together with the other interconnect parameters we can reduce the optimism, which results in the total capacitance difference from 2.37% to 3.15% at Cmax . Also at Cmin , considering asymmetric structure reduces optimism, but positive values in difference are obtained due to improbable pessimism in Cmin modeling; it results in pessimism reduction from 2.95% to 4.25% for asymmetric structures.

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Table 2. Difference of total capacitance from conventional- and new-modeling for various interconnect structures: Total capacitance difference = (new corner - conventional corner) / conventional corner Interconnect structures Left Right space space 1x 1x 1x 2x 1x 3x 1x 4x

Total capacitance differences (%) Cmin Cmax +6.70 +4.25 +3.57 +2.95

-2.11 +2.37 +2.83 +3.15

5. CONCLUSION Interconnect corner modeling under misalignment in LELE process has been addressed. The new modeling removes a pessimism by considering misalignment as a random variable together with the other interconnect parameters. We have used asymmetric interconnect structure as well as symmetric one to account for large increasing of total capacitance in asymmetric structure.

ACKNOWLEDGMENTS This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (No. 2015R1A2A2A01008037).

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