Code No: R05310402

R05

Set No. 2

1. (a) Design a 16-bit comparator using 74×85 ICs.

in

III B.Tech I Semester Examinations,May 2011 DIGITAL IC APPLICATIONS Common to Electronics And Instrumentation Engineering, Electronics And Communication Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ?????

ld .

(b) Write a behavioral VHDL program to compare 16-bit signed and unsigned integers . [16] 2. (a) Design a CMOS transistor circuit for the following functional behavior. f (x) = (a + b) (a + c)

or

Also draw the relevant circuit diagram.

(b) Draw the resistive model of a CMOS inverter and explain its behavior for LOW and HIGH outputs. [8+8]

uW

3. Design a logic circuit to detect prime number of a 5-bit input. Write the structural VHDL program for the same. [16] 4. (a) Draw the circuit diagram of basic TTL NAND gate and explain the three parts with the help of functional operation. (b) Explain sinking current and sourcing current of TTL output. Which of the above parameters decide the fan-out and how? [8+8]

nt

5. (a) Design a 3-bit LFSR counter using 74×194 List out the sequence assuming that the initial state is 001. (b) Explain with timing waveforms, different operations during one clock cycle in a synchronous system structure. [8+8]

Aj

6. (a) It is necessary to identify the position of mechanical disk, when rotates with a step of 450 . Give the necessary encoding mechanism and draw the logic circuit? (b) Write a VHDL program for IC74×283.

[10+6]

7. (a) Realize the logic function performed by 74×138 with ROM. (b) How many ROM bits are required to build a 16-bit adder/subtractor with mode control, carry input, carry output and two’s complement overflow output. Show the block schematic with all inputs and outputs. [8+8]

8. (a) Discuss the steps in VHDL design flow.

1

Code No: R05310402

R05

Set No. 2

(b) What are the different data objects supported by VHDL? Explain scalar types with suitable examples. [8+8]

Aj

nt

uW

or

ld .

in

?????

2

Code No: R05310402

R05

Set No. 4

in

III B.Tech I Semester Examinations,May 2011 DIGITAL IC APPLICATIONS Common to Electronics And Instrumentation Engineering, Electronics And Communication Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ?????

ld .

1. (a) Design a 3-bit LFSR counter using 74×194 List out the sequence assuming that the initial state is 001.

(b) Explain with timing waveforms, different operations during one clock cycle in a synchronous system structure. [8+8] 2. Design a logic circuit to detect prime number of a 5-bit input. Write the structural VHDL program for the same. [16]

or

3. (a) Discuss the steps in VHDL design flow.

(b) What are the different data objects supported by VHDL? Explain scalar types with suitable examples. [8+8]

uW

4. (a) Design a CMOS transistor circuit for the following functional behavior. f (x) = (a + b) (a + c)

Also draw the relevant circuit diagram. (b) Draw the resistive model of a CMOS inverter and explain its behavior for LOW and HIGH outputs. [8+8]

nt

5. (a) Draw the circuit diagram of basic TTL NAND gate and explain the three parts with the help of functional operation. (b) Explain sinking current and sourcing current of TTL output. Which of the above parameters decide the fan-out and how? [8+8]

6. (a) Realize the logic function performed by 74×138 with ROM.

Aj

(b) How many ROM bits are required to build a 16-bit adder/subtractor with mode control, carry input, carry output and two’s complement overflow output. Show the block schematic with all inputs and outputs. [8+8]

7. (a) Design a 16-bit comparator using 74×85 ICs. (b) Write a behavioral VHDL program to compare 16-bit signed and unsigned integers . [16]

8. (a) It is necessary to identify the position of mechanical disk, when rotates with a step of 450 . Give the necessary encoding mechanism and draw the logic circuit?

3

Code No: R05310402

R05

Set No. 4

(b) Write a VHDL program for IC74×283.

[10+6]

Aj

nt

uW

or

ld .

in

?????

4

Code No: R05310402

R05

Set No. 1

in

III B.Tech I Semester Examinations,May 2011 DIGITAL IC APPLICATIONS Common to Electronics And Instrumentation Engineering, Electronics And Communication Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ????? 1. (a) Discuss the steps in VHDL design flow.

ld .

(b) What are the different data objects supported by VHDL? Explain scalar types with suitable examples. [8+8]

2. (a) Draw the circuit diagram of basic TTL NAND gate and explain the three parts with the help of functional operation.

or

(b) Explain sinking current and sourcing current of TTL output. Which of the above parameters decide the fan-out and how? [8+8]

3. Design a logic circuit to detect prime number of a 5-bit input. Write the structural VHDL program for the same. [16] 4. (a) Realize the logic function performed by 74×138 with ROM.

uW

(b) How many ROM bits are required to build a 16-bit adder/subtractor with mode control, carry input, carry output and two’s complement overflow output. Show the block schematic with all inputs and outputs. [8+8] 5. (a) Design a 16-bit comparator using 74×85 ICs. (b) Write a behavioral VHDL program to compare 16-bit signed and unsigned integers . [16]

nt

6. (a) Design a 3-bit LFSR counter using 74×194 List out the sequence assuming that the initial state is 001. (b) Explain with timing waveforms, different operations during one clock cycle in a synchronous system structure. [8+8]

Aj

7. (a) Design a CMOS transistor circuit for the following functional behavior. f (x) = (a + b) (a + c)

Also draw the relevant circuit diagram.

(b) Draw the resistive model of a CMOS inverter and explain its behavior for LOW and HIGH outputs. [8+8]

8. (a) It is necessary to identify the position of mechanical disk, when rotates with a step of 450 . Give the necessary encoding mechanism and draw the logic circuit?

5

Code No: R05310402

R05

Set No. 1

(b) Write a VHDL program for IC74×283.

[10+6]

Aj

nt

uW

or

ld .

in

?????

6

Code No: R05310402

R05

Set No. 3

in

III B.Tech I Semester Examinations,May 2011 DIGITAL IC APPLICATIONS Common to Electronics And Instrumentation Engineering, Electronics And Communication Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ?????

ld .

1. Design a logic circuit to detect prime number of a 5-bit input. Write the structural VHDL program for the same. [16] 2. (a) Design a CMOS transistor circuit for the following functional behavior. f (x) = (a + b) (a + c) Also draw the relevant circuit diagram.

or

(b) Draw the resistive model of a CMOS inverter and explain its behavior for LOW and HIGH outputs. [8+8] 3. (a) Design a 3-bit LFSR counter using 74×194 List out the sequence assuming that the initial state is 001.

uW

(b) Explain with timing waveforms, different operations during one clock cycle in a synchronous system structure. [8+8]

4. (a) Realize the logic function performed by 74×138 with ROM. (b) How many ROM bits are required to build a 16-bit adder/subtractor with mode control, carry input, carry output and two’s complement overflow output. Show the block schematic with all inputs and outputs. [8+8]

nt

5. (a) Design a 16-bit comparator using 74×85 ICs. (b) Write a behavioral VHDL program to compare 16-bit signed and unsigned integers . [16]

6. (a) Discuss the steps in VHDL design flow.

Aj

(b) What are the different data objects supported by VHDL? Explain scalar types with suitable examples. [8+8]

7. (a) Draw the circuit diagram of basic TTL NAND gate and explain the three parts with the help of functional operation. (b) Explain sinking current and sourcing current of TTL output. Which of the above parameters decide the fan-out and how? [8+8]

8. (a) It is necessary to identify the position of mechanical disk, when rotates with a step of 450 . Give the necessary encoding mechanism and draw the logic circuit?

7

Code No: R05310402

R05

Set No. 3

(b) Write a VHDL program for IC74×283.

[10+6]

Aj

nt

uW

or

ld .

in

?????

8

R05 Set No. 2

Also draw the relevant circuit diagram. (b) Draw the resistive model of a CMOS inverter and explain its behavior for. LOW and HIGH outputs. [8+8]. 8. (a) It is necessary to identify the position of mechanical disk, when rotates with a step of 450. Give the necessary encoding mechanism and draw the logic circuit? 5.

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