Code No: 07A30401

R07

Set No. 2

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II B.Tech I Semester Supplementary Examinations,June 2010 PULSE AND DIGITAL CIRCUITS Common to Electronics And Instrumentation Engineering, Electrical And Electronics Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ????? 1. (a) What is a sampling gate? Explain how it differs from logic gate?

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(b) What are the drawbacks of two-diode sampling gate? (c) Give examples of sampling gate and logic gates. 2. (a) What is a linear time base generator?

[8+4+4]

(b) Write the applications of time base generators.

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(c) Define the sweep speed error, displacement error and transmission error of voltage time base waveform. [16]

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3. (a) For the circuit shown in figure 3a , Vi is a sinusoidal voltage of peak 100 volts. Assume ideal diodes. Sketch one cycle of output voltage. Determine the maximum diode Current.

Figure 3a (b) Explain positive peak clipping with reference voltage.

[12+4]

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4.(a) Explain the revesere covery of a semiconductor diode. How does the ”recovery time” place a limitation on the diode speed? (b) Write short notes on the switching times of transistor.

[8+8]

5. (a) What is phase delay and phase jitter? (b) Explain the method of synchronization of a sinusoidal oscillator with pulses. (c) Explain the frequency division in sweep circuit.

[4+8+4]

6. (a) Discuss the response of high pass RC circuit for square wave input. (b) A 10Hz square wave is fed to an amplifier. Calculate and sketch the output wave forms under following conditions. The lower 3db frequency is (i) 0.3Hz (ii) 3Hz (iii) 30Hz [8+8] 1

Code No: 07A30401

R07

Set No. 2

7. (a) Draw the circuit diagram of diode - resistor logic OR gate and explain its operation.

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(b) A transistor inverter (NOT gate) circuit has a minimum value hf e = 30, VCC = 12V, RC = 2.2kΩ, R1 = 15kΩ and R2 =100kΩ, VBB = 12V. Prove that circuit works as NOT gate. Assume typical junction voltages. The input is varied between 0 and 12V. [16] 8. (a) Explain how a Schmitt trigger can be used as a comparator and as a squaring circuit.

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(b) What do you understand by hysterisis? What is hysterisis voltage? Explain how hysterisis can be eliminated in a Schmitt trigger. [8+8]

2

Code No: 07A30401

R07

Set No. 4

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II B.Tech I Semester Supplementary Examinations,June 2010 PULSE AND DIGITAL CIRCUITS Common to Electronics And Instrumentation Engineering, Electrical And Electronics Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ?????

(b) What is wired logic? Give some examples.

2. Write short notes on the following (a) Attenuvators (c) RC double differentiator

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(b) RLC Ringing circuit.

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1. (a) Draw the circuit diagram and explain the working of a Diode Transistor NOR logic gate.

[8+8]

[5+6+5]

(a) V1

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(b) V2 .

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3. Consider the Schmitt trigger of the following figure 3 with germanium transistors having hF E =40. The circuit parameters are VCC =55V, Rs=3.9K, Rc1 =12K, Rc2 =2K, R1 =39K, R2 =180K and Re=39K. Calculate [16]

Figure 3 3

Code No: 07A30401

R07

Set No. 4

4. (a) Draw the circuit diagram of fixed amplitude sweep circuit and explain its operation. (b) Draw the circuit diagram of transistor Miller time base generator and explain its working. [16]

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5. (a) With the help of a circuit diagram and waveforms, explain how division without phase jitter can be obtained using relaxation devices. (b) With the help of block diagram and waveforms for acheiving division of relaxation devices without phase jitter.

(b) Write short notes on diode switching times.

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6. (a) Explain the phenomenon of “latching” in a transistor switch.

[8+8]

(c) Define Rise time, fall time, storage time and delay time of a transistor.

[16]

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7. (a) Design a clipping circuit with ideal components, which can give the waveform shown in figure 7a for a sinusoidal input.

Figure 7a (b) State and prove clamping circuit theorem.

[8+8]

8. (a) Describe the working of a four diode gate with necessary diagrams and equations.

?????

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(b) For the four diode gate, RL = RC = 100k Ω and that R2 = 2kΩ, RF = 50Ω. For Vs = 25V, compute gain A, Vmin and (Vc )min . Compute (Vn )min for V = Vmin . [16]

4

Code No: 07A30401

R07

Set No. 1

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II B.Tech I Semester Supplementary Examinations,June 2010 PULSE AND DIGITAL CIRCUITS Common to Electronics And Instrumentation Engineering, Electrical And Electronics Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ????? 1. (a) Draw the circuit diagram of discrete-component regenerative comparator.

[16]

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(b) Draw the transfer characteristic showing hysteresis.

2. (a) Explain the response of RL circuit when a step i/p signal is applied

(b) In a low pass RC ckt, R=2kΩ and C= 1µF is applied as exponential input to this circuit determine the output wave form. [8+8]

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3. (a) Draw the circuit diagram of Diode-Transistor logic AND gate and explain its operation.

(b) What are the parameters that are considered to compare the logic families? [8+8]

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4. (a) Derive an expression for the Sweep Interval TS of UJT Voltage Sweep Circuit. (b) Sketch a trapezoidal waveform generator circuit with passive components. Obtain the output voltage of this circuit making all practical assumptions. [8+8] 5. (a) Describe the switching times of BJT by considering charge distribution across the base region. Explain this for cut-off, active and saturation region.

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(b) Give the expressions for rise time & fall time in terms of transistor parameters and operating currents. [8+8] 6. (a) Describe frequency division employing a transistor astable multivibrator with waveforms.

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(b) Describe frequency division employing a transistor monostable multivibrator with waveforms. [8+8]

7. (a) Determine the gain A, and minimum values Vmin and Vn (min) applicable to the four diode bi-directional sampling gate. The signal amplitude Vs =24v and assume that Rz =2.7kΩ, RL =RC =120KΩ, and the forward resistance of all the diodes Rf is assumed to be 25Ω. If the biasing voltage on either side of this circuit fulfil the condition V=Vmin . Determine the minimum value(Vc )min . (b) Distinguish between sampling and logic gates and give examples for each of them. [10+6]

5

Code No: 07A30401

R07

Set No. 1

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8. (a) A symmetrical 10 kHz square wave whose peak -to-peak excursion of ±10V with respect to ground is impressed upon the diode clamping circuit shown in figure8a.The diode has Rf = 100 Ω, Rr = ∞ and Vγ = 0. Sketch the steady state output waveform Indicating clearly the voltage levels.

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Figure 8a (b) Explain positive peak voltage limiters above and below reference level. [8+8]

6

Code No: 07A30401

R07

Set No. 3

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II B.Tech I Semester Supplementary Examinations,June 2010 PULSE AND DIGITAL CIRCUITS Common to Electronics And Instrumentation Engineering, Electrical And Electronics Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ?????

(b) Explain RC double differentiator circuit.

[8+8]

ld .

1. (a) Explain about RLC Ringing Circuit

2. Regeneration is possible in the fixed-bias transistor flip-flop if the base-to-base voltage gain exceeds unity. Verify that this gain condition is satisfied provided that hfe Rc > R1 . Assume that for each stage the current gain is |AI | = hF E  1 and that the input resistance Ri is small compared with either R1 or R2 . [16]

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3. (a) Distinguish between sampling gates and logic gates?

(b) Explain the operation of a chopper amplifier with neat block diagram and waveforms. (c) Distinguish between unidirectional and bidirectional gates.

[4+8+4]

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4. (a) What is phase delay and phase jitter?

(b) With the help of block diagram and waveforms, explain how division without phase jitter can be obtained using relaxation devices. (c) Write the factors which influence the stability of a relaxation divider.

[16]

5. (a) In a current sweep circuit, explain how linearity correction is made through adjustment of driving waveform.

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(b) Write the basic mechanism of transistor television sweep circuit.

[16]

6. (a) Explain with relevant diagram the various transistor switching times. (b) Explain the storage and transition times of the diode as a switch.

[8+8]

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7. (a) Draw the circuit diagram of diode - resistor logic AND gate and explain its operation. (b) Design a transistor inverter circuit (NOT gate) with the following specifica10m A; hhffee(min)==30; 30; the input is varying tions. VCC = VBB = 10V; iicc(sat)== 10mA; between 0 and 10V. Assume typical junction voltages of npn silicon transistor. [16]

8. In the restorer circuit shown in figure 8 R= 100k Rf = 0.1K, Rr = ∞ Vγ = 0 the wave form is a square wave with V=30v , T1 = 50 micro sec and T2 = 1000 micro sec.

7

Code No: 07A30401

R07

Set No. 3

(a) Assume Rs =0 and C is arbitrarily large. Calculate and sketch the steady state output voltage Vo . (b) Repeat (a) if Rs =0.1k (c) Repeat (b) if C =0.05micro farad

[16]

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(d) Repeat (c) if Vγ =0.7v.

Figure 8

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8

R07 Set No. 2

(a) Discuss the response of high pass RC circuit for square wave input. (b) A 10Hz square wave is fed to an amplifier. Calculate and sketch the output wave ...
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