Set No. 1
Code No: R05411501
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IV B.Tech I Semester Regular Examinations, November 2008 PERFORMANCE EVALUATION OF COMPUTER SYSTEMS (Computer Science & Systems Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆ 1. (a) State and prove Baye’s theorem.
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(b) Two similar Urns A,B contain 2 white and 3 red balls, 4 white and 5 red balls respectively. If a ball is selected at random from one of the Urns then find the probability that the Urn is B when the ball is red. [8+8] 2. (a) A random variable distribution is given by the table:
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Xi : -2 3 1 P(X=Xi ) 1/3 1/2 1/2
(b) A discrete random variable X and Y have the following joint probabilities: P(x=0,y=0)=2/9 ; P(x=0,y=1)=1/9 ; P(x=1,y=0)=1/9 ; P(x=1,y=1)=5/9 ; Find: E(x), E(y) V(x), V(y) Cov(x,y) Examine whether X and Y are independent or not.
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i. ii. iii. iv.
[8+8]
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3. If a hybrid NMR system in which N units are active and s units are in a standby status so that the failure rate of an active unit is λ and a unit in standby mode does not fail. There is a single repairman with repair rate µ. Give a queuing network that will model the behavior of this system. [16] 4. (a) Explain the architecture of PEPE Association Processor. (b) How is the summation functionality performed in a SIMD Machine.
[8+8]
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5. (a) Write about the BSP system architecture. (b) Write about the prime memory system.
[8+8]
6. (a) Explain the Cm* architecture for a hierarchical loosely coupled system and explain the steps involved in an intracluster memory access. (b) List the advantages and disadvantages of asymmetric and symmetric I /O systems in a multiprocessor system. [8+8]
7. Explain the following conditions that ensure deadlock with an example. (a) Mutual Exclusion 1 of 2
Set No. 1
Code No: R05411501 (b) No preemption (c) Hold and Wait (d) Circular wait.
[4+4+4+4]
8. Write a short note on:
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(a) C.mmp multiprocessor system. (b) S-1 multiprocessor system. (c) HEP multiprocessor system.
[4+4+4+4]
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(d) CRAY X-MP.
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Set No. 2
Code No: R05411501
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IV B.Tech I Semester Regular Examinations, November 2008 PERFORMANCE EVALUATION OF COMPUTER SYSTEMS (Computer Science & Systems Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆
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1. (a) Jobs arriving at a computer system have been found to require CPU time that can be modeled by an exponential distribution with parameter 1/140 per millisecond. The CPU scheduling discipline is quantum-oriented so that a job not completing within a quantum of 100 milliseconds will be routed back to the tail of the queue of waiting jobs. Find the probability that an arriving job will be forced to wait for a second quantum. Of the 800 jobs coming in during a day, how many are expected to finish within the first quantum?
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(b) Derive the expressions for ’mean’ and ’variance’ of an exponential distribution. [8+8]
2. (a) A radioactive source emits particles at a arte of 5 per minute in accordance with Poisson process. Each particle emitted has a probability 0.6 of being recorded . Find the probability that 10 particles are recorded in 4-min period.
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(b) The number of accidents in a city follows a Poisson process with mean of 2 per day and the number Xi of people involved in the ith accident has the distribution P{Xi =k}=1/2k, (k≤1). Find the mean and variance of the number of people involved in accidents per week. [8+8] 3. If customers arrive for service according to a Poisson distribution at the average rate of 5 per day, how fast must they be serviced on the average (assume exponential service time) in order to keep the average number of customers in the system less than 4? [16]
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4. (a) Explain the two different types of architectural configurations of SIMD array processors with neat diagrams. (b) Differentiate between Stage Control & Switch control and give their relative importance. [8+8]
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5. Explain in detail about the BSP system.
[16]
6. (a) What is an inter connection network? Explain the common bus multiprocessor system. (b) Explain the bus arbitration algorithm used in multiprocessor system.
7. Explain the performance of parallel algorithms.
[8+8] [16]
8. (a) Give the Inter CPU Communication structure of Cray X-MP System. (b) Describe the functions of solid state storage device of the I/O Sub system of a Cray X-MP. [8+8] 1 of 2
Set No. 2
Code No: R05411501
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Set No. 3
Code No: R05411501
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IV B.Tech I Semester Regular Examinations, November 2008 PERFORMANCE EVALUATION OF COMPUTER SYSTEMS (Computer Science & Systems Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆ 1. (a) A number selected at random from a set of natural numbers {1,,2,...200} What is the probability that the number is divisible by 8 or 12?
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(b) If one in every 1000 of computers produced is defective, determine the probability that a random sample of 8000 will yield fewer than 7 defective computers. [8+8]
i. E(y/x) ii. E(x/y)
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2. (a) Define conditional expectation of a continuous random variable: If f(x,y)=2, 0
(b) Given the following probability distribution of x, then compute:
Find:
E(x) E(2x+3) E(x2 ) V(x) V(2x+3).
[8+8]
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i. ii. iii. iv. v.
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x -3 -2 -1 0 1 2 3 P(x) 0.05 0.10 0.30 0 0.30 0.15 0..10
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3. If customers arrive for service according to a Poisson distribution at the average rate of 5 per day, how fast must they be serviced on the average (assume exponential service time) in order to keep the average number of customers in the system less than 4? [16] 4. Explain the architecture of STARAN Association Processor and array module with neat diagrams and discuss how parallel operations can be performed. [16] 5. Write briefly about Illiac -IV system architecture and their applications.
[16]
6. (a) Describe multicache problems? Describe methods to solve these problems. (b) Describe a methodology to evaluate different multiprocessor memory configuration. [8+8]
7. (a) When the system state ( W, A, f ) can be consider as safe state? 1 of 2
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Code No: R05411501
(b) What is a resource allocation graph? What it indicate? (c) What is the difference between instance and resource? Give an example. (d) Explain the deadlock prevention technique with suitable example for MIMD. [4+2+2+8]
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8. (a) Discuss about a simple queuing structure with a single processor having inter arrival time and service times. (b) Discuss in detail the performance of M/M/n queuing structure.
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[8+8]
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Set No. 4
Code No: R05411501
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IV B.Tech I Semester Regular Examinations, November 2008 PERFORMANCE EVALUATION OF COMPUTER SYSTEMS (Computer Science & Systems Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆
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1. (a) A committee of 4 people is to be appointed from 3 officers of the production department, 4 officers of the purchase department, 2 officers of the sales department and 1 chartered accountant. Find the probability of forming the committee in the following manner. i. There must be one from each category. ii. It should have at least one from the purchase department. iii. The chartered accountant must be in the committee.
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(b) From a city population the probability of selecting:
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i. a male or a smoker is 7/10. ii. a male smoker is 2/5. iii. a male, if a smoker is already selected is 2/3. Find the probability of selecting a smoker, if a male is first selected.[8+8] 2. Assuming that the number of arrivals in the interval (0,t) is Poisson distributed with parameter λt, compute the probability of an even number of arrivals . Also compute the probability of an odd number of arrivals. [16] 3. A supermarket has two girls attending to sales at the counters. If the service time for each customer is exponential with mean 4 min and if people arrive in Poisson fashion at the rate of 10 per hour, What is the probability that a customer has to wait for service:
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(a) What is expected percentage of idle time for each girl?
(b) If the customer has to wait in the queue, what is the expected length of his waiting time? [16]
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4. (a) Describe a Bit Serial Associative Memory Organization with suitable diagram. (b) In how many Categories, the associative search operations can be classified and what are they explain. [8+8]
5. (a) Explain the conceptual view of a single stage interconnection network and switch. (b) Give basic organization of Illiac-IV array processor. Explain its operations. (c) What is the motivation for an Array Processor?
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6. (a) Give the computer module of a nonhierarchical loosely coupled multiprocessor system. 1 of 2
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Code No: R05411501
(b) Give the various components of the Kmap in Cm*, architecture and explain the message transfer mechanism between modules. [10+6] 7. (a) Explain the zero searching synchronized algorithm for MIMD. (b) Describe the following terminologies associated with multiprocessor operating systems and MIMD algorithms.
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i. The ENQUE and DEQUE operations ii. The P and V operations.
[8+8]
8. (a) Explain the staging memory concept in MPP and instruction set of the MPP.
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(b) Demonstrate the effect of memory contention on the performance of C.mmp. [8+8]
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