Set No: Code No: 311901. III-B.Tech I-Semester Supplementary Examinations, May/June, 2004 DIGITAL SYSTEMS DESIGN (Electronics and Computer Engineering) Time: 3 hours. Max. Marks: 80 Answer any FIVE questions All questions carry equal marks --1.a) Define prime cube end explain about different types of prime cubes. b) Find different prime cubes in the function F =  (2,6,13,14,15,18,26,30)

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1

Realize master slave D Flipplop using NAND gates and with SM chart. Realize a sequential adder using JKFF and NAND gates. Draw the SM chart for that adder.

3.a) b)

Explain in detail about ASIC and its applications. Write the PAL programming table for binary multiplier.

4.a)

Generate the CAMP algorithm for the function f (a,b,c,d) ==  (1,3,5,7,9,10,13,14,15) What is a cyclic function, explain it with example.

5.a) b)

Explain the classical methods of fault detection and location. Find a minimal complete test set for detecting all distinguishable single faults on the redundant circuit of below fig by fault- table method.

Aj

nt

6.a) b)

Write a short notes on kohavis algorithm and minimize the function, fn = X1 X2 +X2 X4 + X1X31 X41 Explain about the hardware redundancy techniques.

uW

b)

or ld

2.a) b)

(Contd…2)

Code No: 311901.

PS

NS, Z X=0

.in

For each machine shown in table, (a) Find the shortest homing sequences (b) Determine whether or not synchronizing sequences exist and if any do exist, find the shortest ones. PS

8.a) b)

Set No: 1

NS, Z

X=0

X=1

A B C D

A, 1 A, 0 B, 0 C, 1

E, 0 C, 0 D, 1 C, 0

E

E, 0

D, 0

A B C D

C, 0 C, 0 A, 1 B, 0

What are various DFT schemes? Explain one technique with an example. How do you detect a specific fault?

nt

uW

(((*)))

Aj

X=1

D, 1 A, 1 B, 0 C, 1

or ld

7.a)

.. 2 ..

Set No:

2

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Code No: 311901. III-B.Tech I-Semester Supplementary Examinations, May, 2004 DIGITAL SYSTEMS DESIGN (Electronics and Computer Engineering) Time: 3 hours. Max. Marks: 80 Answer any FIVE questions All questions carry equal marks ---

Draw the ASM chart for the digital system to be designed consists of two registers R1 and R2 and a flip-flop E. The system counts the number of 1’s in the number loaded in to register R1 and sets register R2 to that number. Also give control implementation using multiplexes.

2.a)

A combinational circuit is defined by the function F 1 (A,B,C) =  3,5,6,7  F 2 (A,B,C) =

b)



(0,2,4,7)

or ld

1.

Implement the circuit with a PLA having three inputs, four product terms and two outputs. Explain in detail about charge coupled devices. Explain in detail about computer aided minimization procedures with examples.

4.a) b)

Explain fault detection in combinational circuits with suitable examples Explain two fault-location experiments with the help of a fault-location table.

5.a)

Explain one dimensional path sensitization with an example. Also mention its limitations. Prove that every two-level OR-AND network N1 has a two level AND-OR test equivalent network N2such that the inputs of N2 are complements of the inputs of N1.

b)

For the following machine (i) Find the shortest homing sequences. (ii) Determine whether or not synchronizing sequence exists, and if any do exist, find the shortest ones.

Aj

nt

6.a)

uW

3.

(Contd…2)

Code No: 311901.

.. 2 ..

Machine NS, Z X=1

A B C D

A, 1 A, 0 B, 0 C, 1

E, 0 C, 0 D, 1 C, 0

E

C, 0

D, 0

or ld

X=0

.in

PS

Set No: 2

Prove that if a synchronizing sequence for any n–state machine M exists, then its length is at most (n-1)2 n/2.

7.a) b)

Draw the testing arrangement for Built in self – test . Explain with an example. Explain the various faults in PLAs.

8. a) b) c) d)

Write short notes on Konavi Algorithm. Duagnosable machines. ASIC. PLA minimization.

uW

b)

Aj

nt

(((*)))

Set No: Code No: 311901. III-B.Tech I-Semester Supplementary Examinations, May, 2004 DIGITAL SYSTEMS DESIGN (Electronics and Computer Engineering) Time: 3 hours. Max. Marks: 80 Answer any FIVE questions All questions carry equal marks --1.a) Write a short notes on cubical operations, explain with example? b) With the help of maps, determine if the following cubes are wholly within the function, f = 0112+1221+2112 (i) 2122 (ii) 1001 (iii) 2221 (iv)1212

.in

3

Explain the different basic cements which are used in ASM charts. Draw the ASM charts for (i) JK Filpflop (ii) T Flipflop (iii) Demultiplexer

3.a) b)

Write the PAL programming table for the BCD to excess –3 code converter. Write the capabilities and limitations of finite state machines.

4.a)

Define (i)  -cube (ii) Dominating and dominated row (iii) Degree of adjacency. Find the CAMP-II print out of the function f (abcde) =  (0,1,3,5,7,-10,13-15,21,25,29)

uW

b)

or ld

2.a) b)

Explain the properties which are involved in Boolean difference method. Realize the function, E=a1d+b1c+ad1 using Boolean difference method.

6)

In the gate n/w shown in fig. only wires a,b,c and d may become either s-a-o or s-a-1 while the remaining wires considered “safe”.

Aj

nt

5.a) b)

a) Construct a fault table. b) Find a minimal cover of table and use it to determine a minimal fault detection experiment. c) Find a preset fault – location exp. & show its fault dictionary. Contd…2

Code No: 311901.

8

S2 , 0 S4 , 0

Define the terms: (i) Homing sequence. (ii) Distinguishing sequence. Write short notes on, (i) PLA folding (ii) DFT schenes (iii) Built in self-fest.

S4 , 0 S3 , 0

S3 , 0 S4 , 1

nt

uW

(((*)))

Aj

.in

Find the shortest homing sequence for the machine shown in table. . PS NS, Z I1 I2 I3 S1 S1 , 0 S1 , 0 S1 , 0 S2 S3 , 0 S2 , 0 S2 , 0 S3 S4

b)

Set No: 3

or ld

7.a)

.. 2 ..

Set No:

Define prime cube and explain about different types of prime cubes. Find different prime cubes in the function F =  (2,6,13,14,15,18,26,30)

2.a)

Explain how the ASM chart differs from a conventional flow chart, with an example. Draw the ASM chart for the state machine show in figure.

uW

Explain in detail about ASIC and its applications . Write the PAL programming table for binary multiplier.

nt

3.a) b)

or ld

1.a) b)

b)

4

.in

Code No: 311901. III-B.Tech I-Semester Supplementary Examinations, May/June, 2004 DIGITAL SYSTEMS DESIGN (Electronics and Computer Engineering) Time: 3 hours. Max. Marks: 80 Answer any FIVE questions All questions carry equal marks ---

4.a)

b)

Define terms (i) Fault detection, location and diagnosis. (ii) Equivalent & redundant fault. Explain with an example about the path sensitization method.

Aj

5.a)

Generate the camp algorithm for the function f (a,b,c,d) =  (1,3,5,7,9,10,13,14,15) What is a cyclic function, explain it with example.

b)

(contd…2)

Code No: 311901.

.. 2 ..

Set No: 4

Explain the classical methods of fault detections and location. Find a minimal complete test set for detecting all distinguishable single faults on the irredundant circuit of below fig, by fault table method.

7.

For each machine shown in table. a) Find the shortest homing sequences. b) Determine whether or nor synchronizing sequences exist end if any do exit find the shortest ones. PS

X=1

A B C D

A, 1 A, 0 B, 0 C, 1

E, 0 C, 0 D, 1 C, 0

E

C, 0

D, 0

PS

uW

X=0

Write short notes on: PLA minimization Fault-tolerent VLSI processes arrays Test generation.

Aj

nt

8. a) b) c)

NS, Z

or ld

.in

6.a) b)

(((*)))

A B C D

NS, Z

X=0

X=1

C, 0 C, 0 A, 1 B, 0

D, 1 A, 1 B, 0 C, 1

Set No:

In the gate n/w shown in fig. only wires a,b,c and d may become either s-a-o or ... 7.a) Find the shortest homing sequence for the machine shown in table. . PS.

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