CMOS FABRICATION CMOS INVERTER MUTHU KUMAR G University VOC College Of Engineering Tuticorin
N WELL process
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• The inverter is built on a p-type substrate.
• The pMOS transistor requires an n-type body region, so an nwell is diffused into the substrate. • The nMOS transistor has heavily doped n-type source and drain regions and a polysilicon gate over a thin layer of silicon dioxide (SiO2, also called gate oxide). n+ and p+ diffusion regions indicate heavily doped n-type and p-type silicon. • The pMOS transistor is a similar structure with p-type source and drain regions.
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• The polysilicon gates of the two transistors are tied together form the input A. • The source of the nMOS transistor is connected to a metal ground line and the source of the pMOS transistor is connected to a metal VDD line. • The drains of the two transistors are connected with metal to form the output Y.
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Inverter Top view
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6 SET of Inverter masks Masks specify where the components will be manufactured on the chip
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• The process begins with the creation of an n-well on a bare p-type silicon wafer. • Forming the n-well requires adding enough Group V dopants into the silicon substrate to change the substrate from p-type to n-type in the region of the well. • To define what regions receive n-wells, we grow a protective layer of oxide over the entire wafer, then remove it where we want the wells. • We then add the n type dopants; the dopants are blocked by the oxide, but enter the substrate and form the wells where there is no oxide.
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N well fabrication
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a).
Transistors are fabricated on thin silicon wafers that serve as both a mechanical support and an electrical common point called the substrate.
b). The wafer is first oxidized in a high-temperature (typically 900–1200 °C) furnace that causes Si and O2 to react and become SiO2 on the wafer surface.
c). The oxide must be patterned to define the n-well. An organic photoresist that softens where exposed to light is spun onto the wafer . The photoresist is exposed through the n-well mask that allows light to pass through only where the well should be. SOLAR BOMMAI- A SCHOOL TO HAVE AQUAINTANCE IN ENGINEERING
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d). The softened photoresist is removed to expose the oxide.
e). The oxide is etched with hydrofluoric acid (HF) where it is not protected by the photoresist. f). the remaining photoresist is stripped away using a mixture of acids called piranha etch. g). The well is formed where the substrate is not covered with oxide.
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• Two ways to add dopants are diffusion and ion implantation. • In the diffusion process, the wafer is placed in a furnace with a gas containing the dopants. When heated, dopant atoms diffuse into the substrate. • Notice, how the well is wider than the hole in the oxide on account of lateral diffusion. • With ion implantation, dopant ions are accelerated through an electric field and blasted into the substrate. • In either method, the oxide layer prevents dopant atoms from entering the substrate where no well is intended • the remaining oxide is stripped with HF to leave the bare wafer with wells in the appropriate places. SOLAR BOMMAI- A SCHOOL TO HAVE AQUAINTANCE IN ENGINEERING
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• the polysilicon gate over the nMOS transistor blocks the diffusion so the source and drain are separated by a channel under the gate. • This is called a self-aligned process because the source and drain of the transistor are automatically formed adjacent to the gate without the need to precisely align the masks. Finally, the protective oxide is stripped.
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Silicon On Insulator- S O I Transistor is fabricated on insulator , So we eliminate parasitic capacitances, latch up problem.
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A thin film of very lightly doped n-type Si is grown over an insulator. (b)
Insulator- Sapphire or SiO2 or magnesium aluminate spinel SOLAR BOMMAI- A SCHOOL TO HAVE AQUAINTANCE IN ENGINEERING
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An anisotropic etch is used to etch away the Si except where a diffusion area (n or p) will be needed. (c,d)
It forms Si islands. (e)
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• The p-islands are formed next by masking the n-islands with a photo resist. • A p type dopant, boron is then implanted. • The p-islands are then covered with a photo resist and an n type dopant – phosphorus is implanted to form the n islands.
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• The p-islands will become the n-channel devices. • The n islands will become the p channel devices.
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• A thin gate oxide is grown aver all of the Si structures by thermal oxidation. • A polysilicon film is deposited over the oxide and it is doped With phosphorus to reduce its resistivity.
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The polysilicon is then patterned by photo masking and is etched. This defines the polysilicon layer in the structure (j)
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• To form the n-doped source and drain of the n channel devices in the p islands. • The n islands are covered with a photo resist and an n type dopant Phosphorus is implanted.
• The dopant will be blocked at the n –islands by photo resist and it will be blocked from the gate region of the p islands by polysilicon. SOLAR BOMMAI- A SCHOOL TO HAVE AQUAINTANCE IN ENGINEERING
• The p channel devices are formed next by masking the p islands and implanting a p type Dopant such as boron. • The polysilicon over the gate of the n islands will block the dopant from the gate, thus forming the p channel devices SOLAR BOMMAI- A SCHOOL TO HAVE AQUAINTANCE IN ENGINEERING
A layer of phosphorus glass or some other insulator such as SiO2 is then Deposited over the entire structure.
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• The Glass is etched at contact cut locations. • The metallization layer is formed next by evaporation aluminum over the entire Surface and etching it to leave only the desired metal wires. • The Al will flow through the contact cuts to make contact with diffusion or Polysilicon regions i.e. S/D or G.
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Advantages of SOI • No well formation • Lower substrate capacitances provide the possibility for faster circuits. • No field inversion problem exist(insulating substrate). • No latch up- bcz isolation of n and p transistors. • No body effect problem.
Disadvantages of SOI • Difficult to protect inputs. • Device gain is low • The coupling capacitance between wires always exists. SOLAR BOMMAI- A SCHOOL TO HAVE AQUAINTANCE IN ENGINEERING
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sources 1. Principles-of-CMOS-VLSI-Design-A-SystemsPerspective-Neil-Weste-Kamran-Eshragian 2. CMOS VLSI Design: A Circuits and Systems Perspective Book by David Harris and Neil Weste
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drain regions and a polysilicon gate over a thin layer of silicon. dioxide (SiO2, also called gate oxide). n+ and p+ diffusion. regions indicate heavily doped n-type ...
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