Code No: 45006

R07

Set No - 1

in

III B.Tech I Semester Regular Examinations,Nov/Dec 2009 Computer System Organization Electrical And Electronics Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ????? 1. (a) Explain the operation of control unit of basic computer with diagram

[8+8]

ld .

(b) List and explain arithmetic micro operations. 2. Design a parallel priority interrupt with eight interrupt devices.

[16]

3. (a) What is pipeline? Explain space-time diagram for Pipeline.

(b) Explain pipeline for floating point addition and subtraction.

or

4. (a) Write about program interrupt. (b) Write about instruction formats.

[8+8]

[8+8]

5. (a) Explain in detail various fields of microinstruction format with diagram.

uW

(b) Describe how microinstructions are arranged in control memory and how they are interpreted. [8+8] 6. (a) What are the different interconnection structures used in multiprocessors? (b) Explain the functioning of Binary Tree network with 2 x 2 switches. Show with a neat sketch. [8+8] 7. (a) Explain the following Read miss Read hit Write miss Write hit

nt

i. ii. iii. iv.

(b) Explain the organization and accessing of data on magnetic disk.

Aj

8. Write about performance measure of a computer. ?????

1

[8+8] [16]

Code No: 45006

R07

Set No - 2

in

III B.Tech I Semester Regular Examinations,Nov/Dec 2009 Computer System Organization Electrical And Electronics Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ????? 1. (a) Explain the operation of control unit of basic computer with diagram.

ld .

(b) Suppose a 32-bit instruction takes the following format: [OPCODE DR SR1 SR0 UNUSED] If there are 225 opcodes, 120 registers:

or

i. What is the minimum number of bits required to represent the OPCODE? ii. What is the minimum number of bits required to represent the Destination Register (DR)? iii. What is the maximum number of UNUSED bits in the instruction encoding? iv. What is the maximum number of offset bits? [8+8]

uW

2. (a) Formulate six-segment pipeline for a computer. Specify the operations to be performed in each segment. (b) Give an example of a program that will cause data conflict in the threesegment pipeline. [8+8] 3. An instruction is stored at location 300 with its address field at location 301 with a value 400. A processor register R1 contains the number 200. Calculate the effective address if the addressing mode of the instruction is Direct, Indirect, Relative, Register Indirect and index (with the process register as an index register). [16]

nt

4. (a) Explain Flash Memory.

(b) Describe the two update policies that a cache can use. For each policy, give an example of a situation where it would be preferred. [8+8]

5. (a) What is meant by binary micro program explain with example.

Aj

(b) Explain about decoding of microoperation fields of microinstruction, with the diagram. [8+8]

6. (a) What is advantage of priority interrupt over non priority interrupt? Explain the use of mask register. (b) Explain the significance of input-output interface. (c) Explain Asynchronous Communication Interface.

[6+5+5]

7. (a) Draw the diagram for connection between the processor and the memory and explain basic operational concepts of computer. 2

Code No: 45006

R07

Set No - 2

(b) Write about bus structures.

[8+8]

8. (a) What are the different interconnection structures used in multiprocessors? (b) Explain time-shared common bus in detail.

[8+8]

Aj

nt

uW

or

ld .

in

?????

3

Code No: 45006

R07

Set No - 3

1. (a) Differentiate between single versus two-level caches. (b) Elaborate on Pentium Cache Organization.

in

III B.Tech I Semester Regular Examinations,Nov/Dec 2009 Computer System Organization Electrical And Electronics Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ?????

[8+8]

ld .

2. Convert the following numbers with the indicated bases to decimal: (a) 12121 to the base 3 (b) 4310 to the base 5 (c) 50 to the base 7

[16]

or

(d) 198 to the base 8

3. (a) What is a bus? And construct a bus system using multiplexers. (b) List and explain arithmetic micro operations.

[8+8]

uW

4. (a) Give a summary of arithmetic and logical operations that are defined for the vector architecture. (b) Discuss different approaches to vector computation

[8+8]

5. (a) When is the interrupt service routine for a device invoked? Upon the occurrence of an interrupt, how does the processor determine the memory address of the correct service routine. What is the status of interrupted program during and after interrupt. (b) Which is the most efficient in the following?

nt

i. Programmed I/O ii. Interrupt Initiated I/O iii. DMA Justify your answer

[8+8]

Aj

6. (a) Explain multiport memory organization with a neat sketch. (b) Explain system bus structure for multiprocessors with a neat sketch.

[8+8]

7. (a) Explain address sequencing in Microprogrammed control unit (b) Explain in detail various fields of microinstruction format with diagram. [8+8]

8. (a) Write a note on stack organization (b) Explain different types of interrupts. ?????

4

[8+8]

Code No: 45006

R07

Set No - 4

in

III B.Tech I Semester Regular Examinations,Nov/Dec 2009 Computer System Organization Electrical And Electronics Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ????? 1. (a) What is the functioning of cross bar switch network? Explain with a neat sketch.

ld .

(b) Discuss the differences between tightly coupled multi processors and loosely coupled multiprocessors. [8+8] 2. A computer has 16 registers, an ALU with 32 operations, and a shifter with eight operations, all connected to a common bus system.

or

(a) Formulate the control word for a microinstruction.

(b) Specify the number of bits in each field of the control and give a general encoding scheme. [16]

uW

(c) Show the bits of control word that specify the microoperation RA←R5+R6 3. (a) Explain the operation of 4-bit adder-subtractor with example.

(b) Give hardware implementations to perform logic and shift operations. [8+8] 4. (a) Give the short sequence of machine instructions for the task “Add the contents of memory location A to those of location B and place the answer in location C”. Using Add, Load and Store instructions. (b) Convert the decimal numbers to the bases indicate.

nt

i. 7562 to octal ii. 1938 to hexadecimal

[8+8]

Aj

5. How many characters per second can be transmitted over a 1200-baud line in each of the following modes with a character code of 8 bits? (a) Synchronous serial transmission.

(b) Asynchronous serial transmission with two stop bits (c) Asynchronous serial transmission with one stop bits

6. Explain the following (a) Principles of cache memory (b) Write-through protocol (c) Write-back or copy-back protocol 5

[16]

Code No: 45006

R07

Set No - 4

(d) purpose of replacement algorithms.

[16]

7. Explain arithmetic, logic, shift instructions.

[16]

8. (a) How pipeline helps in a faster execution of an instruction?

in

(b) SIMD occurs as an acronym in Flynn’s taxonomy. What does it stand for? Give a brief description and an example. (c) MIMD occurs as an acronym in Flynn’s taxonomy. What does it stand for? Give a brief description and an example. [6+5+5]

Aj

nt

uW

or

ld .

?????

6