Code No: 43095/43096

Set No - 1

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1. (a) What is a linear time base generator?

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(b) Write the applications of time base generators.

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II B.Tech I Semester Regular Examinations,Nov/Dec 2009 PULSE AND DIGITAL CIRCUITS Common to Electronics And Instrumentation Engineering, Electrical And Electronics Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ?????

(c) Define the sweep speed error, displacement error and transmission error of voltage time base waveform. [16]

2. (a) Give the circuits of different types of shunt clippers and explain their operation with the help of their transfer characteristics.

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(b) Draw the diode differentiator comparator circuit and explain the operation of it when ramp input signal is applied. [8+8]

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3. Regeneration is possible in the fixed-bias transistor flip-flop if the base-to-base voltage gain exceeds unity. Verify that this gain condition is satisfied provided that hfe Rc > R1 . Assume that for each stage the current gain is |AI | = hF E  1 and that the input resistance Ri is small compared with either R1 or R2 . [16] 4. (a) Compare different logic families.

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(b) Draw the output waveform X for the given inputs figure ??

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5. (a) Explain the operation of a six - diode gate. (b) Write the applications of sampling gates. (c) Briefly describe the chopper amplifier and sampling scope.

[16]

6. (a) Discuss the response of high pass RC circuit for square wave input (b) A 10Hz square wave is fed to an amplifier. Calculate and sketch the output wave forms under following conditions. The lower 3db frequency is 1

Code No: 43095/43096

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Set No - 1

i. 0.3Hz ii. 3Hz iii. 30Hz

[8+8]

7. (a) With the help of a circuit diagram and waveforms explain frequency division of monostable multivibrator with pulse signals.

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(b) A symmetrical astable multivibrator using germanium transistors and operating from a 10V collector supply voltage has a free period of 1000 µsec. Triggering pulses whose spacing is 750 µsec are applied to one base through a small capacitor from a high impedance source. Find the minimum triggering pulse amplitude required to achieve 1 : 1 synchronization. Assume typical junction voltage of the transistor and that the timing portion of the base waveform is linear. [16] 8. (a) Explain how a BJT can be used as a switch. Compare it performance as a switch with BBJT

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(b) Describe the switching times of BJT by considering the charge distribution across the base region. Explain this for cut-off, active and saturation region. [8+8]

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Code No: 43095/43096

R07

Set No - 2

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II B.Tech I Semester Regular Examinations,Nov/Dec 2009 PULSE AND DIGITAL CIRCUITS Common to Electronics And Instrumentation Engineering, Electrical And Electronics Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ?????

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1. (a) Draw the circuit diagram of slicer circuit using Zener diodes and explain its operation with the help of its transfer characteristic.

(b) Draw the circuit diagram of emitter coupled clipper. Draw its transfer characteristics indicating all intercepts, slopes and voltage levels derive the necessary equations. [8+8] 2. (a) Explain with relevant diagrams the various transistor switching times

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(b) Give the design considreations of a transistor switch.

[8+8]

3. (a) What is sampling gate? Explain how it differ from logic gates? (b) What are the drawbacks of two diode sampling gate?

[8+4+4]

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(c) Give the examples of sampling gate and logic gates.

4. (a) Draw the circuit diagram of fixed amplitude sweep circuit and explain its operation. (b) Draw the circuit diagram of transistor Miller time base generator and explain its working. [16] 5. (a) What is phase delay and phase jitter?

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(b) Explain with the help of block diagram and waveforms for achieving division of relaxation devices without phase jitter. (c) Write the factors which influence the stability of a relaxation divider.

[16]

6. (a) What are the basic logic gates which perform all the operations in digital systems.

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(b) Give some applications of logic gates. (c) Define a positive and negative pulse logic systems.

(d) Draw a pulse train representing 1101011001.

[16]

7. In the monostable circuit of the given figure 7 the resistor R is connected to an auxiliary supply V1 instead of VY Y . If A2 is in saturation or clamp and if A1 is OFF in the stable state, verify that the gate time T is given by Eq. T =τ ln(VYY +I1 RY −Vσ)/(VYY −Vγ) with VY Y replaced by V1 . [16]

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Set No - 2

Figure 7

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Code No: 43095/43096

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8. (a) A symmetrical square wave whose peak-to-peak amptitude is 2V and whose average value is zero is applied to on RC integrating circuit. The time constant is equals to half -period of the square wave. Find the peak to peak value of the output amplitude

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(b) Describe the relationship between rise time and RCtime constant of a low pass RC circuit. [8+8]

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Code No: 43095/43096

R07

Set No - 3

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II B.Tech I Semester Regular Examinations,Nov/Dec 2009 PULSE AND DIGITAL CIRCUITS Common to Electronics And Instrumentation Engineering, Electrical And Electronics Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ?????

(b) What is wired logic? Give some examples.

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1. (a) Draw the circuit diagram and explain the working of a diode transistor logic gate

[8+8]

2. (a) What are the methods of generating a time base waveform? Explain each method.

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(b) Derive the expression Mathematical relationship between sweep speed error, Displacement error and transmission error for an exponential sweep circuit. [16] 3. (a) Obtain the response of high pass RC circuit for a ramp input wave form (b) Write a short notes on RLC circuit.

[8+8]

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4. (a) Draw the equivalent diagram for differential amplifier used as an astable multi vibrator. (b) Draw the various wave shapes of the astable multi vibrator.

[16]

5. (a) Describe frequency division employing a transistor a stable multivibrator with waveforms.

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(b) Describe frequency division employing a transistor monostable multivibrator with waveforms. [8+8] 6. (a) Explain with relevant diagram the various transistor switching times (b) Explain the storage and transition times of the diode as a switch.

[8+8]

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7. (a) Determine the gain A, and minimum values Vmin and Vn (min) applicable to the four diode bi-directional sampling gate. The signal amplitude Vs =24v and assume that Rz =2.7kΩ, RL =RC =120KΩ, and the forward resistance of all the diodes Rf is assumed to be 25Ω. If the biasing voltage on either side of this circuit fulfil the condition V=Vmin . Determine the minimum value(Vc )min . (b) Distinguish between sampling and logic gates and give examples for each of them. [10+6]

8. (a) Design a clipping circuit with ideal components, which can give the waveform shown in figure 7a for a sinusoidal input. 5

Set No - 3

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[8+8]

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Figure 7a (b) State and prove clamping circuit theorem.

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Code No: 43095/43096

Code No: 43095/43096

R07

Set No - 4

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II B.Tech I Semester Regular Examinations,Nov/Dec 2009 PULSE AND DIGITAL CIRCUITS Common to Electronics And Instrumentation Engineering, Electrical And Electronics Engineering Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ????? 1. (a) Define the following: Storage time Delay time Rise time Fall time

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i. ii. iii. iv.

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(b) Explain how a BJT can be used as a switch. Compare its perfoemance as a switch with JFET. [8+8] 2. (a) What are the applications of sampling gates?

(b) What are the advantages and disadvantages of unidirectional diode gate?

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(c) Discuss the operation of the four diode bi-directional sampling gate. [4+4+8] 3. (a) Explain with neat diagrams, the synchronization of a sweep circuit with symmetrical signals. (b) Compare sine wave synchronization with pulse synchronization. 4. (a) Verify V1 = 1+e−TV /2RC , V11 = plied to a high pass RC circuit

V 1+e−T /2RC

[16]

for a symmectrical square wave ap-

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(b) Draw the output wave forms of an RC high pass circuit for a square wave input under three different time constants. [8+8] 5. (a) In a current sweep circuit, explain how linearity correction is made through adjustment of driving waveform. (b) Write the basic mechanism of transistor television sweep circuit.

[16]

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6. (a) Draw the basic circuit diagram of a DC restorer circuit and explain its operation. Sketch the out put wave form for a sinusoidal input. (b) Draw the basic circuit diagram of positive peak clamper circuit and explain its operation. [8+8]

7. (a) Define level logic system and pulse logic system. (b) The transistor inverter (NOT gate) circuit has hf emin = 40, Vcc = 12V, Rc = 2.2kΩ, R1 = 15kΩ and R2 = 100kΩ, VBB = 12V. The input is varying between −12V and 0V. Assume typical junction voltages of pnp transistor. Prove that this circuit works as NOT gate. [16] 7

Code No: 43095/43096

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Set No - 4

8. A diode D is added in the series with the base of Q2 of collector coupled one shot in order to prevent base-to-emitter break down during the quasi stable state. (a) Verify the delay T is given by the diode voltage VD subtracted from both numerator and denominator. Where T = τ ln 2 + τ ln (VCC −(VCE (sat) + VBE (sat))/2)/(VCC −Vτ ) (b) What is the recovery time constant τ l .

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[16]

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